From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-x22d.google.com (mail-wm0-x22d.google.com [IPv6:2a00:1450:400c:c09::22d]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 4981C1A1DF3 for ; Thu, 11 Aug 2016 01:39:56 -0700 (PDT) Received: by mail-wm0-x22d.google.com with SMTP id q128so16013141wma.1 for ; Thu, 11 Aug 2016 01:39:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=/J11vem97MWPqYmSY7DJDp3ncTOUsD+VtceslphgYDQ=; b=YPyMfUpSuycdutdSsNtDwM++59frpXuIhmk7I2bEpxldsOnjsM0n+UBWCZwQcfHtI1 aRFpsndXTbzb8+wIJ4kr6zZ4rGXaibemUmsae4mitduLKf3lhud8PWnUS33CkTY4/4LA VEFxhMgElme8gTE+V0/YR+XE/5tJqFO9udL8Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=/J11vem97MWPqYmSY7DJDp3ncTOUsD+VtceslphgYDQ=; b=MQygPkB5nMFTa+xgPiqFcAL03nZSbUKjYvaz71hNUlM4rvUX7ZpRvM4zhGitSiV70G lczBeC2gpRhdbFxxwQF93/Wv3I/EoYJUdQYxpzgMB4IMY+oSH+5MwRXHlSIbDtPasjXD tvEAWvg24ot/Lr5c0FI500MlltbWu3LaA26G+ZfYy11O0JOnEaP71gwrIAFZaTiFWdfo JX+Ss+8IYQ0rco5Sx2BhJjzU9OooLxmpf22Y9K1MHRZn8n67NtITOa9qrSqYXBZzKXTp 57YxQEi4xA6XmaC22ZPPhT+rE0+Hq/LXLTL6zXyfCEIO9WMvsRShcdsUk7R0D/xZKGZX sroA== X-Gm-Message-State: AEkoouvy3DxxyFYP+KKAHUF3vdvLx8M57HSu+eLypgOyX7hvpjFmcK991qxQAn6+0qjTZtgB X-Received: by 10.28.113.151 with SMTP id d23mr8309817wmi.89.1470904794519; Thu, 11 Aug 2016 01:39:54 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id i80sm2031709wmf.11.2016.08.11.01.39.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 11 Aug 2016 01:39:53 -0700 (PDT) Date: Thu, 11 Aug 2016 09:39:52 +0100 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org, eugene@hp.com, lersek@redhat.com Message-ID: <20160811083952.GT31760@bivouac.eciton.net> References: <1470842282-8415-1-git-send-email-ard.biesheuvel@linaro.org> <1470842282-8415-26-git-send-email-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <1470842282-8415-26-git-send-email-ard.biesheuvel@linaro.org> User-Agent: Mutt/1.5.23 (2014-03-12) Subject: Re: [PATCH 25/26] ArmPlatformPkg/ArmPlatformLibNull: switch to ASM_FUNC() asm macro X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 11 Aug 2016 08:39:56 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Aug 10, 2016 at 05:18:01PM +0200, Ard Biesheuvel wrote: > Annotate functions with ASM_FUNC() so that they are emitted into > separate sections. Also replacing LoadConstantToReg. Add that to commit message and: Reviewed-by: Leif Lindholm > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel > --- > ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S | 28 +++++--------------- > ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S | 28 +++++--------------- > 2 files changed, 14 insertions(+), 42 deletions(-) > > diff --git a/ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S b/ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S > index 8c099b469e0e..2f4cf95cbf13 100644 > --- a/ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S > +++ b/ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S > @@ -14,18 +14,7 @@ > #include > #include > > -.text > -.align 2 > - > -GCC_ASM_EXPORT(ArmPlatformPeiBootAction) > -GCC_ASM_EXPORT(ArmPlatformGetCorePosition) > -GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId) > -GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore) > - > -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore) > -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask) > - > -ASM_PFX(ArmPlatformPeiBootAction): > +ASM_FUNC(ArmPlatformPeiBootAction) > ret > > //UINTN > @@ -33,7 +22,7 @@ ASM_PFX(ArmPlatformPeiBootAction): > // IN UINTN MpId > // ); > // With this function: CorePos = (ClusterId * 4) + CoreId > -ASM_PFX(ArmPlatformGetCorePosition): > +ASM_FUNC(ArmPlatformGetCorePosition) > and x1, x0, #ARM_CORE_MASK > and x0, x0, #ARM_CLUSTER_MASK > add x0, x1, x0, LSR #6 > @@ -43,21 +32,18 @@ ASM_PFX(ArmPlatformGetCorePosition): > //ArmPlatformGetPrimaryCoreMpId ( > // VOID > // ); > -ASM_PFX(ArmPlatformGetPrimaryCoreMpId): > - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x0) > - ldrh w0, [x0] > +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) > + MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore)) > ret > > //UINTN > //ArmPlatformIsPrimaryCore ( > // IN UINTN MpId > // ); > -ASM_PFX(ArmPlatformIsPrimaryCore): > - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, x1) > - ldrh w1, [x1] > +ASM_FUNC(ArmPlatformIsPrimaryCore) > + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask)) > and x0, x0, x1 > - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x1) > - ldrh w1, [x1] > + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCore)) > cmp w0, w1 > mov x0, #1 > mov x1, #0 > diff --git a/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S b/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S > index e52ea5afa2cb..bd517e6e16c1 100644 > --- a/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S > +++ b/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S > @@ -14,25 +14,14 @@ > #include > #include > > -.text > -.align 2 > - > -GCC_ASM_EXPORT(ArmPlatformPeiBootAction) > -GCC_ASM_EXPORT(ArmPlatformGetCorePosition) > -GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId) > -GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore) > - > -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore) > -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask) > - > -ASM_PFX(ArmPlatformPeiBootAction): > +ASM_FUNC(ArmPlatformPeiBootAction) > bx lr > > //UINTN > //ArmPlatformGetCorePosition ( > // IN UINTN MpId > // ); > -ASM_PFX(ArmPlatformGetCorePosition): > +ASM_FUNC(ArmPlatformGetCorePosition) > and r1, r0, #ARM_CORE_MASK > and r0, r0, #ARM_CLUSTER_MASK > add r0, r1, r0, LSR #7 > @@ -42,21 +31,18 @@ ASM_PFX(ArmPlatformGetCorePosition): > //ArmPlatformGetPrimaryCoreMpId ( > // VOID > // ); > -ASM_PFX(ArmPlatformGetPrimaryCoreMpId): > - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0) > - ldr r0, [r0] > +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) > + MOV32 (r0, FixedPcdGet32 (PcdArmPrimaryCore)) > bx lr > > //UINTN > //ArmPlatformIsPrimaryCore ( > // IN UINTN MpId > // ); > -ASM_PFX(ArmPlatformIsPrimaryCore): > - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1) > - ldr r1, [r1] > +ASM_FUNC(ArmPlatformIsPrimaryCore) > + MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCoreMask)) > and r0, r0, r1 > - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1) > - ldr r1, [r1] > + MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCore)) > cmp r0, r1 > moveq r0, #1 > movne r0, #0 > -- > 2.7.4 >