[Patch 09/20] UefiCpuPkg/NehalemMsr.h: add MSR reference from SDM in comment

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From: Jeff Fan <jeff.fan@intel.com>
To: edk2-devel@lists.01.org
Cc: Michael Kinney <michael.d.kinney@intel.com>,
	Feng Tian <feng.tian@intel.com>,
	Giri P Mudusuru <giri.p.mudusuru@intel.com>
Subject: [Patch 09/20] UefiCpuPkg/NehalemMsr.h: add MSR reference from SDM in comment
Date: Tue,  6 Sep 2016 19:38:41 +0800	[thread overview]
Message-ID: <20160906113852.11408-10-jeff.fan@intel.com> (raw)
In-Reply-To: <20160906113852.11408-1-jeff.fan@intel.com>

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
---
 UefiCpuPkg/Include/Register/Msr/NehalemMsr.h | 465 +++++++++++++++++++++++++++
 1 file changed, 465 insertions(+)

diff --git a/UefiCpuPkg/Include/Register/Msr/NehalemMsr.h b/UefiCpuPkg/Include/Register/Msr/NehalemMsr.h
index cc24a23..6f3d4f4 100644
--- a/UefiCpuPkg/Include/Register/Msr/NehalemMsr.h
+++ b/UefiCpuPkg/Include/Register/Msr/NehalemMsr.h
@@ -41,6 +41,7 @@
 
   Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_PLATFORM_ID);
   @endcode
+  @note MSR_NEHALEM_PLATFORM_ID is defined as MSR_PLATFORM_ID in SDM.
 **/
 #define MSR_NEHALEM_PLATFORM_ID                  0x00000017
 
@@ -82,6 +83,7 @@ typedef union {
 
   Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_SMI_COUNT);
   @endcode
+  @note MSR_NEHALEM_SMI_COUNT is defined as MSR_SMI_COUNT in SDM.
 **/
 #define MSR_NEHALEM_SMI_COUNT                    0x00000034
 
@@ -127,6 +129,7 @@ typedef union {
   Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_PLATFORM_INFO);
   AsmWriteMsr64 (MSR_NEHALEM_PLATFORM_INFO, Msr.Uint64);
   @endcode
+  @note MSR_NEHALEM_PLATFORM_INFO is defined as MSR_PLATFORM_INFO in SDM.
 **/
 #define MSR_NEHALEM_PLATFORM_INFO                0x000000CE
 
@@ -195,6 +198,7 @@ typedef union {
   Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_PKG_CST_CONFIG_CONTROL);
   AsmWriteMsr64 (MSR_NEHALEM_PKG_CST_CONFIG_CONTROL, Msr.Uint64);
   @endcode
+  @note MSR_NEHALEM_PKG_CST_CONFIG_CONTROL is defined as MSR_PKG_CST_CONFIG_CONTROL in SDM.
 **/
 #define MSR_NEHALEM_PKG_CST_CONFIG_CONTROL       0x000000E2
 
@@ -281,6 +285,7 @@ typedef union {
   Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_PMG_IO_CAPTURE_BASE);
   AsmWriteMsr64 (MSR_NEHALEM_PMG_IO_CAPTURE_BASE, Msr.Uint64);
   @endcode
+  @note MSR_NEHALEM_PMG_IO_CAPTURE_BASE is defined as MSR_PMG_IO_CAPTURE_BASE in SDM.
 **/
 #define MSR_NEHALEM_PMG_IO_CAPTURE_BASE          0x000000E4
 
@@ -340,6 +345,7 @@ typedef union {
   Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_IA32_MISC_ENABLE);
   AsmWriteMsr64 (MSR_NEHALEM_IA32_MISC_ENABLE, Msr.Uint64);
   @endcode
+  @note MSR_NEHALEM_IA32_MISC_ENABLE is defined as IA32_MISC_ENABLE in SDM.
 **/
 #define MSR_NEHALEM_IA32_MISC_ENABLE             0x000001A0
 
@@ -440,6 +446,7 @@ typedef union {
   Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_TEMPERATURE_TARGET);
   AsmWriteMsr64 (MSR_NEHALEM_TEMPERATURE_TARGET, Msr.Uint64);
   @endcode
+  @note MSR_NEHALEM_TEMPERATURE_TARGET is defined as MSR_TEMPERATURE_TARGET in SDM.
 **/
 #define MSR_NEHALEM_TEMPERATURE_TARGET           0x000001A2
 
@@ -487,6 +494,7 @@ typedef union {
   Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_MISC_FEATURE_CONTROL);
   AsmWriteMsr64 (MSR_NEHALEM_MISC_FEATURE_CONTROL, Msr.Uint64);
   @endcode
+  @note MSR_NEHALEM_MISC_FEATURE_CONTROL is defined as MSR_MISC_FEATURE_CONTROL in SDM.
 **/
 #define MSR_NEHALEM_MISC_FEATURE_CONTROL         0x000001A4
 
@@ -551,6 +559,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_OFFCORE_RSP_0);
   AsmWriteMsr64 (MSR_NEHALEM_OFFCORE_RSP_0, Msr);
   @endcode
+  @note MSR_NEHALEM_OFFCORE_RSP_0 is defined as MSR_OFFCORE_RSP_0 in SDM.
 **/
 #define MSR_NEHALEM_OFFCORE_RSP_0                0x000001A6
 
@@ -571,6 +580,7 @@ typedef union {
   Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_MISC_PWR_MGMT);
   AsmWriteMsr64 (MSR_NEHALEM_MISC_PWR_MGMT, Msr.Uint64);
   @endcode
+  @note MSR_NEHALEM_MISC_PWR_MGMT is defined as MSR_MISC_PWR_MGMT in SDM.
 **/
 #define MSR_NEHALEM_MISC_PWR_MGMT                0x000001AA
 
@@ -626,6 +636,7 @@ typedef union {
   Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_TURBO_POWER_CURRENT_LIMIT);
   AsmWriteMsr64 (MSR_NEHALEM_TURBO_POWER_CURRENT_LIMIT, Msr.Uint64);
   @endcode
+  @note MSR_NEHALEM_TURBO_POWER_CURRENT_LIMIT is defined as MSR_TURBO_POWER_CURRENT_LIMIT in SDM.
 **/
 #define MSR_NEHALEM_TURBO_POWER_CURRENT_LIMIT    0x000001AC
 
@@ -686,6 +697,7 @@ typedef union {
 
   Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_TURBO_RATIO_LIMIT);
   @endcode
+  @note MSR_NEHALEM_TURBO_RATIO_LIMIT is defined as MSR_TURBO_RATIO_LIMIT in SDM.
 **/
 #define MSR_NEHALEM_TURBO_RATIO_LIMIT            0x000001AD
 
@@ -747,6 +759,7 @@ typedef union {
   Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_LBR_SELECT);
   AsmWriteMsr64 (MSR_NEHALEM_LBR_SELECT, Msr.Uint64);
   @endcode
+  @note MSR_NEHALEM_LBR_SELECT is defined as MSR_LBR_SELECT in SDM.
 **/
 #define MSR_NEHALEM_LBR_SELECT                   0x000001C8
 
@@ -824,6 +837,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_LASTBRANCH_TOS);
   AsmWriteMsr64 (MSR_NEHALEM_LASTBRANCH_TOS, Msr);
   @endcode
+  @note MSR_NEHALEM_LASTBRANCH_TOS is defined as MSR_LASTBRANCH_TOS in SDM.
 **/
 #define MSR_NEHALEM_LASTBRANCH_TOS               0x000001C9
 
@@ -843,6 +857,7 @@ typedef union {
 
   Msr = AsmReadMsr64 (MSR_NEHALEM_LER_FROM_LIP);
   @endcode
+  @note MSR_NEHALEM_LER_FROM_LIP is defined as MSR_LER_FROM_LIP in SDM.
 **/
 #define MSR_NEHALEM_LER_FROM_LIP                 0x000001DD
 
@@ -863,6 +878,7 @@ typedef union {
 
   Msr = AsmReadMsr64 (MSR_NEHALEM_LER_TO_LIP);
   @endcode
+  @note MSR_NEHALEM_LER_TO_LIP is defined as MSR_LER_TO_LIP in SDM.
 **/
 #define MSR_NEHALEM_LER_TO_LIP                   0x000001DE
 
@@ -883,6 +899,7 @@ typedef union {
   Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_POWER_CTL);
   AsmWriteMsr64 (MSR_NEHALEM_POWER_CTL, Msr.Uint64);
   @endcode
+  @note MSR_NEHALEM_POWER_CTL is defined as MSR_POWER_CTL in SDM.
 **/
 #define MSR_NEHALEM_POWER_CTL                    0x000001FC
 
@@ -930,6 +947,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_IA32_PERF_GLOBAL_STAUS);
   AsmWriteMsr64 (MSR_NEHALEM_IA32_PERF_GLOBAL_STAUS, Msr);
   @endcode
+  @note MSR_NEHALEM_IA32_PERF_GLOBAL_STAUS is defined as IA32_PERF_GLOBAL_STAUS in SDM.
 **/
 #define MSR_NEHALEM_IA32_PERF_GLOBAL_STAUS       0x0000038E
 
@@ -949,6 +967,7 @@ typedef union {
 
   Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_PERF_GLOBAL_STAUS);
   @endcode
+  @note MSR_NEHALEM_PERF_GLOBAL_STAUS is defined as MSR_PERF_GLOBAL_STAUS in SDM.
 **/
 #define MSR_NEHALEM_PERF_GLOBAL_STAUS            0x0000038E
 
@@ -991,6 +1010,7 @@ typedef union {
   Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_PERF_GLOBAL_OVF_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_PERF_GLOBAL_OVF_CTRL, Msr.Uint64);
   @endcode
+  @note MSR_NEHALEM_PERF_GLOBAL_OVF_CTRL is defined as MSR_PERF_GLOBAL_OVF_CTRL in SDM.
 **/
 #define MSR_NEHALEM_PERF_GLOBAL_OVF_CTRL         0x00000390
 
@@ -1033,6 +1053,7 @@ typedef union {
   Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_PEBS_ENABLE);
   AsmWriteMsr64 (MSR_NEHALEM_PEBS_ENABLE, Msr.Uint64);
   @endcode
+  @note MSR_NEHALEM_PEBS_ENABLE is defined as MSR_PEBS_ENABLE in SDM.
 **/
 #define MSR_NEHALEM_PEBS_ENABLE                  0x000003F1
 
@@ -1103,6 +1124,7 @@ typedef union {
   Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_PEBS_LD_LAT);
   AsmWriteMsr64 (MSR_NEHALEM_PEBS_LD_LAT, Msr.Uint64);
   @endcode
+  @note MSR_NEHALEM_PEBS_LD_LAT is defined as MSR_PEBS_LD_LAT in SDM.
 **/
 #define MSR_NEHALEM_PEBS_LD_LAT                  0x000003F6
 
@@ -1150,6 +1172,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_PKG_C3_RESIDENCY);
   AsmWriteMsr64 (MSR_NEHALEM_PKG_C3_RESIDENCY, Msr);
   @endcode
+  @note MSR_NEHALEM_PKG_C3_RESIDENCY is defined as MSR_PKG_C3_RESIDENCY in SDM.
 **/
 #define MSR_NEHALEM_PKG_C3_RESIDENCY             0x000003F8
 
@@ -1171,6 +1194,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_PKG_C6_RESIDENCY);
   AsmWriteMsr64 (MSR_NEHALEM_PKG_C6_RESIDENCY, Msr);
   @endcode
+  @note MSR_NEHALEM_PKG_C6_RESIDENCY is defined as MSR_PKG_C6_RESIDENCY in SDM.
 **/
 #define MSR_NEHALEM_PKG_C6_RESIDENCY             0x000003F9
 
@@ -1192,6 +1216,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_PKG_C7_RESIDENCY);
   AsmWriteMsr64 (MSR_NEHALEM_PKG_C7_RESIDENCY, Msr);
   @endcode
+  @note MSR_NEHALEM_PKG_C7_RESIDENCY is defined as MSR_PKG_C7_RESIDENCY in SDM.
 **/
 #define MSR_NEHALEM_PKG_C7_RESIDENCY             0x000003FA
 
@@ -1213,6 +1238,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_CORE_C3_RESIDENCY);
   AsmWriteMsr64 (MSR_NEHALEM_CORE_C3_RESIDENCY, Msr);
   @endcode
+  @note MSR_NEHALEM_CORE_C3_RESIDENCY is defined as MSR_CORE_C3_RESIDENCY in SDM.
 **/
 #define MSR_NEHALEM_CORE_C3_RESIDENCY            0x000003FC
 
@@ -1234,6 +1260,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_CORE_C6_RESIDENCY);
   AsmWriteMsr64 (MSR_NEHALEM_CORE_C6_RESIDENCY, Msr);
   @endcode
+  @note MSR_NEHALEM_CORE_C6_RESIDENCY is defined as MSR_CORE_C6_RESIDENCY in SDM.
 **/
 #define MSR_NEHALEM_CORE_C6_RESIDENCY            0x000003FD
 
@@ -1252,6 +1279,28 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_MC0_MISC);
   AsmWriteMsr64 (MSR_NEHALEM_MC0_MISC, Msr);
   @endcode
+  @note MSR_NEHALEM_MC0_MISC  is defined as MSR_MC0_MISC  in SDM.
+        MSR_NEHALEM_MC1_MISC  is defined as MSR_MC1_MISC  in SDM.
+        MSR_NEHALEM_MC2_MISC  is defined as MSR_MC2_MISC  in SDM.
+        MSR_NEHALEM_MC3_MISC  is defined as MSR_MC3_MISC  in SDM.
+        MSR_NEHALEM_MC4_MISC  is defined as MSR_MC4_MISC  in SDM.
+        MSR_NEHALEM_MC5_MISC  is defined as MSR_MC5_MISC  in SDM.
+        MSR_NEHALEM_MC6_MISC  is defined as MSR_MC6_MISC  in SDM.
+        MSR_NEHALEM_MC7_MISC  is defined as MSR_MC7_MISC  in SDM.
+        MSR_NEHALEM_MC8_MISC  is defined as MSR_MC8_MISC  in SDM.
+        MSR_NEHALEM_MC9_MISC  is defined as MSR_MC9_MISC  in SDM.
+        MSR_NEHALEM_MC10_MISC is defined as MSR_MC10_MISC in SDM.
+        MSR_NEHALEM_MC11_MISC is defined as MSR_MC11_MISC in SDM.
+        MSR_NEHALEM_MC12_MISC is defined as MSR_MC12_MISC in SDM.
+        MSR_NEHALEM_MC13_MISC is defined as MSR_MC13_MISC in SDM.
+        MSR_NEHALEM_MC14_MISC is defined as MSR_MC14_MISC in SDM.
+        MSR_NEHALEM_MC15_MISC is defined as MSR_MC15_MISC in SDM.
+        MSR_NEHALEM_MC16_MISC is defined as MSR_MC16_MISC in SDM.
+        MSR_NEHALEM_MC17_MISC is defined as MSR_MC17_MISC in SDM.
+        MSR_NEHALEM_MC18_MISC is defined as MSR_MC18_MISC in SDM.
+        MSR_NEHALEM_MC19_MISC is defined as MSR_MC19_MISC in SDM.
+        MSR_NEHALEM_MC20_MISC is defined as MSR_MC20_MISC in SDM.
+        MSR_NEHALEM_MC21_MISC is defined as MSR_MC21_MISC in SDM.
   @{
 **/
 #define MSR_NEHALEM_MC0_MISC                     0x00000403
@@ -1293,6 +1342,25 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_MC3_CTL);
   AsmWriteMsr64 (MSR_NEHALEM_MC3_CTL, Msr);
   @endcode
+  @note MSR_NEHALEM_MC3_CTL  is defined as MSR_MC3_CTL  in SDM.
+        MSR_NEHALEM_MC4_CTL  is defined as MSR_MC4_CTL  in SDM.
+        MSR_NEHALEM_MC5_CTL  is defined as MSR_MC5_CTL  in SDM.
+        MSR_NEHALEM_MC6_CTL  is defined as MSR_MC6_CTL  in SDM.
+        MSR_NEHALEM_MC7_CTL  is defined as MSR_MC7_CTL  in SDM.
+        MSR_NEHALEM_MC8_CTL  is defined as MSR_MC8_CTL  in SDM.
+        MSR_NEHALEM_MC9_CTL  is defined as MSR_MC9_CTL  in SDM.
+        MSR_NEHALEM_MC10_CTL is defined as MSR_MC10_CTL in SDM.
+        MSR_NEHALEM_MC11_CTL is defined as MSR_MC11_CTL in SDM.
+        MSR_NEHALEM_MC12_CTL is defined as MSR_MC12_CTL in SDM.
+        MSR_NEHALEM_MC13_CTL is defined as MSR_MC13_CTL in SDM.
+        MSR_NEHALEM_MC14_CTL is defined as MSR_MC14_CTL in SDM.
+        MSR_NEHALEM_MC15_CTL is defined as MSR_MC15_CTL in SDM.
+        MSR_NEHALEM_MC16_CTL is defined as MSR_MC16_CTL in SDM.
+        MSR_NEHALEM_MC17_CTL is defined as MSR_MC17_CTL in SDM.
+        MSR_NEHALEM_MC18_CTL is defined as MSR_MC18_CTL in SDM.
+        MSR_NEHALEM_MC19_CTL is defined as MSR_MC19_CTL in SDM.
+        MSR_NEHALEM_MC20_CTL is defined as MSR_MC20_CTL in SDM.
+        MSR_NEHALEM_MC21_CTL is defined as MSR_MC21_CTL in SDM.
   @{
 **/
 #define MSR_NEHALEM_MC3_CTL                      0x0000040C
@@ -1331,6 +1399,25 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_MC3_STATUS);
   AsmWriteMsr64 (MSR_NEHALEM_MC3_STATUS, Msr);
   @endcode
+  @note MSR_NEHALEM_MC3_STATUS  is defined as MSR_MC3_STATUS  in SDM.
+        MSR_NEHALEM_MC4_STATUS  is defined as MSR_MC4_STATUS  in SDM.
+        MSR_NEHALEM_MC5_STATUS  is defined as MSR_MC5_STATUS  in SDM.
+        MSR_NEHALEM_MC6_STATUS  is defined as MSR_MC6_STATUS  in SDM.
+        MSR_NEHALEM_MC7_STATUS  is defined as MSR_MC7_STATUS  in SDM.
+        MSR_NEHALEM_MC8_STATUS  is defined as MSR_MC8_STATUS  in SDM.
+        MSR_NEHALEM_MC9_STATUS  is defined as MSR_MC9_STATUS  in SDM.
+        MSR_NEHALEM_MC10_STATUS is defined as MSR_MC10_STATUS in SDM.
+        MSR_NEHALEM_MC11_STATUS is defined as MSR_MC11_STATUS in SDM.
+        MSR_NEHALEM_MC12_STATUS is defined as MSR_MC12_STATUS in SDM.
+        MSR_NEHALEM_MC13_STATUS is defined as MSR_MC13_STATUS in SDM.
+        MSR_NEHALEM_MC14_STATUS is defined as MSR_MC14_STATUS in SDM.
+        MSR_NEHALEM_MC15_STATUS is defined as MSR_MC15_STATUS in SDM.
+        MSR_NEHALEM_MC16_STATUS is defined as MSR_MC16_STATUS in SDM.
+        MSR_NEHALEM_MC17_STATUS is defined as MSR_MC17_STATUS in SDM.
+        MSR_NEHALEM_MC18_STATUS is defined as MSR_MC18_STATUS in SDM.
+        MSR_NEHALEM_MC19_STATUS is defined as MSR_MC19_STATUS in SDM.
+        MSR_NEHALEM_MC20_STATUS is defined as MSR_MC20_STATUS in SDM.
+        MSR_NEHALEM_MC21_STATUS is defined as MSR_MC21_STATUS in SDM.
   @{
 **/
 #define MSR_NEHALEM_MC3_STATUS                   0x0000040D
@@ -1379,6 +1466,25 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_MC3_ADDR);
   AsmWriteMsr64 (MSR_NEHALEM_MC3_ADDR, Msr);
   @endcode
+  @note MSR_NEHALEM_MC3_ADDR  is defined as MSR_MC3_ADDR  in SDM.
+        MSR_NEHALEM_MC4_ADDR  is defined as MSR_MC4_ADDR  in SDM.
+        MSR_NEHALEM_MC5_ADDR  is defined as MSR_MC5_ADDR  in SDM.
+        MSR_NEHALEM_MC6_ADDR  is defined as MSR_MC6_ADDR  in SDM.
+        MSR_NEHALEM_MC7_ADDR  is defined as MSR_MC7_ADDR  in SDM.
+        MSR_NEHALEM_MC8_ADDR  is defined as MSR_MC8_ADDR  in SDM.
+        MSR_NEHALEM_MC9_ADDR  is defined as MSR_MC9_ADDR  in SDM.
+        MSR_NEHALEM_MC10_ADDR is defined as MSR_MC10_ADDR in SDM.
+        MSR_NEHALEM_MC11_ADDR is defined as MSR_MC11_ADDR in SDM.
+        MSR_NEHALEM_MC12_ADDR is defined as MSR_MC12_ADDR in SDM.
+        MSR_NEHALEM_MC13_ADDR is defined as MSR_MC13_ADDR in SDM.
+        MSR_NEHALEM_MC14_ADDR is defined as MSR_MC14_ADDR in SDM.
+        MSR_NEHALEM_MC15_ADDR is defined as MSR_MC15_ADDR in SDM.
+        MSR_NEHALEM_MC16_ADDR is defined as MSR_MC16_ADDR in SDM.
+        MSR_NEHALEM_MC17_ADDR is defined as MSR_MC17_ADDR in SDM.
+        MSR_NEHALEM_MC18_ADDR is defined as MSR_MC18_ADDR in SDM.
+        MSR_NEHALEM_MC19_ADDR is defined as MSR_MC19_ADDR in SDM.
+        MSR_NEHALEM_MC20_ADDR is defined as MSR_MC20_ADDR in SDM.
+        MSR_NEHALEM_MC21_ADDR is defined as MSR_MC21_ADDR in SDM.
   @{
 **/
 #define MSR_NEHALEM_MC3_ADDR                     0x0000040E
@@ -1422,6 +1528,22 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_LASTBRANCH_0_FROM_IP);
   AsmWriteMsr64 (MSR_NEHALEM_LASTBRANCH_0_FROM_IP, Msr);
   @endcode
+  @note MSR_NEHALEM_LASTBRANCH_0_FROM_IP  is defined as MSR_LASTBRANCH_0_FROM_IP  in SDM.
+        MSR_NEHALEM_LASTBRANCH_1_FROM_IP  is defined as MSR_LASTBRANCH_1_FROM_IP  in SDM.
+        MSR_NEHALEM_LASTBRANCH_2_FROM_IP  is defined as MSR_LASTBRANCH_2_FROM_IP  in SDM.
+        MSR_NEHALEM_LASTBRANCH_3_FROM_IP  is defined as MSR_LASTBRANCH_3_FROM_IP  in SDM.
+        MSR_NEHALEM_LASTBRANCH_4_FROM_IP  is defined as MSR_LASTBRANCH_4_FROM_IP  in SDM.
+        MSR_NEHALEM_LASTBRANCH_5_FROM_IP  is defined as MSR_LASTBRANCH_5_FROM_IP  in SDM.
+        MSR_NEHALEM_LASTBRANCH_6_FROM_IP  is defined as MSR_LASTBRANCH_6_FROM_IP  in SDM.
+        MSR_NEHALEM_LASTBRANCH_7_FROM_IP  is defined as MSR_LASTBRANCH_7_FROM_IP  in SDM.
+        MSR_NEHALEM_LASTBRANCH_8_FROM_IP  is defined as MSR_LASTBRANCH_8_FROM_IP  in SDM.
+        MSR_NEHALEM_LASTBRANCH_9_FROM_IP  is defined as MSR_LASTBRANCH_9_FROM_IP  in SDM.
+        MSR_NEHALEM_LASTBRANCH_10_FROM_IP is defined as MSR_LASTBRANCH_10_FROM_IP in SDM.
+        MSR_NEHALEM_LASTBRANCH_11_FROM_IP is defined as MSR_LASTBRANCH_11_FROM_IP in SDM.
+        MSR_NEHALEM_LASTBRANCH_12_FROM_IP is defined as MSR_LASTBRANCH_12_FROM_IP in SDM.
+        MSR_NEHALEM_LASTBRANCH_13_FROM_IP is defined as MSR_LASTBRANCH_13_FROM_IP in SDM.
+        MSR_NEHALEM_LASTBRANCH_14_FROM_IP is defined as MSR_LASTBRANCH_14_FROM_IP in SDM.
+        MSR_NEHALEM_LASTBRANCH_15_FROM_IP is defined as MSR_LASTBRANCH_15_FROM_IP in SDM.
   @{
 **/
 #define MSR_NEHALEM_LASTBRANCH_0_FROM_IP         0x00000680
@@ -1460,6 +1582,22 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_LASTBRANCH_0_TO_IP);
   AsmWriteMsr64 (MSR_NEHALEM_LASTBRANCH_0_TO_IP, Msr);
   @endcode
+  @note MSR_NEHALEM_LASTBRANCH_0_TO_IP  is defined as MSR_LASTBRANCH_0_TO_IP  in SDM.
+        MSR_NEHALEM_LASTBRANCH_1_TO_IP  is defined as MSR_LASTBRANCH_1_TO_IP  in SDM.
+        MSR_NEHALEM_LASTBRANCH_2_TO_IP  is defined as MSR_LASTBRANCH_2_TO_IP  in SDM.
+        MSR_NEHALEM_LASTBRANCH_3_TO_IP  is defined as MSR_LASTBRANCH_3_TO_IP  in SDM.
+        MSR_NEHALEM_LASTBRANCH_4_TO_IP  is defined as MSR_LASTBRANCH_4_TO_IP  in SDM.
+        MSR_NEHALEM_LASTBRANCH_5_TO_IP  is defined as MSR_LASTBRANCH_5_TO_IP  in SDM.
+        MSR_NEHALEM_LASTBRANCH_6_TO_IP  is defined as MSR_LASTBRANCH_6_TO_IP  in SDM.
+        MSR_NEHALEM_LASTBRANCH_7_TO_IP  is defined as MSR_LASTBRANCH_7_TO_IP  in SDM.
+        MSR_NEHALEM_LASTBRANCH_8_TO_IP  is defined as MSR_LASTBRANCH_8_TO_IP  in SDM.
+        MSR_NEHALEM_LASTBRANCH_9_TO_IP  is defined as MSR_LASTBRANCH_9_TO_IP  in SDM.
+        MSR_NEHALEM_LASTBRANCH_10_TO_IP is defined as MSR_LASTBRANCH_10_TO_IP in SDM.
+        MSR_NEHALEM_LASTBRANCH_11_TO_IP is defined as MSR_LASTBRANCH_11_TO_IP in SDM.
+        MSR_NEHALEM_LASTBRANCH_12_TO_IP is defined as MSR_LASTBRANCH_12_TO_IP in SDM.
+        MSR_NEHALEM_LASTBRANCH_13_TO_IP is defined as MSR_LASTBRANCH_13_TO_IP in SDM.
+        MSR_NEHALEM_LASTBRANCH_14_TO_IP is defined as MSR_LASTBRANCH_14_TO_IP in SDM.
+        MSR_NEHALEM_LASTBRANCH_15_TO_IP is defined as MSR_LASTBRANCH_15_TO_IP in SDM.
   @{
 **/
 #define MSR_NEHALEM_LASTBRANCH_0_TO_IP           0x000006C0
@@ -1497,6 +1635,7 @@ typedef union {
   Msr.Uint64 = AsmReadMsr64 (MSR_NEHALEM_GQ_SNOOP_MESF);
   AsmWriteMsr64 (MSR_NEHALEM_GQ_SNOOP_MESF, Msr.Uint64);
   @endcode
+  @note MSR_NEHALEM_GQ_SNOOP_MESF is defined as MSR_GQ_SNOOP_MESF in SDM.
 **/
 #define MSR_NEHALEM_GQ_SNOOP_MESF                0x00000301
 
@@ -1569,6 +1708,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_UNCORE_PERF_GLOBAL_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_UNCORE_PERF_GLOBAL_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_UNCORE_PERF_GLOBAL_CTRL is defined as MSR_UNCORE_PERF_GLOBAL_CTRL in SDM.
 **/
 #define MSR_NEHALEM_UNCORE_PERF_GLOBAL_CTRL      0x00000391
 
@@ -1588,6 +1728,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_UNCORE_PERF_GLOBAL_STATUS);
   AsmWriteMsr64 (MSR_NEHALEM_UNCORE_PERF_GLOBAL_STATUS, Msr);
   @endcode
+  @note MSR_NEHALEM_UNCORE_PERF_GLOBAL_STATUS is defined as MSR_UNCORE_PERF_GLOBAL_STATUS in SDM.
 **/
 #define MSR_NEHALEM_UNCORE_PERF_GLOBAL_STATUS    0x00000392
 
@@ -1607,6 +1748,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_UNCORE_PERF_GLOBAL_OVF_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_UNCORE_PERF_GLOBAL_OVF_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_UNCORE_PERF_GLOBAL_OVF_CTRL is defined as MSR_UNCORE_PERF_GLOBAL_OVF_CTRL in SDM.
 **/
 #define MSR_NEHALEM_UNCORE_PERF_GLOBAL_OVF_CTRL  0x00000393
 
@@ -1626,6 +1768,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_UNCORE_FIXED_CTR0);
   AsmWriteMsr64 (MSR_NEHALEM_UNCORE_FIXED_CTR0, Msr);
   @endcode
+  @note MSR_NEHALEM_UNCORE_FIXED_CTR0 is defined as MSR_UNCORE_FIXED_CTR0 in SDM.
 **/
 #define MSR_NEHALEM_UNCORE_FIXED_CTR0            0x00000394
 
@@ -1645,6 +1788,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_UNCORE_FIXED_CTR_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_UNCORE_FIXED_CTR_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_UNCORE_FIXED_CTR_CTRL is defined as MSR_UNCORE_FIXED_CTR_CTRL in SDM.
 **/
 #define MSR_NEHALEM_UNCORE_FIXED_CTR_CTRL        0x00000395
 
@@ -1663,6 +1807,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_UNCORE_ADDR_OPCODE_MATCH);
   AsmWriteMsr64 (MSR_NEHALEM_UNCORE_ADDR_OPCODE_MATCH, Msr);
   @endcode
+  @note MSR_NEHALEM_UNCORE_ADDR_OPCODE_MATCH is defined as MSR_UNCORE_ADDR_OPCODE_MATCH in SDM.
 **/
 #define MSR_NEHALEM_UNCORE_ADDR_OPCODE_MATCH     0x00000396
 
@@ -1682,6 +1827,14 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_UNCORE_PMC0);
   AsmWriteMsr64 (MSR_NEHALEM_UNCORE_PMC0, Msr);
   @endcode
+  @note MSR_NEHALEM_UNCORE_PMC0 is defined as MSR_UNCORE_PMC0 in SDM.
+        MSR_NEHALEM_UNCORE_PMC1 is defined as MSR_UNCORE_PMC1 in SDM.
+        MSR_NEHALEM_UNCORE_PMC2 is defined as MSR_UNCORE_PMC2 in SDM.
+        MSR_NEHALEM_UNCORE_PMC3 is defined as MSR_UNCORE_PMC3 in SDM.
+        MSR_NEHALEM_UNCORE_PMC4 is defined as MSR_UNCORE_PMC4 in SDM.
+        MSR_NEHALEM_UNCORE_PMC5 is defined as MSR_UNCORE_PMC5 in SDM.
+        MSR_NEHALEM_UNCORE_PMC6 is defined as MSR_UNCORE_PMC6 in SDM.
+        MSR_NEHALEM_UNCORE_PMC7 is defined as MSR_UNCORE_PMC7 in SDM.
   @{
 **/
 #define MSR_NEHALEM_UNCORE_PMC0                  0x000003B0
@@ -1709,6 +1862,14 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_UNCORE_PERFEVTSEL0);
   AsmWriteMsr64 (MSR_NEHALEM_UNCORE_PERFEVTSEL0, Msr);
   @endcode
+  @note MSR_NEHALEM_UNCORE_PERFEVTSEL0 is defined as MSR_UNCORE_PERFEVTSEL0 in SDM.
+        MSR_NEHALEM_UNCORE_PERFEVTSEL1 is defined as MSR_UNCORE_PERFEVTSEL1 in SDM.
+        MSR_NEHALEM_UNCORE_PERFEVTSEL2 is defined as MSR_UNCORE_PERFEVTSEL2 in SDM.
+        MSR_NEHALEM_UNCORE_PERFEVTSEL3 is defined as MSR_UNCORE_PERFEVTSEL3 in SDM.
+        MSR_NEHALEM_UNCORE_PERFEVTSEL4 is defined as MSR_UNCORE_PERFEVTSEL4 in SDM.
+        MSR_NEHALEM_UNCORE_PERFEVTSEL5 is defined as MSR_UNCORE_PERFEVTSEL5 in SDM.
+        MSR_NEHALEM_UNCORE_PERFEVTSEL6 is defined as MSR_UNCORE_PERFEVTSEL6 in SDM.
+        MSR_NEHALEM_UNCORE_PERFEVTSEL7 is defined as MSR_UNCORE_PERFEVTSEL7 in SDM.
   @{
 **/
 #define MSR_NEHALEM_UNCORE_PERFEVTSEL0           0x000003C0
@@ -1736,6 +1897,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_FIXED_CTR);
   AsmWriteMsr64 (MSR_NEHALEM_W_PMON_FIXED_CTR, Msr);
   @endcode
+  @note MSR_NEHALEM_W_PMON_FIXED_CTR is defined as MSR_W_PMON_FIXED_CTR in SDM.
 **/
 #define MSR_NEHALEM_W_PMON_FIXED_CTR             0x00000394
 
@@ -1754,6 +1916,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_FIXED_CTR_CTL);
   AsmWriteMsr64 (MSR_NEHALEM_W_PMON_FIXED_CTR_CTL, Msr);
   @endcode
+  @note MSR_NEHALEM_W_PMON_FIXED_CTR_CTL is defined as MSR_W_PMON_FIXED_CTR_CTL in SDM.
 **/
 #define MSR_NEHALEM_W_PMON_FIXED_CTR_CTL         0x00000395
 
@@ -1772,6 +1935,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_U_PMON_GLOBAL_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_U_PMON_GLOBAL_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_U_PMON_GLOBAL_CTRL is defined as MSR_U_PMON_GLOBAL_CTRL in SDM.
 **/
 #define MSR_NEHALEM_U_PMON_GLOBAL_CTRL           0x00000C00
 
@@ -1790,6 +1954,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_U_PMON_GLOBAL_STATUS);
   AsmWriteMsr64 (MSR_NEHALEM_U_PMON_GLOBAL_STATUS, Msr);
   @endcode
+  @note MSR_NEHALEM_U_PMON_GLOBAL_STATUS is defined as MSR_U_PMON_GLOBAL_STATUS in SDM.
 **/
 #define MSR_NEHALEM_U_PMON_GLOBAL_STATUS         0x00000C01
 
@@ -1808,6 +1973,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_U_PMON_GLOBAL_OVF_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_U_PMON_GLOBAL_OVF_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_U_PMON_GLOBAL_OVF_CTRL is defined as MSR_U_PMON_GLOBAL_OVF_CTRL in SDM.
 **/
 #define MSR_NEHALEM_U_PMON_GLOBAL_OVF_CTRL       0x00000C02
 
@@ -1826,6 +1992,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_U_PMON_EVNT_SEL);
   AsmWriteMsr64 (MSR_NEHALEM_U_PMON_EVNT_SEL, Msr);
   @endcode
+  @note MSR_NEHALEM_U_PMON_EVNT_SEL is defined as MSR_U_PMON_EVNT_SEL in SDM.
 **/
 #define MSR_NEHALEM_U_PMON_EVNT_SEL              0x00000C10
 
@@ -1844,6 +2011,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_U_PMON_CTR);
   AsmWriteMsr64 (MSR_NEHALEM_U_PMON_CTR, Msr);
   @endcode
+  @note MSR_NEHALEM_U_PMON_CTR is defined as MSR_U_PMON_CTR in SDM.
 **/
 #define MSR_NEHALEM_U_PMON_CTR                   0x00000C11
 
@@ -1862,6 +2030,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_BOX_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_BOX_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_B0_PMON_BOX_CTRL is defined as MSR_B0_PMON_BOX_CTRL in SDM.
 **/
 #define MSR_NEHALEM_B0_PMON_BOX_CTRL             0x00000C20
 
@@ -1880,6 +2049,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_BOX_STATUS);
   AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_BOX_STATUS, Msr);
   @endcode
+  @note MSR_NEHALEM_B0_PMON_BOX_STATUS is defined as MSR_B0_PMON_BOX_STATUS in SDM.
 **/
 #define MSR_NEHALEM_B0_PMON_BOX_STATUS           0x00000C21
 
@@ -1898,6 +2068,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_BOX_OVF_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_BOX_OVF_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_B0_PMON_BOX_OVF_CTRL is defined as MSR_B0_PMON_BOX_OVF_CTRL in SDM.
 **/
 #define MSR_NEHALEM_B0_PMON_BOX_OVF_CTRL         0x00000C22
 
@@ -1916,6 +2087,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_EVNT_SEL0);
   AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_EVNT_SEL0, Msr);
   @endcode
+  @note MSR_NEHALEM_B0_PMON_EVNT_SEL0 is defined as MSR_B0_PMON_EVNT_SEL0 in SDM.
 **/
 #define MSR_NEHALEM_B0_PMON_EVNT_SEL0            0x00000C30
 
@@ -1934,6 +2106,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_CTR0);
   AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_CTR0, Msr);
   @endcode
+  @note MSR_NEHALEM_B0_PMON_CTR0 is defined as MSR_B0_PMON_CTR0 in SDM.
 **/
 #define MSR_NEHALEM_B0_PMON_CTR0                 0x00000C31
 
@@ -1952,6 +2125,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_EVNT_SEL1);
   AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_EVNT_SEL1, Msr);
   @endcode
+  @note MSR_NEHALEM_B0_PMON_EVNT_SEL1 is defined as MSR_B0_PMON_EVNT_SEL1 in SDM.
 **/
 #define MSR_NEHALEM_B0_PMON_EVNT_SEL1            0x00000C32
 
@@ -1970,6 +2144,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_CTR1);
   AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_CTR1, Msr);
   @endcode
+  @note MSR_NEHALEM_B0_PMON_CTR1 is defined as MSR_B0_PMON_CTR1 in SDM.
 **/
 #define MSR_NEHALEM_B0_PMON_CTR1                 0x00000C33
 
@@ -1988,6 +2163,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_EVNT_SEL2);
   AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_EVNT_SEL2, Msr);
   @endcode
+  @note MSR_NEHALEM_B0_PMON_EVNT_SEL2 is defined as MSR_B0_PMON_EVNT_SEL2 in SDM.
 **/
 #define MSR_NEHALEM_B0_PMON_EVNT_SEL2            0x00000C34
 
@@ -2006,6 +2182,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_CTR2);
   AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_CTR2, Msr);
   @endcode
+  @note MSR_NEHALEM_B0_PMON_CTR2 is defined as MSR_B0_PMON_CTR2 in SDM.
 **/
 #define MSR_NEHALEM_B0_PMON_CTR2                 0x00000C35
 
@@ -2024,6 +2201,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_EVNT_SEL3);
   AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_EVNT_SEL3, Msr);
   @endcode
+  @note MSR_NEHALEM_B0_PMON_EVNT_SEL3 is defined as MSR_B0_PMON_EVNT_SEL3 in SDM.
 **/
 #define MSR_NEHALEM_B0_PMON_EVNT_SEL3            0x00000C36
 
@@ -2042,6 +2220,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_CTR3);
   AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_CTR3, Msr);
   @endcode
+  @note MSR_NEHALEM_B0_PMON_CTR3 is defined as MSR_B0_PMON_CTR3 in SDM.
 **/
 #define MSR_NEHALEM_B0_PMON_CTR3                 0x00000C37
 
@@ -2060,6 +2239,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_BOX_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_BOX_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_S0_PMON_BOX_CTRL is defined as MSR_S0_PMON_BOX_CTRL in SDM.
 **/
 #define MSR_NEHALEM_S0_PMON_BOX_CTRL             0x00000C40
 
@@ -2078,6 +2258,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_BOX_STATUS);
   AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_BOX_STATUS, Msr);
   @endcode
+  @note MSR_NEHALEM_S0_PMON_BOX_STATUS is defined as MSR_S0_PMON_BOX_STATUS in SDM.
 **/
 #define MSR_NEHALEM_S0_PMON_BOX_STATUS           0x00000C41
 
@@ -2096,6 +2277,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_BOX_OVF_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_BOX_OVF_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_S0_PMON_BOX_OVF_CTRL is defined as MSR_S0_PMON_BOX_OVF_CTRL in SDM.
 **/
 #define MSR_NEHALEM_S0_PMON_BOX_OVF_CTRL         0x00000C42
 
@@ -2114,6 +2296,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_EVNT_SEL0);
   AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_EVNT_SEL0, Msr);
   @endcode
+  @note MSR_NEHALEM_S0_PMON_EVNT_SEL0 is defined as MSR_S0_PMON_EVNT_SEL0 in SDM.
 **/
 #define MSR_NEHALEM_S0_PMON_EVNT_SEL0            0x00000C50
 
@@ -2132,6 +2315,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_CTR0);
   AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_CTR0, Msr);
   @endcode
+  @note MSR_NEHALEM_S0_PMON_CTR0 is defined as MSR_S0_PMON_CTR0 in SDM.
 **/
 #define MSR_NEHALEM_S0_PMON_CTR0                 0x00000C51
 
@@ -2150,6 +2334,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_EVNT_SEL1);
   AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_EVNT_SEL1, Msr);
   @endcode
+  @note MSR_NEHALEM_S0_PMON_EVNT_SEL1 is defined as MSR_S0_PMON_EVNT_SEL1 in SDM.
 **/
 #define MSR_NEHALEM_S0_PMON_EVNT_SEL1            0x00000C52
 
@@ -2168,6 +2353,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_CTR1);
   AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_CTR1, Msr);
   @endcode
+  @note MSR_NEHALEM_S0_PMON_CTR1 is defined as MSR_S0_PMON_CTR1 in SDM.
 **/
 #define MSR_NEHALEM_S0_PMON_CTR1                 0x00000C53
 
@@ -2186,6 +2372,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_EVNT_SEL2);
   AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_EVNT_SEL2, Msr);
   @endcode
+  @note MSR_NEHALEM_S0_PMON_EVNT_SEL2 is defined as MSR_S0_PMON_EVNT_SEL2 in SDM.
 **/
 #define MSR_NEHALEM_S0_PMON_EVNT_SEL2            0x00000C54
 
@@ -2204,6 +2391,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_CTR2);
   AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_CTR2, Msr);
   @endcode
+  @note MSR_NEHALEM_S0_PMON_CTR2 is defined as MSR_S0_PMON_CTR2 in SDM.
 **/
 #define MSR_NEHALEM_S0_PMON_CTR2                 0x00000C55
 
@@ -2222,6 +2410,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_EVNT_SEL3);
   AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_EVNT_SEL3, Msr);
   @endcode
+  @note MSR_NEHALEM_S0_PMON_EVNT_SEL3 is defined as MSR_S0_PMON_EVNT_SEL3 in SDM.
 **/
 #define MSR_NEHALEM_S0_PMON_EVNT_SEL3            0x00000C56
 
@@ -2240,6 +2429,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_CTR3);
   AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_CTR3, Msr);
   @endcode
+  @note MSR_NEHALEM_S0_PMON_CTR3 is defined as MSR_S0_PMON_CTR3 in SDM.
 **/
 #define MSR_NEHALEM_S0_PMON_CTR3                 0x00000C57
 
@@ -2258,6 +2448,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_BOX_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_BOX_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_B1_PMON_BOX_CTRL is defined as MSR_B1_PMON_BOX_CTRL in SDM.
 **/
 #define MSR_NEHALEM_B1_PMON_BOX_CTRL             0x00000C60
 
@@ -2276,6 +2467,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_BOX_STATUS);
   AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_BOX_STATUS, Msr);
   @endcode
+  @note MSR_NEHALEM_B1_PMON_BOX_STATUS is defined as MSR_B1_PMON_BOX_STATUS in SDM.
 **/
 #define MSR_NEHALEM_B1_PMON_BOX_STATUS           0x00000C61
 
@@ -2294,6 +2486,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_BOX_OVF_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_BOX_OVF_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_B1_PMON_BOX_OVF_CTRL is defined as MSR_B1_PMON_BOX_OVF_CTRL in SDM.
 **/
 #define MSR_NEHALEM_B1_PMON_BOX_OVF_CTRL         0x00000C62
 
@@ -2312,6 +2505,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_EVNT_SEL0);
   AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_EVNT_SEL0, Msr);
   @endcode
+  @note MSR_NEHALEM_B1_PMON_EVNT_SEL0 is defined as MSR_B1_PMON_EVNT_SEL0 in SDM.
 **/
 #define MSR_NEHALEM_B1_PMON_EVNT_SEL0            0x00000C70
 
@@ -2330,6 +2524,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_CTR0);
   AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_CTR0, Msr);
   @endcode
+  @note MSR_NEHALEM_B1_PMON_CTR0 is defined as MSR_B1_PMON_CTR0 in SDM.
 **/
 #define MSR_NEHALEM_B1_PMON_CTR0                 0x00000C71
 
@@ -2348,6 +2543,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_EVNT_SEL1);
   AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_EVNT_SEL1, Msr);
   @endcode
+  @note MSR_NEHALEM_B1_PMON_EVNT_SEL1 is defined as MSR_B1_PMON_EVNT_SEL1 in SDM.
 **/
 #define MSR_NEHALEM_B1_PMON_EVNT_SEL1            0x00000C72
 
@@ -2366,6 +2562,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_CTR1);
   AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_CTR1, Msr);
   @endcode
+  @note MSR_NEHALEM_B1_PMON_CTR1 is defined as MSR_B1_PMON_CTR1 in SDM.
 **/
 #define MSR_NEHALEM_B1_PMON_CTR1                 0x00000C73
 
@@ -2384,6 +2581,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_EVNT_SEL2);
   AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_EVNT_SEL2, Msr);
   @endcode
+  @note MSR_NEHALEM_B1_PMON_EVNT_SEL2 is defined as MSR_B1_PMON_EVNT_SEL2 in SDM.
 **/
 #define MSR_NEHALEM_B1_PMON_EVNT_SEL2            0x00000C74
 
@@ -2402,6 +2600,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_CTR2);
   AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_CTR2, Msr);
   @endcode
+  @note MSR_NEHALEM_B1_PMON_CTR2 is defined as MSR_B1_PMON_CTR2 in SDM.
 **/
 #define MSR_NEHALEM_B1_PMON_CTR2                 0x00000C75
 
@@ -2420,6 +2619,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_EVNT_SEL3);
   AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_EVNT_SEL3, Msr);
   @endcode
+  @note MSR_NEHALEM_B1_PMON_EVNT_SEL3 is defined as MSR_B1_PMON_EVNT_SEL3 in SDM.
 **/
 #define MSR_NEHALEM_B1_PMON_EVNT_SEL3            0x00000C76
 
@@ -2438,6 +2638,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_CTR3);
   AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_CTR3, Msr);
   @endcode
+  @note MSR_NEHALEM_B1_PMON_CTR3 is defined as MSR_B1_PMON_CTR3 in SDM.
 **/
 #define MSR_NEHALEM_B1_PMON_CTR3                 0x00000C77
 
@@ -2456,6 +2657,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_BOX_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_W_PMON_BOX_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_W_PMON_BOX_CTRL is defined as MSR_W_PMON_BOX_CTRL in SDM.
 **/
 #define MSR_NEHALEM_W_PMON_BOX_CTRL              0x00000C80
 
@@ -2474,6 +2676,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_BOX_STATUS);
   AsmWriteMsr64 (MSR_NEHALEM_W_PMON_BOX_STATUS, Msr);
   @endcode
+  @note MSR_NEHALEM_W_PMON_BOX_STATUS is defined as MSR_W_PMON_BOX_STATUS in SDM.
 **/
 #define MSR_NEHALEM_W_PMON_BOX_STATUS            0x00000C81
 
@@ -2492,6 +2695,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_BOX_OVF_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_W_PMON_BOX_OVF_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_W_PMON_BOX_OVF_CTRL is defined as MSR_W_PMON_BOX_OVF_CTRL in SDM.
 **/
 #define MSR_NEHALEM_W_PMON_BOX_OVF_CTRL          0x00000C82
 
@@ -2510,6 +2714,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_EVNT_SEL0);
   AsmWriteMsr64 (MSR_NEHALEM_W_PMON_EVNT_SEL0, Msr);
   @endcode
+  @note MSR_NEHALEM_W_PMON_EVNT_SEL0 is defined as MSR_W_PMON_EVNT_SEL0 in SDM.
 **/
 #define MSR_NEHALEM_W_PMON_EVNT_SEL0             0x00000C90
 
@@ -2528,6 +2733,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_CTR0);
   AsmWriteMsr64 (MSR_NEHALEM_W_PMON_CTR0, Msr);
   @endcode
+  @note MSR_NEHALEM_W_PMON_CTR0 is defined as MSR_W_PMON_CTR0 in SDM.
 **/
 #define MSR_NEHALEM_W_PMON_CTR0                  0x00000C91
 
@@ -2546,6 +2752,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_EVNT_SEL1);
   AsmWriteMsr64 (MSR_NEHALEM_W_PMON_EVNT_SEL1, Msr);
   @endcode
+  @note MSR_NEHALEM_W_PMON_EVNT_SEL1 is defined as MSR_W_PMON_EVNT_SEL1 in SDM.
 **/
 #define MSR_NEHALEM_W_PMON_EVNT_SEL1             0x00000C92
 
@@ -2564,6 +2771,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_CTR1);
   AsmWriteMsr64 (MSR_NEHALEM_W_PMON_CTR1, Msr);
   @endcode
+  @note MSR_NEHALEM_W_PMON_CTR1 is defined as MSR_W_PMON_CTR1 in SDM.
 **/
 #define MSR_NEHALEM_W_PMON_CTR1                  0x00000C93
 
@@ -2582,6 +2790,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_EVNT_SEL2);
   AsmWriteMsr64 (MSR_NEHALEM_W_PMON_EVNT_SEL2, Msr);
   @endcode
+  @note MSR_NEHALEM_W_PMON_EVNT_SEL2 is defined as MSR_W_PMON_EVNT_SEL2 in SDM.
 **/
 #define MSR_NEHALEM_W_PMON_EVNT_SEL2             0x00000C94
 
@@ -2600,6 +2809,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_CTR2);
   AsmWriteMsr64 (MSR_NEHALEM_W_PMON_CTR2, Msr);
   @endcode
+  @note MSR_NEHALEM_W_PMON_CTR2 is defined as MSR_W_PMON_CTR2 in SDM.
 **/
 #define MSR_NEHALEM_W_PMON_CTR2                  0x00000C95
 
@@ -2618,6 +2828,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_EVNT_SEL3);
   AsmWriteMsr64 (MSR_NEHALEM_W_PMON_EVNT_SEL3, Msr);
   @endcode
+  @note MSR_NEHALEM_W_PMON_EVNT_SEL3 is defined as MSR_W_PMON_EVNT_SEL3 in SDM.
 **/
 #define MSR_NEHALEM_W_PMON_EVNT_SEL3             0x00000C96
 
@@ -2636,6 +2847,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_W_PMON_CTR3);
   AsmWriteMsr64 (MSR_NEHALEM_W_PMON_CTR3, Msr);
   @endcode
+  @note MSR_NEHALEM_W_PMON_CTR3 is defined as MSR_W_PMON_CTR3 in SDM.
 **/
 #define MSR_NEHALEM_W_PMON_CTR3                  0x00000C97
 
@@ -2654,6 +2866,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_BOX_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_BOX_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_BOX_CTRL is defined as MSR_M0_PMON_BOX_CTRL in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_BOX_CTRL             0x00000CA0
 
@@ -2672,6 +2885,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_BOX_STATUS);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_BOX_STATUS, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_BOX_STATUS is defined as MSR_M0_PMON_BOX_STATUS in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_BOX_STATUS           0x00000CA1
 
@@ -2690,6 +2904,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_BOX_OVF_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_BOX_OVF_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_BOX_OVF_CTRL is defined as MSR_M0_PMON_BOX_OVF_CTRL in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_BOX_OVF_CTRL         0x00000CA2
 
@@ -2708,6 +2923,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_TIMESTAMP);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_TIMESTAMP, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_TIMESTAMP is defined as MSR_M0_PMON_TIMESTAMP in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_TIMESTAMP            0x00000CA4
 
@@ -2726,6 +2942,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_DSP);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_DSP, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_DSP is defined as MSR_M0_PMON_DSP in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_DSP                  0x00000CA5
 
@@ -2744,6 +2961,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_ISS);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_ISS, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_ISS is defined as MSR_M0_PMON_ISS in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_ISS                  0x00000CA6
 
@@ -2762,6 +2980,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_MAP);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_MAP, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_MAP is defined as MSR_M0_PMON_MAP in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_MAP                  0x00000CA7
 
@@ -2780,6 +2999,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_MSC_THR);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_MSC_THR, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_MSC_THR is defined as MSR_M0_PMON_MSC_THR in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_MSC_THR              0x00000CA8
 
@@ -2798,6 +3018,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_PGT);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_PGT, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_PGT is defined as MSR_M0_PMON_PGT in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_PGT                  0x00000CA9
 
@@ -2816,6 +3037,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_PLD);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_PLD, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_PLD is defined as MSR_M0_PMON_PLD in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_PLD                  0x00000CAA
 
@@ -2834,6 +3056,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_ZDP);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_ZDP, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_ZDP is defined as MSR_M0_PMON_ZDP in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_ZDP                  0x00000CAB
 
@@ -2852,6 +3075,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL0);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL0, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_EVNT_SEL0 is defined as MSR_M0_PMON_EVNT_SEL0 in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_EVNT_SEL0            0x00000CB0
 
@@ -2870,6 +3094,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_CTR0);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_CTR0, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_CTR0 is defined as MSR_M0_PMON_CTR0 in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_CTR0                 0x00000CB1
 
@@ -2888,6 +3113,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL1);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL1, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_EVNT_SEL1 is defined as MSR_M0_PMON_EVNT_SEL1 in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_EVNT_SEL1            0x00000CB2
 
@@ -2906,6 +3132,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_CTR1);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_CTR1, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_CTR1 is defined as MSR_M0_PMON_CTR1 in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_CTR1                 0x00000CB3
 
@@ -2924,6 +3151,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL2);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL2, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_EVNT_SEL2 is defined as MSR_M0_PMON_EVNT_SEL2 in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_EVNT_SEL2            0x00000CB4
 
@@ -2942,6 +3170,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_CTR2);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_CTR2, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_CTR2 is defined as MSR_M0_PMON_CTR2 in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_CTR2                 0x00000CB5
 
@@ -2960,6 +3189,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL3);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL3, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_EVNT_SEL3 is defined as MSR_M0_PMON_EVNT_SEL3 in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_EVNT_SEL3            0x00000CB6
 
@@ -2978,6 +3208,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_CTR3);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_CTR3, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_CTR3 is defined as MSR_M0_PMON_CTR3 in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_CTR3                 0x00000CB7
 
@@ -2996,6 +3227,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL4);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL4, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_EVNT_SEL4 is defined as MSR_M0_PMON_EVNT_SEL4 in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_EVNT_SEL4            0x00000CB8
 
@@ -3014,6 +3246,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_CTR4);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_CTR4, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_CTR4 is defined as MSR_M0_PMON_CTR4 in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_CTR4                 0x00000CB9
 
@@ -3032,6 +3265,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL5);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_EVNT_SEL5, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_EVNT_SEL5 is defined as MSR_M0_PMON_EVNT_SEL5 in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_EVNT_SEL5            0x00000CBA
 
@@ -3050,6 +3284,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_CTR5);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_CTR5, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_CTR5 is defined as MSR_M0_PMON_CTR5 in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_CTR5                 0x00000CBB
 
@@ -3068,6 +3303,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_BOX_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_BOX_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_S1_PMON_BOX_CTRL is defined as MSR_S1_PMON_BOX_CTRL in SDM.
 **/
 #define MSR_NEHALEM_S1_PMON_BOX_CTRL             0x00000CC0
 
@@ -3086,6 +3322,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_BOX_STATUS);
   AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_BOX_STATUS, Msr);
   @endcode
+  @note MSR_NEHALEM_S1_PMON_BOX_STATUS is defined as MSR_S1_PMON_BOX_STATUS in SDM.
 **/
 #define MSR_NEHALEM_S1_PMON_BOX_STATUS           0x00000CC1
 
@@ -3104,6 +3341,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_BOX_OVF_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_BOX_OVF_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_S1_PMON_BOX_OVF_CTRL is defined as MSR_S1_PMON_BOX_OVF_CTRL in SDM.
 **/
 #define MSR_NEHALEM_S1_PMON_BOX_OVF_CTRL         0x00000CC2
 
@@ -3122,6 +3360,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_EVNT_SEL0);
   AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_EVNT_SEL0, Msr);
   @endcode
+  @note MSR_NEHALEM_S1_PMON_EVNT_SEL0 is defined as MSR_S1_PMON_EVNT_SEL0 in SDM.
 **/
 #define MSR_NEHALEM_S1_PMON_EVNT_SEL0            0x00000CD0
 
@@ -3140,6 +3379,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_CTR0);
   AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_CTR0, Msr);
   @endcode
+  @note MSR_NEHALEM_S1_PMON_CTR0 is defined as MSR_S1_PMON_CTR0 in SDM.
 **/
 #define MSR_NEHALEM_S1_PMON_CTR0                 0x00000CD1
 
@@ -3158,6 +3398,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_EVNT_SEL1);
   AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_EVNT_SEL1, Msr);
   @endcode
+  @note MSR_NEHALEM_S1_PMON_EVNT_SEL1 is defined as MSR_S1_PMON_EVNT_SEL1 in SDM.
 **/
 #define MSR_NEHALEM_S1_PMON_EVNT_SEL1            0x00000CD2
 
@@ -3176,6 +3417,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_CTR1);
   AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_CTR1, Msr);
   @endcode
+  @note MSR_NEHALEM_S1_PMON_CTR1 is defined as MSR_S1_PMON_CTR1 in SDM.
 **/
 #define MSR_NEHALEM_S1_PMON_CTR1                 0x00000CD3
 
@@ -3194,6 +3436,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_EVNT_SEL2);
   AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_EVNT_SEL2, Msr);
   @endcode
+  @note MSR_NEHALEM_S1_PMON_EVNT_SEL2 is defined as MSR_S1_PMON_EVNT_SEL2 in SDM.
 **/
 #define MSR_NEHALEM_S1_PMON_EVNT_SEL2            0x00000CD4
 
@@ -3212,6 +3455,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_CTR2);
   AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_CTR2, Msr);
   @endcode
+  @note MSR_NEHALEM_S1_PMON_CTR2 is defined as MSR_S1_PMON_CTR2 in SDM.
 **/
 #define MSR_NEHALEM_S1_PMON_CTR2                 0x00000CD5
 
@@ -3230,6 +3474,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_EVNT_SEL3);
   AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_EVNT_SEL3, Msr);
   @endcode
+  @note MSR_NEHALEM_S1_PMON_EVNT_SEL3 is defined as MSR_S1_PMON_EVNT_SEL3 in SDM.
 **/
 #define MSR_NEHALEM_S1_PMON_EVNT_SEL3            0x00000CD6
 
@@ -3248,6 +3493,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_CTR3);
   AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_CTR3, Msr);
   @endcode
+  @note MSR_NEHALEM_S1_PMON_CTR3 is defined as MSR_S1_PMON_CTR3 in SDM.
 **/
 #define MSR_NEHALEM_S1_PMON_CTR3                 0x00000CD7
 
@@ -3266,6 +3512,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_BOX_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_BOX_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_BOX_CTRL is defined as MSR_M1_PMON_BOX_CTRL in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_BOX_CTRL             0x00000CE0
 
@@ -3284,6 +3531,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_BOX_STATUS);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_BOX_STATUS, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_BOX_STATUS is defined as MSR_M1_PMON_BOX_STATUS in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_BOX_STATUS           0x00000CE1
 
@@ -3302,6 +3550,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_BOX_OVF_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_BOX_OVF_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_BOX_OVF_CTRL is defined as MSR_M1_PMON_BOX_OVF_CTRL in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_BOX_OVF_CTRL         0x00000CE2
 
@@ -3320,6 +3569,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_TIMESTAMP);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_TIMESTAMP, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_TIMESTAMP is defined as MSR_M1_PMON_TIMESTAMP in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_TIMESTAMP            0x00000CE4
 
@@ -3338,6 +3588,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_DSP);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_DSP, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_DSP is defined as MSR_M1_PMON_DSP in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_DSP                  0x00000CE5
 
@@ -3356,6 +3607,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_ISS);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_ISS, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_ISS is defined as MSR_M1_PMON_ISS in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_ISS                  0x00000CE6
 
@@ -3374,6 +3626,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_MAP);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_MAP, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_MAP is defined as MSR_M1_PMON_MAP in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_MAP                  0x00000CE7
 
@@ -3392,6 +3645,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_MSC_THR);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_MSC_THR, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_MSC_THR is defined as MSR_M1_PMON_MSC_THR in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_MSC_THR              0x00000CE8
 
@@ -3410,6 +3664,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_PGT);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_PGT, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_PGT is defined as MSR_M1_PMON_PGT in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_PGT                  0x00000CE9
 
@@ -3428,6 +3683,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_PLD);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_PLD, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_PLD is defined as MSR_M1_PMON_PLD in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_PLD                  0x00000CEA
 
@@ -3446,6 +3702,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_ZDP);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_ZDP, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_ZDP is defined as MSR_M1_PMON_ZDP in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_ZDP                  0x00000CEB
 
@@ -3464,6 +3721,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL0);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL0, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_EVNT_SEL0 is defined as MSR_M1_PMON_EVNT_SEL0 in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_EVNT_SEL0            0x00000CF0
 
@@ -3482,6 +3740,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_CTR0);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_CTR0, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_CTR0 is defined as MSR_M1_PMON_CTR0 in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_CTR0                 0x00000CF1
 
@@ -3500,6 +3759,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL1);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL1, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_EVNT_SEL1 is defined as MSR_M1_PMON_EVNT_SEL1 in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_EVNT_SEL1            0x00000CF2
 
@@ -3518,6 +3778,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_CTR1);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_CTR1, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_CTR1 is defined as MSR_M1_PMON_CTR1 in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_CTR1                 0x00000CF3
 
@@ -3536,6 +3797,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL2);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL2, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_EVNT_SEL2 is defined as MSR_M1_PMON_EVNT_SEL2 in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_EVNT_SEL2            0x00000CF4
 
@@ -3554,6 +3816,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_CTR2);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_CTR2, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_CTR2 is defined as MSR_M1_PMON_CTR2 in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_CTR2                 0x00000CF5
 
@@ -3572,6 +3835,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL3);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL3, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_EVNT_SEL3 is defined as MSR_M1_PMON_EVNT_SEL3 in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_EVNT_SEL3            0x00000CF6
 
@@ -3590,6 +3854,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_CTR3);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_CTR3, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_CTR3 is defined as MSR_M1_PMON_CTR3 in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_CTR3                 0x00000CF7
 
@@ -3608,6 +3873,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL4);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL4, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_EVNT_SEL4 is defined as MSR_M1_PMON_EVNT_SEL4 in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_EVNT_SEL4            0x00000CF8
 
@@ -3626,6 +3892,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_CTR4);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_CTR4, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_CTR4 is defined as MSR_M1_PMON_CTR4 in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_CTR4                 0x00000CF9
 
@@ -3644,6 +3911,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL5);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_EVNT_SEL5, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_EVNT_SEL5 is defined as MSR_M1_PMON_EVNT_SEL5 in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_EVNT_SEL5            0x00000CFA
 
@@ -3662,6 +3930,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_CTR5);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_CTR5, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_CTR5 is defined as MSR_M1_PMON_CTR5 in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_CTR5                 0x00000CFB
 
@@ -3680,6 +3949,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_BOX_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_BOX_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_C0_PMON_BOX_CTRL is defined as MSR_C0_PMON_BOX_CTRL in SDM.
 **/
 #define MSR_NEHALEM_C0_PMON_BOX_CTRL             0x00000D00
 
@@ -3698,6 +3968,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_BOX_STATUS);
   AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_BOX_STATUS, Msr);
   @endcode
+  @note MSR_NEHALEM_C0_PMON_BOX_STATUS is defined as MSR_C0_PMON_BOX_STATUS in SDM.
 **/
 #define MSR_NEHALEM_C0_PMON_BOX_STATUS           0x00000D01
 
@@ -3716,6 +3987,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_BOX_OVF_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_BOX_OVF_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_C0_PMON_BOX_OVF_CTRL is defined as MSR_C0_PMON_BOX_OVF_CTRL in SDM.
 **/
 #define MSR_NEHALEM_C0_PMON_BOX_OVF_CTRL         0x00000D02
 
@@ -3734,6 +4006,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL0);
   AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL0, Msr);
   @endcode
+  @note MSR_NEHALEM_C0_PMON_EVNT_SEL0 is defined as MSR_C0_PMON_EVNT_SEL0 in SDM.
 **/
 #define MSR_NEHALEM_C0_PMON_EVNT_SEL0            0x00000D10
 
@@ -3752,6 +4025,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_CTR0);
   AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_CTR0, Msr);
   @endcode
+  @note MSR_NEHALEM_C0_PMON_CTR0 is defined as MSR_C0_PMON_CTR0 in SDM.
 **/
 #define MSR_NEHALEM_C0_PMON_CTR0                 0x00000D11
 
@@ -3770,6 +4044,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL1);
   AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL1, Msr);
   @endcode
+  @note MSR_NEHALEM_C0_PMON_EVNT_SEL1 is defined as MSR_C0_PMON_EVNT_SEL1 in SDM.
 **/
 #define MSR_NEHALEM_C0_PMON_EVNT_SEL1            0x00000D12
 
@@ -3788,6 +4063,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_CTR1);
   AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_CTR1, Msr);
   @endcode
+  @note MSR_NEHALEM_C0_PMON_CTR1 is defined as MSR_C0_PMON_CTR1 in SDM.
 **/
 #define MSR_NEHALEM_C0_PMON_CTR1                 0x00000D13
 
@@ -3806,6 +4082,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL2);
   AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL2, Msr);
   @endcode
+  @note MSR_NEHALEM_C0_PMON_EVNT_SEL2 is defined as MSR_C0_PMON_EVNT_SEL2 in SDM.
 **/
 #define MSR_NEHALEM_C0_PMON_EVNT_SEL2            0x00000D14
 
@@ -3824,6 +4101,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_CTR2);
   AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_CTR2, Msr);
   @endcode
+  @note MSR_NEHALEM_C0_PMON_CTR2 is defined as MSR_C0_PMON_CTR2 in SDM.
 **/
 #define MSR_NEHALEM_C0_PMON_CTR2                 0x00000D15
 
@@ -3842,6 +4120,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL3);
   AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL3, Msr);
   @endcode
+  @note MSR_NEHALEM_C0_PMON_EVNT_SEL3 is defined as MSR_C0_PMON_EVNT_SEL3 in SDM.
 **/
 #define MSR_NEHALEM_C0_PMON_EVNT_SEL3            0x00000D16
 
@@ -3860,6 +4139,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_CTR3);
   AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_CTR3, Msr);
   @endcode
+  @note MSR_NEHALEM_C0_PMON_CTR3 is defined as MSR_C0_PMON_CTR3 in SDM.
 **/
 #define MSR_NEHALEM_C0_PMON_CTR3                 0x00000D17
 
@@ -3878,6 +4158,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL4);
   AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL4, Msr);
   @endcode
+  @note MSR_NEHALEM_C0_PMON_EVNT_SEL4 is defined as MSR_C0_PMON_EVNT_SEL4 in SDM.
 **/
 #define MSR_NEHALEM_C0_PMON_EVNT_SEL4            0x00000D18
 
@@ -3896,6 +4177,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_CTR4);
   AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_CTR4, Msr);
   @endcode
+  @note MSR_NEHALEM_C0_PMON_CTR4 is defined as MSR_C0_PMON_CTR4 in SDM.
 **/
 #define MSR_NEHALEM_C0_PMON_CTR4                 0x00000D19
 
@@ -3914,6 +4196,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL5);
   AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_EVNT_SEL5, Msr);
   @endcode
+  @note MSR_NEHALEM_C0_PMON_EVNT_SEL5 is defined as MSR_C0_PMON_EVNT_SEL5 in SDM.
 **/
 #define MSR_NEHALEM_C0_PMON_EVNT_SEL5            0x00000D1A
 
@@ -3932,6 +4215,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C0_PMON_CTR5);
   AsmWriteMsr64 (MSR_NEHALEM_C0_PMON_CTR5, Msr);
   @endcode
+  @note MSR_NEHALEM_C0_PMON_CTR5 is defined as MSR_C0_PMON_CTR5 in SDM.
 **/
 #define MSR_NEHALEM_C0_PMON_CTR5                 0x00000D1B
 
@@ -3950,6 +4234,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_BOX_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_BOX_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_C4_PMON_BOX_CTRL is defined as MSR_C4_PMON_BOX_CTRL in SDM.
 **/
 #define MSR_NEHALEM_C4_PMON_BOX_CTRL             0x00000D20
 
@@ -3968,6 +4253,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_BOX_STATUS);
   AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_BOX_STATUS, Msr);
   @endcode
+  @note MSR_NEHALEM_C4_PMON_BOX_STATUS is defined as MSR_C4_PMON_BOX_STATUS in SDM.
 **/
 #define MSR_NEHALEM_C4_PMON_BOX_STATUS           0x00000D21
 
@@ -3986,6 +4272,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_BOX_OVF_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_BOX_OVF_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_C4_PMON_BOX_OVF_CTRL is defined as MSR_C4_PMON_BOX_OVF_CTRL in SDM.
 **/
 #define MSR_NEHALEM_C4_PMON_BOX_OVF_CTRL         0x00000D22
 
@@ -4004,6 +4291,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL0);
   AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL0, Msr);
   @endcode
+  @note MSR_NEHALEM_C4_PMON_EVNT_SEL0 is defined as MSR_C4_PMON_EVNT_SEL0 in SDM.
 **/
 #define MSR_NEHALEM_C4_PMON_EVNT_SEL0            0x00000D30
 
@@ -4022,6 +4310,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_CTR0);
   AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_CTR0, Msr);
   @endcode
+  @note MSR_NEHALEM_C4_PMON_CTR0 is defined as MSR_C4_PMON_CTR0 in SDM.
 **/
 #define MSR_NEHALEM_C4_PMON_CTR0                 0x00000D31
 
@@ -4040,6 +4329,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL1);
   AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL1, Msr);
   @endcode
+  @note MSR_NEHALEM_C4_PMON_EVNT_SEL1 is defined as MSR_C4_PMON_EVNT_SEL1 in SDM.
 **/
 #define MSR_NEHALEM_C4_PMON_EVNT_SEL1            0x00000D32
 
@@ -4058,6 +4348,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_CTR1);
   AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_CTR1, Msr);
   @endcode
+  @note MSR_NEHALEM_C4_PMON_CTR1 is defined as MSR_C4_PMON_CTR1 in SDM.
 **/
 #define MSR_NEHALEM_C4_PMON_CTR1                 0x00000D33
 
@@ -4076,6 +4367,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL2);
   AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL2, Msr);
   @endcode
+  @note MSR_NEHALEM_C4_PMON_EVNT_SEL2 is defined as MSR_C4_PMON_EVNT_SEL2 in SDM.
 **/
 #define MSR_NEHALEM_C4_PMON_EVNT_SEL2            0x00000D34
 
@@ -4094,6 +4386,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_CTR2);
   AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_CTR2, Msr);
   @endcode
+  @note MSR_NEHALEM_C4_PMON_CTR2 is defined as MSR_C4_PMON_CTR2 in SDM.
 **/
 #define MSR_NEHALEM_C4_PMON_CTR2                 0x00000D35
 
@@ -4112,6 +4405,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL3);
   AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL3, Msr);
   @endcode
+  @note MSR_NEHALEM_C4_PMON_EVNT_SEL3 is defined as MSR_C4_PMON_EVNT_SEL3 in SDM.
 **/
 #define MSR_NEHALEM_C4_PMON_EVNT_SEL3            0x00000D36
 
@@ -4130,6 +4424,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_CTR3);
   AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_CTR3, Msr);
   @endcode
+  @note MSR_NEHALEM_C4_PMON_CTR3 is defined as MSR_C4_PMON_CTR3 in SDM.
 **/
 #define MSR_NEHALEM_C4_PMON_CTR3                 0x00000D37
 
@@ -4148,6 +4443,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL4);
   AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL4, Msr);
   @endcode
+  @note MSR_NEHALEM_C4_PMON_EVNT_SEL4 is defined as MSR_C4_PMON_EVNT_SEL4 in SDM.
 **/
 #define MSR_NEHALEM_C4_PMON_EVNT_SEL4            0x00000D38
 
@@ -4166,6 +4462,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_CTR4);
   AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_CTR4, Msr);
   @endcode
+  @note MSR_NEHALEM_C4_PMON_CTR4 is defined as MSR_C4_PMON_CTR4 in SDM.
 **/
 #define MSR_NEHALEM_C4_PMON_CTR4                 0x00000D39
 
@@ -4184,6 +4481,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL5);
   AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_EVNT_SEL5, Msr);
   @endcode
+  @note MSR_NEHALEM_C4_PMON_EVNT_SEL5 is defined as MSR_C4_PMON_EVNT_SEL5 in SDM.
 **/
 #define MSR_NEHALEM_C4_PMON_EVNT_SEL5            0x00000D3A
 
@@ -4202,6 +4500,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C4_PMON_CTR5);
   AsmWriteMsr64 (MSR_NEHALEM_C4_PMON_CTR5, Msr);
   @endcode
+  @note MSR_NEHALEM_C4_PMON_CTR5 is defined as MSR_C4_PMON_CTR5 in SDM.
 **/
 #define MSR_NEHALEM_C4_PMON_CTR5                 0x00000D3B
 
@@ -4220,6 +4519,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_BOX_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_BOX_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_C2_PMON_BOX_CTRL is defined as MSR_C2_PMON_BOX_CTRL in SDM.
 **/
 #define MSR_NEHALEM_C2_PMON_BOX_CTRL             0x00000D40
 
@@ -4238,6 +4538,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_BOX_STATUS);
   AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_BOX_STATUS, Msr);
   @endcode
+  @note MSR_NEHALEM_C2_PMON_BOX_STATUS is defined as MSR_C2_PMON_BOX_STATUS in SDM.
 **/
 #define MSR_NEHALEM_C2_PMON_BOX_STATUS           0x00000D41
 
@@ -4256,6 +4557,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_BOX_OVF_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_BOX_OVF_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_C2_PMON_BOX_OVF_CTRL is defined as MSR_C2_PMON_BOX_OVF_CTRL in SDM.
 **/
 #define MSR_NEHALEM_C2_PMON_BOX_OVF_CTRL         0x00000D42
 
@@ -4274,6 +4576,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL0);
   AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL0, Msr);
   @endcode
+  @note MSR_NEHALEM_C2_PMON_EVNT_SEL0 is defined as MSR_C2_PMON_EVNT_SEL0 in SDM.
 **/
 #define MSR_NEHALEM_C2_PMON_EVNT_SEL0            0x00000D50
 
@@ -4292,6 +4595,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_CTR0);
   AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_CTR0, Msr);
   @endcode
+  @note MSR_NEHALEM_C2_PMON_CTR0 is defined as MSR_C2_PMON_CTR0 in SDM.
 **/
 #define MSR_NEHALEM_C2_PMON_CTR0                 0x00000D51
 
@@ -4310,6 +4614,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL1);
   AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL1, Msr);
   @endcode
+  @note MSR_NEHALEM_C2_PMON_EVNT_SEL1 is defined as MSR_C2_PMON_EVNT_SEL1 in SDM.
 **/
 #define MSR_NEHALEM_C2_PMON_EVNT_SEL1            0x00000D52
 
@@ -4328,6 +4633,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_CTR1);
   AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_CTR1, Msr);
   @endcode
+  @note MSR_NEHALEM_C2_PMON_CTR1 is defined as MSR_C2_PMON_CTR1 in SDM.
 **/
 #define MSR_NEHALEM_C2_PMON_CTR1                 0x00000D53
 
@@ -4346,6 +4652,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL2);
   AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL2, Msr);
   @endcode
+  @note MSR_NEHALEM_C2_PMON_EVNT_SEL2 is defined as MSR_C2_PMON_EVNT_SEL2 in SDM.
 **/
 #define MSR_NEHALEM_C2_PMON_EVNT_SEL2            0x00000D54
 
@@ -4364,6 +4671,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_CTR2);
   AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_CTR2, Msr);
   @endcode
+  @note MSR_NEHALEM_C2_PMON_CTR2 is defined as MSR_C2_PMON_CTR2 in SDM.
 **/
 #define MSR_NEHALEM_C2_PMON_CTR2                 0x00000D55
 
@@ -4382,6 +4690,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL3);
   AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL3, Msr);
   @endcode
+  @note MSR_NEHALEM_C2_PMON_EVNT_SEL3 is defined as MSR_C2_PMON_EVNT_SEL3 in SDM.
 **/
 #define MSR_NEHALEM_C2_PMON_EVNT_SEL3            0x00000D56
 
@@ -4400,6 +4709,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_CTR3);
   AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_CTR3, Msr);
   @endcode
+  @note MSR_NEHALEM_C2_PMON_CTR3 is defined as MSR_C2_PMON_CTR3 in SDM.
 **/
 #define MSR_NEHALEM_C2_PMON_CTR3                 0x00000D57
 
@@ -4418,6 +4728,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL4);
   AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL4, Msr);
   @endcode
+  @note MSR_NEHALEM_C2_PMON_EVNT_SEL4 is defined as MSR_C2_PMON_EVNT_SEL4 in SDM.
 **/
 #define MSR_NEHALEM_C2_PMON_EVNT_SEL4            0x00000D58
 
@@ -4436,6 +4747,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_CTR4);
   AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_CTR4, Msr);
   @endcode
+  @note MSR_NEHALEM_C2_PMON_CTR4 is defined as MSR_C2_PMON_CTR4 in SDM.
 **/
 #define MSR_NEHALEM_C2_PMON_CTR4                 0x00000D59
 
@@ -4454,6 +4766,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL5);
   AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_EVNT_SEL5, Msr);
   @endcode
+  @note MSR_NEHALEM_C2_PMON_EVNT_SEL5 is defined as MSR_C2_PMON_EVNT_SEL5 in SDM.
 **/
 #define MSR_NEHALEM_C2_PMON_EVNT_SEL5            0x00000D5A
 
@@ -4472,6 +4785,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C2_PMON_CTR5);
   AsmWriteMsr64 (MSR_NEHALEM_C2_PMON_CTR5, Msr);
   @endcode
+  @note MSR_NEHALEM_C2_PMON_CTR5 is defined as MSR_C2_PMON_CTR5 in SDM.
 **/
 #define MSR_NEHALEM_C2_PMON_CTR5                 0x00000D5B
 
@@ -4490,6 +4804,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_BOX_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_BOX_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_C6_PMON_BOX_CTRL is defined as MSR_C6_PMON_BOX_CTRL in SDM.
 **/
 #define MSR_NEHALEM_C6_PMON_BOX_CTRL             0x00000D60
 
@@ -4508,6 +4823,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_BOX_STATUS);
   AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_BOX_STATUS, Msr);
   @endcode
+  @note MSR_NEHALEM_C6_PMON_BOX_STATUS is defined as MSR_C6_PMON_BOX_STATUS in SDM.
 **/
 #define MSR_NEHALEM_C6_PMON_BOX_STATUS           0x00000D61
 
@@ -4526,6 +4842,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_BOX_OVF_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_BOX_OVF_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_C6_PMON_BOX_OVF_CTRL is defined as MSR_C6_PMON_BOX_OVF_CTRL in SDM.
 **/
 #define MSR_NEHALEM_C6_PMON_BOX_OVF_CTRL         0x00000D62
 
@@ -4544,6 +4861,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL0);
   AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL0, Msr);
   @endcode
+  @note MSR_NEHALEM_C6_PMON_EVNT_SEL0 is defined as MSR_C6_PMON_EVNT_SEL0 in SDM.
 **/
 #define MSR_NEHALEM_C6_PMON_EVNT_SEL0            0x00000D70
 
@@ -4562,6 +4880,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_CTR0);
   AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_CTR0, Msr);
   @endcode
+  @note MSR_NEHALEM_C6_PMON_CTR0 is defined as MSR_C6_PMON_CTR0 in SDM.
 **/
 #define MSR_NEHALEM_C6_PMON_CTR0                 0x00000D71
 
@@ -4580,6 +4899,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL1);
   AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL1, Msr);
   @endcode
+  @note MSR_NEHALEM_C6_PMON_EVNT_SEL1 is defined as MSR_C6_PMON_EVNT_SEL1 in SDM.
 **/
 #define MSR_NEHALEM_C6_PMON_EVNT_SEL1            0x00000D72
 
@@ -4598,6 +4918,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_CTR1);
   AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_CTR1, Msr);
   @endcode
+  @note MSR_NEHALEM_C6_PMON_CTR1 is defined as MSR_C6_PMON_CTR1 in SDM.
 **/
 #define MSR_NEHALEM_C6_PMON_CTR1                 0x00000D73
 
@@ -4616,6 +4937,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL2);
   AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL2, Msr);
   @endcode
+  @note MSR_NEHALEM_C6_PMON_EVNT_SEL2 is defined as MSR_C6_PMON_EVNT_SEL2 in SDM.
 **/
 #define MSR_NEHALEM_C6_PMON_EVNT_SEL2            0x00000D74
 
@@ -4634,6 +4956,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_CTR2);
   AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_CTR2, Msr);
   @endcode
+  @note MSR_NEHALEM_C6_PMON_CTR2 is defined as MSR_C6_PMON_CTR2 in SDM.
 **/
 #define MSR_NEHALEM_C6_PMON_CTR2                 0x00000D75
 
@@ -4652,6 +4975,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL3);
   AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL3, Msr);
   @endcode
+  @note MSR_NEHALEM_C6_PMON_EVNT_SEL3 is defined as MSR_C6_PMON_EVNT_SEL3 in SDM.
 **/
 #define MSR_NEHALEM_C6_PMON_EVNT_SEL3            0x00000D76
 
@@ -4670,6 +4994,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_CTR3);
   AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_CTR3, Msr);
   @endcode
+  @note MSR_NEHALEM_C6_PMON_CTR3 is defined as MSR_C6_PMON_CTR3 in SDM.
 **/
 #define MSR_NEHALEM_C6_PMON_CTR3                 0x00000D77
 
@@ -4688,6 +5013,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL4);
   AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL4, Msr);
   @endcode
+  @note MSR_NEHALEM_C6_PMON_EVNT_SEL4 is defined as MSR_C6_PMON_EVNT_SEL4 in SDM.
 **/
 #define MSR_NEHALEM_C6_PMON_EVNT_SEL4            0x00000D78
 
@@ -4706,6 +5032,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_CTR4);
   AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_CTR4, Msr);
   @endcode
+  @note MSR_NEHALEM_C6_PMON_CTR4 is defined as MSR_C6_PMON_CTR4 in SDM.
 **/
 #define MSR_NEHALEM_C6_PMON_CTR4                 0x00000D79
 
@@ -4724,6 +5051,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL5);
   AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_EVNT_SEL5, Msr);
   @endcode
+  @note MSR_NEHALEM_C6_PMON_EVNT_SEL5 is defined as MSR_C6_PMON_EVNT_SEL5 in SDM.
 **/
 #define MSR_NEHALEM_C6_PMON_EVNT_SEL5            0x00000D7A
 
@@ -4742,6 +5070,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C6_PMON_CTR5);
   AsmWriteMsr64 (MSR_NEHALEM_C6_PMON_CTR5, Msr);
   @endcode
+  @note MSR_NEHALEM_C6_PMON_CTR5 is defined as MSR_C6_PMON_CTR5 in SDM.
 **/
 #define MSR_NEHALEM_C6_PMON_CTR5                 0x00000D7B
 
@@ -4760,6 +5089,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_BOX_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_BOX_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_C1_PMON_BOX_CTRL is defined as MSR_C1_PMON_BOX_CTRL in SDM.
 **/
 #define MSR_NEHALEM_C1_PMON_BOX_CTRL             0x00000D80
 
@@ -4778,6 +5108,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_BOX_STATUS);
   AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_BOX_STATUS, Msr);
   @endcode
+  @note MSR_NEHALEM_C1_PMON_BOX_STATUS is defined as MSR_C1_PMON_BOX_STATUS in SDM.
 **/
 #define MSR_NEHALEM_C1_PMON_BOX_STATUS           0x00000D81
 
@@ -4796,6 +5127,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_BOX_OVF_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_BOX_OVF_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_C1_PMON_BOX_OVF_CTRL is defined as MSR_C1_PMON_BOX_OVF_CTRL in SDM.
 **/
 #define MSR_NEHALEM_C1_PMON_BOX_OVF_CTRL         0x00000D82
 
@@ -4814,6 +5146,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL0);
   AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL0, Msr);
   @endcode
+  @note MSR_NEHALEM_C1_PMON_EVNT_SEL0 is defined as MSR_C1_PMON_EVNT_SEL0 in SDM.
 **/
 #define MSR_NEHALEM_C1_PMON_EVNT_SEL0            0x00000D90
 
@@ -4832,6 +5165,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_CTR0);
   AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_CTR0, Msr);
   @endcode
+  @note MSR_NEHALEM_C1_PMON_CTR0 is defined as MSR_C1_PMON_CTR0 in SDM.
 **/
 #define MSR_NEHALEM_C1_PMON_CTR0                 0x00000D91
 
@@ -4850,6 +5184,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL1);
   AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL1, Msr);
   @endcode
+  @note MSR_NEHALEM_C1_PMON_EVNT_SEL1 is defined as MSR_C1_PMON_EVNT_SEL1 in SDM.
 **/
 #define MSR_NEHALEM_C1_PMON_EVNT_SEL1            0x00000D92
 
@@ -4868,6 +5203,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_CTR1);
   AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_CTR1, Msr);
   @endcode
+  @note MSR_NEHALEM_C1_PMON_CTR1 is defined as MSR_C1_PMON_CTR1 in SDM.
 **/
 #define MSR_NEHALEM_C1_PMON_CTR1                 0x00000D93
 
@@ -4886,6 +5222,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL2);
   AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL2, Msr);
   @endcode
+  @note MSR_NEHALEM_C1_PMON_EVNT_SEL2 is defined as MSR_C1_PMON_EVNT_SEL2 in SDM.
 **/
 #define MSR_NEHALEM_C1_PMON_EVNT_SEL2            0x00000D94
 
@@ -4904,6 +5241,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_CTR2);
   AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_CTR2, Msr);
   @endcode
+  @note MSR_NEHALEM_C1_PMON_CTR2 is defined as MSR_C1_PMON_CTR2 in SDM.
 **/
 #define MSR_NEHALEM_C1_PMON_CTR2                 0x00000D95
 
@@ -4922,6 +5260,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL3);
   AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL3, Msr);
   @endcode
+  @note MSR_NEHALEM_C1_PMON_EVNT_SEL3 is defined as MSR_C1_PMON_EVNT_SEL3 in SDM.
 **/
 #define MSR_NEHALEM_C1_PMON_EVNT_SEL3            0x00000D96
 
@@ -4940,6 +5279,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_CTR3);
   AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_CTR3, Msr);
   @endcode
+  @note MSR_NEHALEM_C1_PMON_CTR3 is defined as MSR_C1_PMON_CTR3 in SDM.
 **/
 #define MSR_NEHALEM_C1_PMON_CTR3                 0x00000D97
 
@@ -4958,6 +5298,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL4);
   AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL4, Msr);
   @endcode
+  @note MSR_NEHALEM_C1_PMON_EVNT_SEL4 is defined as MSR_C1_PMON_EVNT_SEL4 in SDM.
 **/
 #define MSR_NEHALEM_C1_PMON_EVNT_SEL4            0x00000D98
 
@@ -4976,6 +5317,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_CTR4);
   AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_CTR4, Msr);
   @endcode
+  @note MSR_NEHALEM_C1_PMON_CTR4 is defined as MSR_C1_PMON_CTR4 in SDM.
 **/
 #define MSR_NEHALEM_C1_PMON_CTR4                 0x00000D99
 
@@ -4994,6 +5336,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL5);
   AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_EVNT_SEL5, Msr);
   @endcode
+  @note MSR_NEHALEM_C1_PMON_EVNT_SEL5 is defined as MSR_C1_PMON_EVNT_SEL5 in SDM.
 **/
 #define MSR_NEHALEM_C1_PMON_EVNT_SEL5            0x00000D9A
 
@@ -5012,6 +5355,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C1_PMON_CTR5);
   AsmWriteMsr64 (MSR_NEHALEM_C1_PMON_CTR5, Msr);
   @endcode
+  @note MSR_NEHALEM_C1_PMON_CTR5 is defined as MSR_C1_PMON_CTR5 in SDM.
 **/
 #define MSR_NEHALEM_C1_PMON_CTR5                 0x00000D9B
 
@@ -5030,6 +5374,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_BOX_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_BOX_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_C5_PMON_BOX_CTRL is defined as MSR_C5_PMON_BOX_CTRL in SDM.
 **/
 #define MSR_NEHALEM_C5_PMON_BOX_CTRL             0x00000DA0
 
@@ -5048,6 +5393,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_BOX_STATUS);
   AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_BOX_STATUS, Msr);
   @endcode
+  @note MSR_NEHALEM_C5_PMON_BOX_STATUS is defined as MSR_C5_PMON_BOX_STATUS in SDM.
 **/
 #define MSR_NEHALEM_C5_PMON_BOX_STATUS           0x00000DA1
 
@@ -5066,6 +5412,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_BOX_OVF_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_BOX_OVF_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_C5_PMON_BOX_OVF_CTRL is defined as MSR_C5_PMON_BOX_OVF_CTRL in SDM.
 **/
 #define MSR_NEHALEM_C5_PMON_BOX_OVF_CTRL         0x00000DA2
 
@@ -5084,6 +5431,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL0);
   AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL0, Msr);
   @endcode
+  @note MSR_NEHALEM_C5_PMON_EVNT_SEL0 is defined as MSR_C5_PMON_EVNT_SEL0 in SDM.
 **/
 #define MSR_NEHALEM_C5_PMON_EVNT_SEL0            0x00000DB0
 
@@ -5102,6 +5450,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_CTR0);
   AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_CTR0, Msr);
   @endcode
+  @note MSR_NEHALEM_C5_PMON_CTR0 is defined as MSR_C5_PMON_CTR0 in SDM.
 **/
 #define MSR_NEHALEM_C5_PMON_CTR0                 0x00000DB1
 
@@ -5120,6 +5469,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL1);
   AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL1, Msr);
   @endcode
+  @note MSR_NEHALEM_C5_PMON_EVNT_SEL1 is defined as MSR_C5_PMON_EVNT_SEL1 in SDM.
 **/
 #define MSR_NEHALEM_C5_PMON_EVNT_SEL1            0x00000DB2
 
@@ -5138,6 +5488,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_CTR1);
   AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_CTR1, Msr);
   @endcode
+  @note MSR_NEHALEM_C5_PMON_CTR1 is defined as MSR_C5_PMON_CTR1 in SDM.
 **/
 #define MSR_NEHALEM_C5_PMON_CTR1                 0x00000DB3
 
@@ -5156,6 +5507,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL2);
   AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL2, Msr);
   @endcode
+  @note MSR_NEHALEM_C5_PMON_EVNT_SEL2 is defined as MSR_C5_PMON_EVNT_SEL2 in SDM.
 **/
 #define MSR_NEHALEM_C5_PMON_EVNT_SEL2            0x00000DB4
 
@@ -5174,6 +5526,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_CTR2);
   AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_CTR2, Msr);
   @endcode
+  @note MSR_NEHALEM_C5_PMON_CTR2 is defined as MSR_C5_PMON_CTR2 in SDM.
 **/
 #define MSR_NEHALEM_C5_PMON_CTR2                 0x00000DB5
 
@@ -5192,6 +5545,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL3);
   AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL3, Msr);
   @endcode
+  @note MSR_NEHALEM_C5_PMON_EVNT_SEL3 is defined as MSR_C5_PMON_EVNT_SEL3 in SDM.
 **/
 #define MSR_NEHALEM_C5_PMON_EVNT_SEL3            0x00000DB6
 
@@ -5210,6 +5564,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_CTR3);
   AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_CTR3, Msr);
   @endcode
+  @note MSR_NEHALEM_C5_PMON_CTR3 is defined as MSR_C5_PMON_CTR3 in SDM.
 **/
 #define MSR_NEHALEM_C5_PMON_CTR3                 0x00000DB7
 
@@ -5228,6 +5583,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL4);
   AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL4, Msr);
   @endcode
+  @note MSR_NEHALEM_C5_PMON_EVNT_SEL4 is defined as MSR_C5_PMON_EVNT_SEL4 in SDM.
 **/
 #define MSR_NEHALEM_C5_PMON_EVNT_SEL4            0x00000DB8
 
@@ -5246,6 +5602,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_CTR4);
   AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_CTR4, Msr);
   @endcode
+  @note MSR_NEHALEM_C5_PMON_CTR4 is defined as MSR_C5_PMON_CTR4 in SDM.
 **/
 #define MSR_NEHALEM_C5_PMON_CTR4                 0x00000DB9
 
@@ -5264,6 +5621,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL5);
   AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_EVNT_SEL5, Msr);
   @endcode
+  @note MSR_NEHALEM_C5_PMON_EVNT_SEL5 is defined as MSR_C5_PMON_EVNT_SEL5 in SDM.
 **/
 #define MSR_NEHALEM_C5_PMON_EVNT_SEL5            0x00000DBA
 
@@ -5282,6 +5640,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C5_PMON_CTR5);
   AsmWriteMsr64 (MSR_NEHALEM_C5_PMON_CTR5, Msr);
   @endcode
+  @note MSR_NEHALEM_C5_PMON_CTR5 is defined as MSR_C5_PMON_CTR5 in SDM.
 **/
 #define MSR_NEHALEM_C5_PMON_CTR5                 0x00000DBB
 
@@ -5300,6 +5659,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_BOX_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_BOX_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_C3_PMON_BOX_CTRL is defined as MSR_C3_PMON_BOX_CTRL in SDM.
 **/
 #define MSR_NEHALEM_C3_PMON_BOX_CTRL             0x00000DC0
 
@@ -5318,6 +5678,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_BOX_STATUS);
   AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_BOX_STATUS, Msr);
   @endcode
+  @note MSR_NEHALEM_C3_PMON_BOX_STATUS is defined as MSR_C3_PMON_BOX_STATUS in SDM.
 **/
 #define MSR_NEHALEM_C3_PMON_BOX_STATUS           0x00000DC1
 
@@ -5336,6 +5697,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_BOX_OVF_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_BOX_OVF_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_C3_PMON_BOX_OVF_CTRL is defined as MSR_C3_PMON_BOX_OVF_CTRL in SDM.
 **/
 #define MSR_NEHALEM_C3_PMON_BOX_OVF_CTRL         0x00000DC2
 
@@ -5354,6 +5716,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL0);
   AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL0, Msr);
   @endcode
+  @note MSR_NEHALEM_C3_PMON_EVNT_SEL0 is defined as MSR_C3_PMON_EVNT_SEL0 in SDM.
 **/
 #define MSR_NEHALEM_C3_PMON_EVNT_SEL0            0x00000DD0
 
@@ -5372,6 +5735,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_CTR0);
   AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_CTR0, Msr);
   @endcode
+  @note MSR_NEHALEM_C3_PMON_CTR0 is defined as MSR_C3_PMON_CTR0 in SDM.
 **/
 #define MSR_NEHALEM_C3_PMON_CTR0                 0x00000DD1
 
@@ -5390,6 +5754,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL1);
   AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL1, Msr);
   @endcode
+  @note MSR_NEHALEM_C3_PMON_EVNT_SEL1 is defined as MSR_C3_PMON_EVNT_SEL1 in SDM.
 **/
 #define MSR_NEHALEM_C3_PMON_EVNT_SEL1            0x00000DD2
 
@@ -5408,6 +5773,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_CTR1);
   AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_CTR1, Msr);
   @endcode
+  @note MSR_NEHALEM_C3_PMON_CTR1 is defined as MSR_C3_PMON_CTR1 in SDM.
 **/
 #define MSR_NEHALEM_C3_PMON_CTR1                 0x00000DD3
 
@@ -5426,6 +5792,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL2);
   AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL2, Msr);
   @endcode
+  @note MSR_NEHALEM_C3_PMON_EVNT_SEL2 is defined as MSR_C3_PMON_EVNT_SEL2 in SDM.
 **/
 #define MSR_NEHALEM_C3_PMON_EVNT_SEL2            0x00000DD4
 
@@ -5444,6 +5811,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_CTR2);
   AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_CTR2, Msr);
   @endcode
+  @note MSR_NEHALEM_C3_PMON_CTR2 is defined as MSR_C3_PMON_CTR2 in SDM.
 **/
 #define MSR_NEHALEM_C3_PMON_CTR2                 0x00000DD5
 
@@ -5462,6 +5830,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL3);
   AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL3, Msr);
   @endcode
+  @note MSR_NEHALEM_C3_PMON_EVNT_SEL3 is defined as MSR_C3_PMON_EVNT_SEL3 in SDM.
 **/
 #define MSR_NEHALEM_C3_PMON_EVNT_SEL3            0x00000DD6
 
@@ -5480,6 +5849,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_CTR3);
   AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_CTR3, Msr);
   @endcode
+  @note MSR_NEHALEM_C3_PMON_CTR3 is defined as MSR_C3_PMON_CTR3 in SDM.
 **/
 #define MSR_NEHALEM_C3_PMON_CTR3                 0x00000DD7
 
@@ -5498,6 +5868,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL4);
   AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL4, Msr);
   @endcode
+  @note MSR_NEHALEM_C3_PMON_EVNT_SEL4 is defined as MSR_C3_PMON_EVNT_SEL4 in SDM.
 **/
 #define MSR_NEHALEM_C3_PMON_EVNT_SEL4            0x00000DD8
 
@@ -5516,6 +5887,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_CTR4);
   AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_CTR4, Msr);
   @endcode
+  @note MSR_NEHALEM_C3_PMON_CTR4 is defined as MSR_C3_PMON_CTR4 in SDM.
 **/
 #define MSR_NEHALEM_C3_PMON_CTR4                 0x00000DD9
 
@@ -5534,6 +5906,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL5);
   AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_EVNT_SEL5, Msr);
   @endcode
+  @note MSR_NEHALEM_C3_PMON_EVNT_SEL5 is defined as MSR_C3_PMON_EVNT_SEL5 in SDM.
 **/
 #define MSR_NEHALEM_C3_PMON_EVNT_SEL5            0x00000DDA
 
@@ -5552,6 +5925,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C3_PMON_CTR5);
   AsmWriteMsr64 (MSR_NEHALEM_C3_PMON_CTR5, Msr);
   @endcode
+  @note MSR_NEHALEM_C3_PMON_CTR5 is defined as MSR_C3_PMON_CTR5 in SDM.
 **/
 #define MSR_NEHALEM_C3_PMON_CTR5                 0x00000DDB
 
@@ -5570,6 +5944,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_BOX_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_BOX_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_C7_PMON_BOX_CTRL is defined as MSR_C7_PMON_BOX_CTRL in SDM.
 **/
 #define MSR_NEHALEM_C7_PMON_BOX_CTRL             0x00000DE0
 
@@ -5588,6 +5963,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_BOX_STATUS);
   AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_BOX_STATUS, Msr);
   @endcode
+  @note MSR_NEHALEM_C7_PMON_BOX_STATUS is defined as MSR_C7_PMON_BOX_STATUS in SDM.
 **/
 #define MSR_NEHALEM_C7_PMON_BOX_STATUS           0x00000DE1
 
@@ -5606,6 +5982,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_BOX_OVF_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_BOX_OVF_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_C7_PMON_BOX_OVF_CTRL is defined as MSR_C7_PMON_BOX_OVF_CTRL in SDM.
 **/
 #define MSR_NEHALEM_C7_PMON_BOX_OVF_CTRL         0x00000DE2
 
@@ -5624,6 +6001,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL0);
   AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL0, Msr);
   @endcode
+  @note MSR_NEHALEM_C7_PMON_EVNT_SEL0 is defined as MSR_C7_PMON_EVNT_SEL0 in SDM.
 **/
 #define MSR_NEHALEM_C7_PMON_EVNT_SEL0            0x00000DF0
 
@@ -5642,6 +6020,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_CTR0);
   AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_CTR0, Msr);
   @endcode
+  @note MSR_NEHALEM_C7_PMON_CTR0 is defined as MSR_C7_PMON_CTR0 in SDM.
 **/
 #define MSR_NEHALEM_C7_PMON_CTR0                 0x00000DF1
 
@@ -5660,6 +6039,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL1);
   AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL1, Msr);
   @endcode
+  @note MSR_NEHALEM_C7_PMON_EVNT_SEL1 is defined as MSR_C7_PMON_EVNT_SEL1 in SDM.
 **/
 #define MSR_NEHALEM_C7_PMON_EVNT_SEL1            0x00000DF2
 
@@ -5678,6 +6058,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_CTR1);
   AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_CTR1, Msr);
   @endcode
+  @note MSR_NEHALEM_C7_PMON_CTR1 is defined as MSR_C7_PMON_CTR1 in SDM.
 **/
 #define MSR_NEHALEM_C7_PMON_CTR1                 0x00000DF3
 
@@ -5696,6 +6077,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL2);
   AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL2, Msr);
   @endcode
+  @note MSR_NEHALEM_C7_PMON_EVNT_SEL2 is defined as MSR_C7_PMON_EVNT_SEL2 in SDM.
 **/
 #define MSR_NEHALEM_C7_PMON_EVNT_SEL2            0x00000DF4
 
@@ -5714,6 +6096,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_CTR2);
   AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_CTR2, Msr);
   @endcode
+  @note MSR_NEHALEM_C7_PMON_CTR2 is defined as MSR_C7_PMON_CTR2 in SDM.
 **/
 #define MSR_NEHALEM_C7_PMON_CTR2                 0x00000DF5
 
@@ -5732,6 +6115,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL3);
   AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL3, Msr);
   @endcode
+  @note MSR_NEHALEM_C7_PMON_EVNT_SEL3 is defined as MSR_C7_PMON_EVNT_SEL3 in SDM.
 **/
 #define MSR_NEHALEM_C7_PMON_EVNT_SEL3            0x00000DF6
 
@@ -5750,6 +6134,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_CTR3);
   AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_CTR3, Msr);
   @endcode
+  @note MSR_NEHALEM_C7_PMON_CTR3 is defined as MSR_C7_PMON_CTR3 in SDM.
 **/
 #define MSR_NEHALEM_C7_PMON_CTR3                 0x00000DF7
 
@@ -5768,6 +6153,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL4);
   AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL4, Msr);
   @endcode
+  @note MSR_NEHALEM_C7_PMON_EVNT_SEL4 is defined as MSR_C7_PMON_EVNT_SEL4 in SDM.
 **/
 #define MSR_NEHALEM_C7_PMON_EVNT_SEL4            0x00000DF8
 
@@ -5786,6 +6172,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_CTR4);
   AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_CTR4, Msr);
   @endcode
+  @note MSR_NEHALEM_C7_PMON_CTR4 is defined as MSR_C7_PMON_CTR4 in SDM.
 **/
 #define MSR_NEHALEM_C7_PMON_CTR4                 0x00000DF9
 
@@ -5804,6 +6191,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL5);
   AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_EVNT_SEL5, Msr);
   @endcode
+  @note MSR_NEHALEM_C7_PMON_EVNT_SEL5 is defined as MSR_C7_PMON_EVNT_SEL5 in SDM.
 **/
 #define MSR_NEHALEM_C7_PMON_EVNT_SEL5            0x00000DFA
 
@@ -5822,6 +6210,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_C7_PMON_CTR5);
   AsmWriteMsr64 (MSR_NEHALEM_C7_PMON_CTR5, Msr);
   @endcode
+  @note MSR_NEHALEM_C7_PMON_CTR5 is defined as MSR_C7_PMON_CTR5 in SDM.
 **/
 #define MSR_NEHALEM_C7_PMON_CTR5                 0x00000DFB
 
@@ -5840,6 +6229,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_BOX_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_BOX_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_BOX_CTRL is defined as MSR_R0_PMON_BOX_CTRL in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_BOX_CTRL             0x00000E00
 
@@ -5858,6 +6248,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_BOX_STATUS);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_BOX_STATUS, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_BOX_STATUS is defined as MSR_R0_PMON_BOX_STATUS in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_BOX_STATUS           0x00000E01
 
@@ -5876,6 +6267,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_BOX_OVF_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_BOX_OVF_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_BOX_OVF_CTRL is defined as MSR_R0_PMON_BOX_OVF_CTRL in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_BOX_OVF_CTRL         0x00000E02
 
@@ -5894,6 +6286,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P0);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P0, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_IPERF0_P0 is defined as MSR_R0_PMON_IPERF0_P0 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_IPERF0_P0            0x00000E04
 
@@ -5912,6 +6305,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P1);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P1, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_IPERF0_P1 is defined as MSR_R0_PMON_IPERF0_P1 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_IPERF0_P1            0x00000E05
 
@@ -5930,6 +6324,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P2);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P2, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_IPERF0_P2 is defined as MSR_R0_PMON_IPERF0_P2 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_IPERF0_P2            0x00000E06
 
@@ -5948,6 +6343,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P3);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P3, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_IPERF0_P3 is defined as MSR_R0_PMON_IPERF0_P3 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_IPERF0_P3            0x00000E07
 
@@ -5966,6 +6362,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P4);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P4, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_IPERF0_P4 is defined as MSR_R0_PMON_IPERF0_P4 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_IPERF0_P4            0x00000E08
 
@@ -5984,6 +6381,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P5);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P5, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_IPERF0_P5 is defined as MSR_R0_PMON_IPERF0_P5 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_IPERF0_P5            0x00000E09
 
@@ -6002,6 +6400,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P6);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P6, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_IPERF0_P6 is defined as MSR_R0_PMON_IPERF0_P6 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_IPERF0_P6            0x00000E0A
 
@@ -6020,6 +6419,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P7);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_IPERF0_P7, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_IPERF0_P7 is defined as MSR_R0_PMON_IPERF0_P7 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_IPERF0_P7            0x00000E0B
 
@@ -6038,6 +6438,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_QLX_P0);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_QLX_P0, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_QLX_P0 is defined as MSR_R0_PMON_QLX_P0 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_QLX_P0               0x00000E0C
 
@@ -6056,6 +6457,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_QLX_P1);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_QLX_P1, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_QLX_P1 is defined as MSR_R0_PMON_QLX_P1 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_QLX_P1               0x00000E0D
 
@@ -6074,6 +6476,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_QLX_P2);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_QLX_P2, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_QLX_P2 is defined as MSR_R0_PMON_QLX_P2 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_QLX_P2               0x00000E0E
 
@@ -6092,6 +6495,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_QLX_P3);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_QLX_P3, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_QLX_P3 is defined as MSR_R0_PMON_QLX_P3 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_QLX_P3               0x00000E0F
 
@@ -6110,6 +6514,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL0);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL0, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_EVNT_SEL0 is defined as MSR_R0_PMON_EVNT_SEL0 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_EVNT_SEL0            0x00000E10
 
@@ -6128,6 +6533,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_CTR0);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_CTR0, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_CTR0 is defined as MSR_R0_PMON_CTR0 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_CTR0                 0x00000E11
 
@@ -6146,6 +6552,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL1);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL1, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_EVNT_SEL1 is defined as MSR_R0_PMON_EVNT_SEL1 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_EVNT_SEL1            0x00000E12
 
@@ -6164,6 +6571,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_CTR1);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_CTR1, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_CTR1 is defined as MSR_R0_PMON_CTR1 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_CTR1                 0x00000E13
 
@@ -6182,6 +6590,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL2);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL2, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_EVNT_SEL2 is defined as MSR_R0_PMON_EVNT_SEL2 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_EVNT_SEL2            0x00000E14
 
@@ -6200,6 +6609,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_CTR2);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_CTR2, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_CTR2 is defined as MSR_R0_PMON_CTR2 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_CTR2                 0x00000E15
 
@@ -6218,6 +6628,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL3);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL3, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_EVNT_SEL3 is defined as MSR_R0_PMON_EVNT_SEL3 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_EVNT_SEL3            0x00000E16
 
@@ -6236,6 +6647,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_CTR3);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_CTR3, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_CTR3 is defined as MSR_R0_PMON_CTR3 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_CTR3                 0x00000E17
 
@@ -6254,6 +6666,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL4);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL4, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_EVNT_SEL4 is defined as MSR_R0_PMON_EVNT_SEL4 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_EVNT_SEL4            0x00000E18
 
@@ -6272,6 +6685,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_CTR4);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_CTR4, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_CTR4 is defined as MSR_R0_PMON_CTR4 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_CTR4                 0x00000E19
 
@@ -6290,6 +6704,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL5);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL5, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_EVNT_SEL5 is defined as MSR_R0_PMON_EVNT_SEL5 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_EVNT_SEL5            0x00000E1A
 
@@ -6308,6 +6723,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_CTR5);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_CTR5, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_CTR5 is defined as MSR_R0_PMON_CTR5 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_CTR5                 0x00000E1B
 
@@ -6326,6 +6742,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL6);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL6, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_EVNT_SEL6 is defined as MSR_R0_PMON_EVNT_SEL6 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_EVNT_SEL6            0x00000E1C
 
@@ -6344,6 +6761,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_CTR6);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_CTR6, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_CTR6 is defined as MSR_R0_PMON_CTR6 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_CTR6                 0x00000E1D
 
@@ -6362,6 +6780,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL7);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_EVNT_SEL7, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_EVNT_SEL7 is defined as MSR_R0_PMON_EVNT_SEL7 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_EVNT_SEL7            0x00000E1E
 
@@ -6380,6 +6799,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R0_PMON_CTR7);
   AsmWriteMsr64 (MSR_NEHALEM_R0_PMON_CTR7, Msr);
   @endcode
+  @note MSR_NEHALEM_R0_PMON_CTR7 is defined as MSR_R0_PMON_CTR7 in SDM.
 **/
 #define MSR_NEHALEM_R0_PMON_CTR7                 0x00000E1F
 
@@ -6398,6 +6818,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_BOX_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_BOX_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_BOX_CTRL is defined as MSR_R1_PMON_BOX_CTRL in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_BOX_CTRL             0x00000E20
 
@@ -6416,6 +6837,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_BOX_STATUS);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_BOX_STATUS, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_BOX_STATUS is defined as MSR_R1_PMON_BOX_STATUS in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_BOX_STATUS           0x00000E21
 
@@ -6434,6 +6856,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_BOX_OVF_CTRL);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_BOX_OVF_CTRL, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_BOX_OVF_CTRL is defined as MSR_R1_PMON_BOX_OVF_CTRL in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_BOX_OVF_CTRL         0x00000E22
 
@@ -6452,6 +6875,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P8);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P8, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_IPERF1_P8 is defined as MSR_R1_PMON_IPERF1_P8 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_IPERF1_P8            0x00000E24
 
@@ -6470,6 +6894,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P9);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P9, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_IPERF1_P9 is defined as MSR_R1_PMON_IPERF1_P9 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_IPERF1_P9            0x00000E25
 
@@ -6488,6 +6913,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P10);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P10, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_IPERF1_P10 is defined as MSR_R1_PMON_IPERF1_P10 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_IPERF1_P10           0x00000E26
 
@@ -6506,6 +6932,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P11);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P11, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_IPERF1_P11 is defined as MSR_R1_PMON_IPERF1_P11 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_IPERF1_P11           0x00000E27
 
@@ -6524,6 +6951,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P12);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P12, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_IPERF1_P12 is defined as MSR_R1_PMON_IPERF1_P12 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_IPERF1_P12           0x00000E28
 
@@ -6542,6 +6970,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P13);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P13, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_IPERF1_P13 is defined as MSR_R1_PMON_IPERF1_P13 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_IPERF1_P13           0x00000E29
 
@@ -6560,6 +6989,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P14);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P14, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_IPERF1_P14 is defined as MSR_R1_PMON_IPERF1_P14 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_IPERF1_P14           0x00000E2A
 
@@ -6578,6 +7008,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P15);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_IPERF1_P15, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_IPERF1_P15 is defined as MSR_R1_PMON_IPERF1_P15 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_IPERF1_P15           0x00000E2B
 
@@ -6596,6 +7027,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_QLX_P4);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_QLX_P4, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_QLX_P4 is defined as MSR_R1_PMON_QLX_P4 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_QLX_P4               0x00000E2C
 
@@ -6614,6 +7046,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_QLX_P5);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_QLX_P5, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_QLX_P5 is defined as MSR_R1_PMON_QLX_P5 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_QLX_P5               0x00000E2D
 
@@ -6632,6 +7065,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_QLX_P6);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_QLX_P6, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_QLX_P6 is defined as MSR_R1_PMON_QLX_P6 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_QLX_P6               0x00000E2E
 
@@ -6650,6 +7084,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_QLX_P7);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_QLX_P7, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_QLX_P7 is defined as MSR_R1_PMON_QLX_P7 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_QLX_P7               0x00000E2F
 
@@ -6668,6 +7103,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL8);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL8, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_EVNT_SEL8 is defined as MSR_R1_PMON_EVNT_SEL8 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_EVNT_SEL8            0x00000E30
 
@@ -6686,6 +7122,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_CTR8);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_CTR8, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_CTR8 is defined as MSR_R1_PMON_CTR8 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_CTR8                 0x00000E31
 
@@ -6704,6 +7141,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL9);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL9, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_EVNT_SEL9 is defined as MSR_R1_PMON_EVNT_SEL9 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_EVNT_SEL9            0x00000E32
 
@@ -6722,6 +7160,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_CTR9);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_CTR9, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_CTR9 is defined as MSR_R1_PMON_CTR9 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_CTR9                 0x00000E33
 
@@ -6740,6 +7179,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL10);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL10, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_EVNT_SEL10 is defined as MSR_R1_PMON_EVNT_SEL10 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_EVNT_SEL10           0x00000E34
 
@@ -6758,6 +7198,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_CTR10);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_CTR10, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_CTR10 is defined as MSR_R1_PMON_CTR10 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_CTR10                0x00000E35
 
@@ -6776,6 +7217,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL11);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL11, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_EVNT_SEL11 is defined as MSR_R1_PMON_EVNT_SEL11 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_EVNT_SEL11           0x00000E36
 
@@ -6794,6 +7236,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_CTR11);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_CTR11, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_CTR11 is defined as MSR_R1_PMON_CTR11 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_CTR11                0x00000E37
 
@@ -6812,6 +7255,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL12);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL12, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_EVNT_SEL12 is defined as MSR_R1_PMON_EVNT_SEL12 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_EVNT_SEL12           0x00000E38
 
@@ -6830,6 +7274,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_CTR12);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_CTR12, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_CTR12 is defined as MSR_R1_PMON_CTR12 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_CTR12                0x00000E39
 
@@ -6848,6 +7293,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL13);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL13, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_EVNT_SEL13 is defined as MSR_R1_PMON_EVNT_SEL13 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_EVNT_SEL13           0x00000E3A
 
@@ -6866,6 +7312,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_CTR13);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_CTR13, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_CTR13 is defined as MSR_R1_PMON_CTR13 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_CTR13                0x00000E3B
 
@@ -6884,6 +7331,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL14);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL14, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_EVNT_SEL14 is defined as MSR_R1_PMON_EVNT_SEL14 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_EVNT_SEL14           0x00000E3C
 
@@ -6902,6 +7350,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_CTR14);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_CTR14, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_CTR14 is defined as MSR_R1_PMON_CTR14 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_CTR14                0x00000E3D
 
@@ -6920,6 +7369,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL15);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_EVNT_SEL15, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_EVNT_SEL15 is defined as MSR_R1_PMON_EVNT_SEL15 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_EVNT_SEL15           0x00000E3E
 
@@ -6938,6 +7388,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_R1_PMON_CTR15);
   AsmWriteMsr64 (MSR_NEHALEM_R1_PMON_CTR15, Msr);
   @endcode
+  @note MSR_NEHALEM_R1_PMON_CTR15 is defined as MSR_R1_PMON_CTR15 in SDM.
 **/
 #define MSR_NEHALEM_R1_PMON_CTR15                0x00000E3F
 
@@ -6956,6 +7407,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_MATCH);
   AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_MATCH, Msr);
   @endcode
+  @note MSR_NEHALEM_B0_PMON_MATCH is defined as MSR_B0_PMON_MATCH in SDM.
 **/
 #define MSR_NEHALEM_B0_PMON_MATCH                0x00000E45
 
@@ -6974,6 +7426,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B0_PMON_MASK);
   AsmWriteMsr64 (MSR_NEHALEM_B0_PMON_MASK, Msr);
   @endcode
+  @note MSR_NEHALEM_B0_PMON_MASK is defined as MSR_B0_PMON_MASK in SDM.
 **/
 #define MSR_NEHALEM_B0_PMON_MASK                 0x00000E46
 
@@ -6992,6 +7445,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_MATCH);
   AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_MATCH, Msr);
   @endcode
+  @note MSR_NEHALEM_S0_PMON_MATCH is defined as MSR_S0_PMON_MATCH in SDM.
 **/
 #define MSR_NEHALEM_S0_PMON_MATCH                0x00000E49
 
@@ -7010,6 +7464,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S0_PMON_MASK);
   AsmWriteMsr64 (MSR_NEHALEM_S0_PMON_MASK, Msr);
   @endcode
+  @note MSR_NEHALEM_S0_PMON_MASK is defined as MSR_S0_PMON_MASK in SDM.
 **/
 #define MSR_NEHALEM_S0_PMON_MASK                 0x00000E4A
 
@@ -7028,6 +7483,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_MATCH);
   AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_MATCH, Msr);
   @endcode
+  @note MSR_NEHALEM_B1_PMON_MATCH is defined as MSR_B1_PMON_MATCH in SDM.
 **/
 #define MSR_NEHALEM_B1_PMON_MATCH                0x00000E4D
 
@@ -7046,6 +7502,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_B1_PMON_MASK);
   AsmWriteMsr64 (MSR_NEHALEM_B1_PMON_MASK, Msr);
   @endcode
+  @note MSR_NEHALEM_B1_PMON_MASK is defined as MSR_B1_PMON_MASK in SDM.
 **/
 #define MSR_NEHALEM_B1_PMON_MASK                 0x00000E4E
 
@@ -7064,6 +7521,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_MM_CONFIG);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_MM_CONFIG, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_MM_CONFIG is defined as MSR_M0_PMON_MM_CONFIG in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_MM_CONFIG            0x00000E54
 
@@ -7082,6 +7540,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_ADDR_MATCH);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_ADDR_MATCH, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_ADDR_MATCH is defined as MSR_M0_PMON_ADDR_MATCH in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_ADDR_MATCH           0x00000E55
 
@@ -7100,6 +7559,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M0_PMON_ADDR_MASK);
   AsmWriteMsr64 (MSR_NEHALEM_M0_PMON_ADDR_MASK, Msr);
   @endcode
+  @note MSR_NEHALEM_M0_PMON_ADDR_MASK is defined as MSR_M0_PMON_ADDR_MASK in SDM.
 **/
 #define MSR_NEHALEM_M0_PMON_ADDR_MASK            0x00000E56
 
@@ -7118,6 +7578,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_MATCH);
   AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_MATCH, Msr);
   @endcode
+  @note MSR_NEHALEM_S1_PMON_MATCH is defined as MSR_S1_PMON_MATCH in SDM.
 **/
 #define MSR_NEHALEM_S1_PMON_MATCH                0x00000E59
 
@@ -7136,6 +7597,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_S1_PMON_MASK);
   AsmWriteMsr64 (MSR_NEHALEM_S1_PMON_MASK, Msr);
   @endcode
+  @note MSR_NEHALEM_S1_PMON_MASK is defined as MSR_S1_PMON_MASK in SDM.
 **/
 #define MSR_NEHALEM_S1_PMON_MASK                 0x00000E5A
 
@@ -7154,6 +7616,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_MM_CONFIG);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_MM_CONFIG, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_MM_CONFIG is defined as MSR_M1_PMON_MM_CONFIG in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_MM_CONFIG            0x00000E5C
 
@@ -7172,6 +7635,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_ADDR_MATCH);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_ADDR_MATCH, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_ADDR_MATCH is defined as MSR_M1_PMON_ADDR_MATCH in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_ADDR_MATCH           0x00000E5D
 
@@ -7190,6 +7654,7 @@ typedef union {
   Msr = AsmReadMsr64 (MSR_NEHALEM_M1_PMON_ADDR_MASK);
   AsmWriteMsr64 (MSR_NEHALEM_M1_PMON_ADDR_MASK, Msr);
   @endcode
+  @note MSR_NEHALEM_M1_PMON_ADDR_MASK is defined as MSR_M1_PMON_ADDR_MASK in SDM.
 **/
 #define MSR_NEHALEM_M1_PMON_ADDR_MASK            0x00000E5E
 
-- 
2.9.3.windows.2

next prev parent reply	other threads:[~2016-09-06 11:39 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-06 11:38 [Patch 00/20] add MSR reference from SDM in comment Jeff Fan
2016-09-06 11:38 ` [Patch 01/20] UefiCpuPkg/ArchitecturalMsr.h: " Jeff Fan
2016-09-06 11:38 ` [Patch 02/20] UefiCpuPkg/AtomMsr.h: " Jeff Fan
2016-09-06 11:38 ` [Patch 03/20] UefiCpuPkg/BroadwellMsr.h: " Jeff Fan
2016-09-06 11:38 ` [Patch 04/20] UefiCpuPkg/Core2Msr.h: " Jeff Fan
2016-09-06 11:38 ` [Patch 05/20] UefiCpuPkg/CoreMsr.h: " Jeff Fan
2016-09-06 11:38 ` [Patch 06/20] UefiCpuPkg/HaswellEMsr.h: " Jeff Fan
2016-09-06 11:38 ` [Patch 07/20] UefiCpuPkg/HaswellMsr.h: " Jeff Fan
2016-09-06 11:38 ` [Patch 08/20] UefiCpuPkg/IvyBridgeMsr.h: " Jeff Fan
2016-09-06 11:38 ` Jeff Fan [this message]
2016-09-06 11:38 ` [Patch 10/20] UefiCpuPkg/P6Msr.h: " Jeff Fan
2016-09-06 11:38 ` [Patch 11/20] UefiCpuPkg/Pentium4Msr.h: " Jeff Fan
2016-09-06 11:38 ` [Patch 12/20] UefiCpuPkg/PentiumMMsr.h: " Jeff Fan
2016-09-06 11:38 ` [Patch 13/20] UefiCpuPkg/PentiumMsr.h: " Jeff Fan
2016-09-06 11:38 ` [Patch 14/20] UefiCpuPkg/SandyBridgeMsr.h: " Jeff Fan
2016-09-06 11:38 ` [Patch 15/20] UefiCpuPkg/SilvermontMsr.h: " Jeff Fan
2016-09-06 11:38 ` [Patch 16/20] UefiCpuPkg/SkylakeMsr.h: " Jeff Fan
2016-09-06 11:38 ` [Patch 17/20] UefiCpuPkg/Xeon5600Msr.h: " Jeff Fan
2016-09-06 11:38 ` [Patch 18/20] UefiCpuPkg/XeonDMsr.h: " Jeff Fan
2016-09-06 11:38 ` [Patch 19/20] UefiCpuPkg/XeonE7Msr.h: " Jeff Fan
2016-09-06 11:38 ` [Patch 20/20] UefiCpuPkg/XeonPhiMsr.h: " Jeff Fan
2016-09-06 17:27   ` Mudusuru, Giri P

find likely ancestor, descendant, or conflicting patches for this message:
( dfblob:cc24a23 dfblob:6f3d4f4 )
 OR (
bs:"[Patch 09/20] UefiCpuPkg/NehalemMsr.h: add MSR reference from SDM in comment" )
	(help)

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