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From: Leif Lindholm <leif.lindholm@linaro.org>
To: "Cohen, Eugene" <eugene@hp.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Subject: Re: [PATCH] ArmPlatformPkg: remove EFI_MEMORY_UC attribute from normal memory
Date: Thu, 8 Sep 2016 21:54:01 +0100	[thread overview]
Message-ID: <20160908205401.GK16080@bivouac.eciton.net> (raw)
In-Reply-To: <AT5PR84MB029171BC03EA00A9EBE43193B4FB0@AT5PR84MB0291.NAMPRD84.PROD.OUTLOOK.COM>

On Thu, Sep 08, 2016 at 05:37:13PM +0000, Cohen, Eugene wrote:
> > I think this is the right thing to do; Arguably, on the modern ARM
> > architectures, UNCACHEABLE and WRITE_COMBINEABLE are mutually
> > exclusive. I'll discuss with Charles whether we should codify this in
> > the UEFI specification.
> 
> Given the corresponding X86 semantics it makes sense for UNCACHEABLE
> to map to Strongly Ordered and WRITE_COMBINEABLE to map to "Normal"
> Uncacheable.   It's useful to expose this separately in case a DMA
> common buffer has semantics that require the strongly ordered
> behavior.
> 
> Since this is providing a list of capabilities I'm not sure what the
> statement about mutual exclusivity refers to.

Do note the weasly "arguably" I stuck in there.

My point is basically the same as yours, with the clarification that
for purposes of treating something like general-purpose memory,
flagging a location as possible to map as either UNCACHEABLE (ARM:
Strongly Ordered) or WRITE_COMBINEABLE (ARM: Normal uncached)
generally does not make sense.

Regards,

Leif


  reply	other threads:[~2016-09-08 20:54 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-08  8:13 [PATCH] ArmPlatformPkg: remove EFI_MEMORY_UC attribute from normal memory Ard Biesheuvel
2016-09-08  9:21 ` Leif Lindholm
2016-09-08  9:39   ` Ard Biesheuvel
2016-09-08 17:37   ` Cohen, Eugene
2016-09-08 20:54     ` Leif Lindholm [this message]
2016-09-08 17:33 ` Cohen, Eugene
2016-09-08 17:49   ` Ard Biesheuvel

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