From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-x235.google.com (mail-wm0-x235.google.com [IPv6:2a00:1450:400c:c09::235]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 9EBDB1A1E3A for ; Tue, 13 Sep 2016 03:43:12 -0700 (PDT) Received: by mail-wm0-x235.google.com with SMTP id i130so24680284wmf.0 for ; Tue, 13 Sep 2016 03:43:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=zUbNG/i3pqx5adD/1yYzrvUAbZ9bLFbzk9YB/NcWU9w=; b=eMRiXfaq8+TWNebjpFR8kjIeil3zA0zkp9SlCJHt+mVQz3ixIpkPHjn/3mJvP6xB89 wkFkrwCbdb4CLZ+gqe1wJHk+0GqmEdNqV5BHjwDHpRDf7neFzk55IQOtOWWHHlHkrXoh SJx8Uf718xRJ/Sfh0tDhZ9Yb77nPab7WoGtik= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=zUbNG/i3pqx5adD/1yYzrvUAbZ9bLFbzk9YB/NcWU9w=; b=hOzBoSwzY7l/t/OGGcfwpTJBag0uUOy49KEd1D88QD3JkMetH4paJk1HcdZGBYM1vo LglSTS552fWxrFpvBf2QxWr7fi/mmzdgUeHR9v9dADKd+4PHpyk+zyria+Ij+iq7Qqv9 +/Ve9SEySolNqnm413x4qar0RoJPRyctgl6ZWzb8iVO2AJszPx7Qv4E1WfWyhEarikaF kULHOxii1wwrxGnSu+Eq9JlEwlIJkHmgC1X8zaukBWr6Kx77LtKTmsXbj+fbiZc2yOry YdP+ZdaLJpWnZf9HDXJHCEcOeAQbWzMbeXsdsgYC9d+h9U1cPKjWKBEgiRWdMLifFlF2 hIDQ== X-Gm-Message-State: AE9vXwPKoeldl1OezkewCM1Hn8ewDLk1+d2JtmEn2jBRfc38LdV7HFCB7AG8/JsTjMKYFsnC X-Received: by 10.28.144.5 with SMTP id s5mr12109wmd.39.1473763391232; Tue, 13 Sep 2016 03:43:11 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id z17sm22254794wmz.23.2016.09.13.03.43.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 13 Sep 2016 03:43:10 -0700 (PDT) Date: Tue, 13 Sep 2016 11:43:09 +0100 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org, eugene@hp.com Message-ID: <20160913104309.GU16080@bivouac.eciton.net> References: <1473408939-18044-1-git-send-email-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <1473408939-18044-1-git-send-email-ard.biesheuvel@linaro.org> User-Agent: Mutt/1.5.23 (2014-03-12) Subject: Re: [PATCH 1/2] Platforms/AMD/Styx: limit VA space to 40 bits X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 13 Sep 2016 10:43:13 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Fri, Sep 09, 2016 at 09:15:38AM +0100, Ard Biesheuvel wrote: > We can cover the entire MMIO range and 512 GB of memory starting at > 0x80_0000_0000 using 40 bits of VA space, both in the page tables and > in the GCD memory map. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm > --- > Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 5 +++++ > Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 5 +++++ > 2 files changed, 10 insertions(+) > > diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc > index 8a100e0d9a3c..0a987cc3b118 100644 > --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc > +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc > @@ -375,6 +375,11 @@ DEFINE DO_KCS = 0 > # Size of the region used by UEFI in permanent memory (Reserved 64MB) > gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000 > > + # 40 bits of VA space is sufficient to support up to 512 GB of RAM in the > + # range 0x80_0000_0000 - 0xFF_FFFF_FFFF (all platform and PCI MMIO is below > + # that) > + gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40 > + > # > # ARM PrimeCell > # > diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc > index 38c3309dcff1..72ceb8b6994e 100644 > --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc > +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc > @@ -382,6 +382,11 @@ DEFINE DO_KCS = 1 > # Size of the region used by UEFI in permanent memory (Reserved 64MB) > gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000 > > + # 40 bits of VA space is sufficient to support up to 512 GB of RAM in the > + # range 0x80_0000_0000 - 0xFF_FFFF_FFFF (all platform and PCI MMIO is below > + # that) > + gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40 > + > # > # ARM PrimeCell > # > -- > 2.7.4 >