From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-x235.google.com (mail-wm0-x235.google.com [IPv6:2a00:1450:400c:c09::235]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E5BB71A1E3A for ; Tue, 13 Sep 2016 03:43:28 -0700 (PDT) Received: by mail-wm0-x235.google.com with SMTP id c131so105016721wmh.0 for ; Tue, 13 Sep 2016 03:43:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=nzVoUc7rcmlHinW1jRmz7Eyhi9PA4kxrxdjzrksWDY4=; b=jUpKlkxGepJCAsMnLsj15I9vagq2zyADYOfQ1aJoMSj27iGBqr16cvc8oa0vxN25cj Yl77xSwQUyjLEIbE7nW/aEYCkMx/z0FisQ/CdQf5+RU7/tBCRqXfdV1Lm3Hgg2A8X9GP TmR9vMAzOVA7sHrGEsUKSYiJwTOdQxcPMS6B0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=nzVoUc7rcmlHinW1jRmz7Eyhi9PA4kxrxdjzrksWDY4=; b=LZtaZsFKRAGyzDjXI5RcdRv88EcZETHMoffZGCTBltMlLOOVsIQ6wNEJxgZ+Z8C9LK t/Lo+2ZEwY9LVF/zRStri1RDUaXRQyVyJes+OyyCylQajPgRvGto0z0YGM4S4S6h3iD/ p93Sx51Nhr/aUP7AieJN2sXWY7oM13AwGuVHEcu221RtHD3zn6fgBh/o5nThFWb9J8kN LKM0qbVboRjdD7I5Km5A4iEgiZOVaVgpSheCCoEKaRfu6apqLXz6R2eQUuSwvrHndKEV YIlgcwzcVVTW1iMsqVH8+BeQYgV9Nby3RfOpKmoofQB6TdilQVJ+zUD3W/nxGJJSdx1a 25kw== X-Gm-Message-State: AE9vXwOCqobGhUSSZAQpcFW0NtfGYdKKwVYbmpWnQm+oX08/RkiEaa/0128C9Z3obD/fe/SV X-Received: by 10.28.1.85 with SMTP id 82mr20458wmb.11.1473763407455; Tue, 13 Sep 2016 03:43:27 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id m5sm28891815wmd.1.2016.09.13.03.43.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 13 Sep 2016 03:43:26 -0700 (PDT) Date: Tue, 13 Sep 2016 11:43:25 +0100 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org, eugene@hp.com Message-ID: <20160913104325.GV16080@bivouac.eciton.net> References: <1473408939-18044-1-git-send-email-ard.biesheuvel@linaro.org> <1473408939-18044-2-git-send-email-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <1473408939-18044-2-git-send-email-ard.biesheuvel@linaro.org> User-Agent: Mutt/1.5.23 (2014-03-12) Subject: Re: [PATCH 2/2] Platforms/ARM/FVP: limit VA range to 36 bits X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 13 Sep 2016 10:43:29 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Fri, Sep 09, 2016 at 09:15:39AM +0100, Ard Biesheuvel wrote: > The FVP model has up to 8 GB of memory (on the Base model), where the > top 6GB starts at 0x8_8000_0000, and all other memory regions of interest > live below that. This means we can cover the whole VA space with 36-bits > worth of VA. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm > --- > Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc > index 3d8e0cfbb57e..60df45dca276 100644 > --- a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc > +++ b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc > @@ -175,6 +175,9 @@ > # Set tick frequency value to 100Mhz > gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|100000000 > > + # the entire FVP address space can be covered by 36 bit VAs > + gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|36 > + > [PcdsDynamicDefault.common] > # > # The size of a dynamic PCD of the (VOID*) type can not be increased at run > -- > 2.7.4 >