From: Dennis Chen <dennis.chen@arm.com>
To: Laszlo Ersek <lersek@redhat.com>
Cc: <edk2-devel@ml01.01.org>, <nd@arm.com>,
Leif Lindholm <leif.lindholm@linaro.org>,
Ard Biesheuvel <ard.biesheuvel@linaro.org>
Subject: Re: [RESEND PATCH] ArmVirtPkg: Bit width adaption in ASSERT()
Date: Mon, 24 Oct 2016 11:01:42 +0800 [thread overview]
Message-ID: <20161024030141.GB24636@arm.com> (raw)
In-Reply-To: <6e4f61bc-fdc0-a08c-c38a-b9e7696b5a2b@redhat.com>
Hello Laszlo,
On Fri, Oct 21, 2016 at 10:02:45AM +0200, Laszlo Ersek wrote:
> On 10/21/16 07:50, Dennis Chen wrote:
> > Since All the GIC base address variables has been aligned to 64-bit, it
> > doesn't make sense to continue use MAX_UINT32 in ASSERT() statement, so
> > this patch uses MAX_UINTN to adapt to this kind of change.
> >
> > Contributed-under: TianoCore Contribution Agreement 1.0
> > Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> > Cc: Leif Lindholm <leif.lindholm@linaro.org>
> > Cc: Laszlo Ersek <lersek@redhat.com>
> > Signed-off-by: Dennis Chen <dennis.chen@arm.com>
> > ---
> > ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c | 8 ++++----
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c
> > index 64afc4d..6488061 100644
> > --- a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c
> > +++ b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c
> > @@ -79,11 +79,11 @@ ArmVirtGicArchLibConstructor (
> >
> > // RegProp[0..1] == { GICD base, GICD size }
> > DistBase = SwapBytes64 (Reg[0]);
> > - ASSERT (DistBase < MAX_UINT32);
> > + ASSERT (DistBase < MAX_UINTN);
> >
> > // RegProp[2..3] == { GICR base, GICR size }
> > RedistBase = SwapBytes64 (Reg[2]);
> > - ASSERT (RedistBase < MAX_UINT32);
> > + ASSERT (RedistBase < MAX_UINTN);
> >
> > PcdSet64 (PcdGicDistributorBase, DistBase);
> > PcdSet64 (PcdGicRedistributorsBase, RedistBase);
> > @@ -117,8 +117,8 @@ ArmVirtGicArchLibConstructor (
> >
> > DistBase = SwapBytes64 (Reg[0]);
> > CpuBase = SwapBytes64 (Reg[2]);
> > - ASSERT (DistBase < MAX_UINT32);
> > - ASSERT (CpuBase < MAX_UINT32);
> > + ASSERT (DistBase < MAX_UINTN);
> > + ASSERT (CpuBase < MAX_UINTN);
> >
> > PcdSet64 (PcdGicDistributorBase, DistBase);
> > PcdSet64 (PcdGicInterruptInterfaceBase, CpuBase);
> >
>
> Ard, can you please handle this iteration of the patch as well?
>
> I do have one suggestion, for the subject:
>
> ArmVirtPkg/ArmVirtGicArchLib: adapt ASSERT()s to 64-bit base addresses
>
> If you guys agree, I think it can be done on commit. With that,
>
I think Ard will not have any reason to reject this nice suggestion :), so do I.
so it's a deal...
Thanks,
Dennis
>
> Acked-by: Laszlo Ersek <lersek@redhat.com>
>
> Thanks
> Laszlo
>
prev parent reply other threads:[~2016-10-24 3:01 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-21 5:50 [RESEND PATCH] ArmVirtPkg: Bit width adaption in ASSERT() Dennis Chen
2016-10-21 8:02 ` Laszlo Ersek
2016-10-21 8:21 ` Ard Biesheuvel
2016-10-24 3:01 ` Dennis Chen [this message]
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