From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-x235.google.com (mail-wm0-x235.google.com [IPv6:2a00:1450:400c:c09::235]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 2210181C49 for ; Tue, 1 Nov 2016 14:45:46 -0700 (PDT) Received: by mail-wm0-x235.google.com with SMTP id p190so231147147wmp.1 for ; Tue, 01 Nov 2016 14:45:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=URpCG2wsmi/9GS0D48fO+JCx7eelPUpOvVocR2LQ1ig=; b=FvZ+/RJIo2dHDD7MrcYFxMTy1eTWauKWe60eb7Wby/cyBb5UmuiRC/6h1A6/pT8abK tIyzRyqXHmSEYppnmR2hnsdwoGDyGpW65IVSKeqI5txGcm1SAmsO4MEJ3Fj+mB0A3T8t LCe5M8GXsW16AWLCaqBD1cyYtwtf0PhPb1B6M= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=URpCG2wsmi/9GS0D48fO+JCx7eelPUpOvVocR2LQ1ig=; b=m9QwkaB+nJWX2e9wrvsuVnjW+pZmox0vyGfiS2UDfsZCk/K4kULwfZ4M+mWXlf6+OO IiaO1Xp5WSMjH42OyYQJKa3MCfFWp0cj5sxd5bkIzXvpP+gwrwHgfMcNTcezTkfy82U/ tWKzfcmxGt5b3xT2jiQEFjAHluLcZeCRd7WI2WXIhfoGzkcrqtpvaWqpfYv/ntQ7sYXE Mg0LGvBJYog9/0m114sGmhe/9n9xYWzgIWJR/5QCW4smpaKRrJ9sOPrYFV/kxOg7F9c0 m1rYK/WnQfWOzT+GZk+C49SMkGtLkzsaRHewtJxy24kWsU6wQsuNpFt7feTTdm+8YIVq ty9w== X-Gm-Message-State: ABUngvfHaVKL4i4VqhbLwFoTzaPQJu9j3cBkYfMKhF8pz2sHRXDq84QW+jS0xmJEEqRwCn/t X-Received: by 10.194.205.1 with SMTP id lc1mr144229wjc.192.1478036746199; Tue, 01 Nov 2016 14:45:46 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id p13sm32674818wmd.20.2016.11.01.14.45.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 01 Nov 2016 14:45:45 -0700 (PDT) Date: Tue, 1 Nov 2016 21:45:43 +0000 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org Message-ID: <20161101214543.GL1161@bivouac.eciton.net> References: <1477937590-10361-1-git-send-email-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <1477937590-10361-1-git-send-email-ard.biesheuvel@linaro.org> User-Agent: Mutt/1.5.23 (2014-03-12) Subject: Re: [PATCH 0/5] EmbeddedPkg: generic support for reusing PCI drivers for platform devices X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 01 Nov 2016 21:45:46 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Mon, Oct 31, 2016 at 06:13:05PM +0000, Ard Biesheuvel wrote: > After having reviewed PciEmulation.c #6, it is time to implement this in a > more generic way, taking into account DMA limitations and DMA coherency. > > So implement a new platform PCI I/O protocol, and a UEFI_DRIVER module that > binds to those protocols to expose the PCI I/O abstraction that generic > AHCI/XHCI etc drivers can talk to. > > Tested with AHCI on QEMU. So, a) I'm really happy to see this - it doesn't solve the peripherally connected issue with how to provide an interface to enable UEFI drivers for devices on non-discoverable buses, but it suggests I've been wrong to see them as the same thing. And if this means we never have to merge #6 at all, everybody wins. But b) I'm currently jetlagged and at 2200m altitude, so prepare for even more silly questions than usual. > Ard Biesheuvel (5): > EmbeddedPkg: introduce platform PCI I/O protocol > EmbeddedPkg: introduce platform PCI I/O registration library > EmbeddedPkg: implement generic platform PCI I/O driver > ArmPkg/CpuDxe: set DmaBufferAlignment according to CWG > EmbeddedPkg/PlatformPciIoDxe: add support for non-coherent DMA > > ArmPkg/Drivers/CpuDxe/CpuDxe.c | 4 +- > EmbeddedPkg/Drivers/PlatformPciIoDxe/PlatformPciIo.c | 853 ++++++++++++++++++++ > EmbeddedPkg/Drivers/PlatformPciIoDxe/PlatformPciIo.h | 72 ++ > EmbeddedPkg/Drivers/PlatformPciIoDxe/PlatformPciIoDxe.c | 271 +++++++ > EmbeddedPkg/Drivers/PlatformPciIoDxe/PlatformPciIoDxe.inf | 43 + > EmbeddedPkg/EmbeddedPkg.dec | 2 + > EmbeddedPkg/EmbeddedPkg.dsc | 3 + > EmbeddedPkg/Include/Library/PlatformPciIoDeviceRegistrationLib.h | 46 ++ > EmbeddedPkg/Include/Protocol/PlatformPciIo.h | 74 ++ > EmbeddedPkg/Library/PlatformPciIoDeviceRegistrationLib/PlatformPciIoDeviceRegistrationLib.c | 115 +++ > EmbeddedPkg/Library/PlatformPciIoDeviceRegistrationLib/PlatformPciIoDeviceRegistrationLib.inf | 34 + > 11 files changed, 1516 insertions(+), 1 deletion(-) > create mode 100644 EmbeddedPkg/Drivers/PlatformPciIoDxe/PlatformPciIo.c > create mode 100644 EmbeddedPkg/Drivers/PlatformPciIoDxe/PlatformPciIo.h > create mode 100644 EmbeddedPkg/Drivers/PlatformPciIoDxe/PlatformPciIoDxe.c > create mode 100644 EmbeddedPkg/Drivers/PlatformPciIoDxe/PlatformPciIoDxe.inf > create mode 100644 EmbeddedPkg/Include/Library/PlatformPciIoDeviceRegistrationLib.h > create mode 100644 EmbeddedPkg/Include/Protocol/PlatformPciIo.h > create mode 100644 EmbeddedPkg/Library/PlatformPciIoDeviceRegistrationLib/PlatformPciIoDeviceRegistrationLib.c > create mode 100644 EmbeddedPkg/Library/PlatformPciIoDeviceRegistrationLib/PlatformPciIoDeviceRegistrationLib.inf > > -- > 2.7.4 >