From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 2F23481D9F for ; Wed, 9 Nov 2016 22:07:15 -0800 (PST) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP; 09 Nov 2016 22:07:18 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,617,1473145200"; d="scan'208";a="784712526" Received: from jfan12-desk.ccr.corp.intel.com ([10.239.9.5]) by FMSMGA003.fm.intel.com with ESMTP; 09 Nov 2016 22:07:17 -0800 From: Jeff Fan To: edk2-devel@lists.01.org Date: Thu, 10 Nov 2016 14:07:06 +0800 Message-Id: <20161110060708.13932-1-jeff.fan@intel.com> X-Mailer: git-send-email 2.9.3.windows.2 Subject: [PATCH 0/2] Put AP into safe hlt-loop code on S3 path X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 10 Nov 2016 06:07:15 -0000 On S3 path, we will wake up APs to restore CPU context in PiSmmCpuDxeSmm driver. In case, one NMI or SMI happens, APs may exit from hlt state and execute the instruction after HLT instruction. But APs are not running on safe code, it leads OVMF S3 boot unstable. https://bugzilla.tianocore.org/show_bug.cgi?id=216 I tested real platform with 64bit DXE. Jeff Fan (2): UefiCpuPkg/PiSmmCpuDxeSmm: Put AP into safe hlt-loop code on S3 path UefiCpuPkg/PiSmmCpuDxeSmm: Place AP to 32bit protected mode on S3 path UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 31 ++++++++++++++ UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c | 25 ++++++++++++ UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 13 ++++++ UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c | 59 +++++++++++++++++++++++++++ 4 files changed, 128 insertions(+) -- 2.9.3.windows.2