From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-x231.google.com (mail-wm0-x231.google.com [IPv6:2a00:1450:400c:c09::231]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 0CADD81E0A for ; Mon, 14 Nov 2016 07:18:12 -0800 (PST) Received: by mail-wm0-x231.google.com with SMTP id f82so104344412wmf.1 for ; Mon, 14 Nov 2016 07:18:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=ME8CcnlCHZIeHScaWdcGJPKcDKZ/bwD192VeNhpdxCE=; b=BYDO1zTE6vSfrkQ9FRpeapfGUySQ+Do8KWpH7YYgCgCqKD+vTA7lsBguvy/MDdTdzC ZC7wg6QDm2vXzwkDhadhsW+IGOAHq6F8TY6EXqIpqDbYpTtQpdv76AESs0SyQVkYkVA0 ucsgj70vyPwMViALZRHXh9fUMp3TKei6LxDEM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=ME8CcnlCHZIeHScaWdcGJPKcDKZ/bwD192VeNhpdxCE=; b=MwgkBDXEKFunURt84AbxZMs+7uhIh4NbKTvMl9+m+6y6PK+BoMUZq1TSV6V8cxgIR2 Pj8vcmAat6E+tnXvGsnXB9adc/bL6cR/gr3zl+NgdlzOHfffdThODHv0OAyLObqoFLbw 52oE64MkPMgFiZRjy8iEXlTebXygl1o+LIGLrR0B8vVZJTF3ZuPfsh8gV0B0KkJ62hPA 1kVgADBEUl5wyUCIfZWdSylh7OzLn6CuR6yWG382xB6xFHWYXCOi957VNr1DkHt1JKg3 v81T5NJdVSxbG8JtVGAikqf7Z9xI58XpB/qB83XHCU5w+C+TYT2/gJshWwVF48FVQytN e4+w== X-Gm-Message-State: ABUngveXkG3ir+73nFNBBXmM+6Ca60+WhgjAV4/RdvFp1sexRNZhyO1V0JQKME7OPcRkhBA0 X-Received: by 10.194.165.228 with SMTP id zb4mr20048990wjb.31.1479136695249; Mon, 14 Nov 2016 07:18:15 -0800 (PST) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id t84sm8274629wmt.7.2016.11.14.07.18.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 14 Nov 2016 07:18:14 -0800 (PST) Date: Mon, 14 Nov 2016 15:18:12 +0000 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org Message-ID: <20161114151812.GT27644@bivouac.eciton.net> References: <1478955748-14819-1-git-send-email-ard.biesheuvel@linaro.org> <1478955748-14819-2-git-send-email-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <1478955748-14819-2-git-send-email-ard.biesheuvel@linaro.org> User-Agent: Mutt/1.5.23 (2014-03-12) Subject: Re: [PATCH v2 1/4] ArmPkg/ArmDmaLib: use DMA buffer alignment from CPU arch protocol X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 14 Nov 2016 15:18:12 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Sat, Nov 12, 2016 at 02:02:25PM +0100, Ard Biesheuvel wrote: > Instead of depending on ArmLib to retrieve the CWG directly, use > the DMA buffer alignment exposed by the CPU arch protocol. This > removes our dependency on ArmLib, which makes the library a bit > more architecture independent. > > While we're in there, rename gCpu to mCpu to better reflect its > local scope, and reflow some lines that we're modifying anyway. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm > --- > ArmPkg/Library/ArmDmaLib/ArmDmaLib.c | 18 ++++++++---------- > ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf | 2 -- > 2 files changed, 8 insertions(+), 12 deletions(-) > > diff --git a/ArmPkg/Library/ArmDmaLib/ArmDmaLib.c b/ArmPkg/Library/ArmDmaLib/ArmDmaLib.c > index d48d6ff6dbbb..03fd9f3278e6 100644 > --- a/ArmPkg/Library/ArmDmaLib/ArmDmaLib.c > +++ b/ArmPkg/Library/ArmDmaLib/ArmDmaLib.c > @@ -22,7 +22,6 @@ > #include > #include > #include > -#include > > #include > > @@ -36,8 +35,7 @@ typedef struct { > > > > -EFI_CPU_ARCH_PROTOCOL *gCpu; > -UINTN gCacheAlignment = 0; > +STATIC EFI_CPU_ARCH_PROTOCOL *mCpu; > > /** > Provides the DMA controller-specific addresses needed to access system memory. > @@ -92,8 +90,8 @@ DmaMap ( > > *Mapping = Map; > > - if ((((UINTN)HostAddress & (gCacheAlignment - 1)) != 0) || > - ((*NumberOfBytes & (gCacheAlignment - 1)) != 0)) { > + if ((((UINTN)HostAddress & (mCpu->DmaBufferAlignment - 1)) != 0) || > + ((*NumberOfBytes & (mCpu->DmaBufferAlignment - 1)) != 0)) { > > // Get the cacheability of the region > Status = gDS->GetMemorySpaceDescriptor (*DeviceAddress, &GcdDescriptor); > @@ -154,7 +152,8 @@ DmaMap ( > DEBUG_CODE_END (); > > // Flush the Data Cache (should not have any effect if the memory region is uncached) > - gCpu->FlushDataCache (gCpu, *DeviceAddress, *NumberOfBytes, EfiCpuFlushTypeWriteBackInvalidate); > + mCpu->FlushDataCache (mCpu, *DeviceAddress, *NumberOfBytes, > + EfiCpuFlushTypeWriteBackInvalidate); > } > > Map->HostAddress = (UINTN)HostAddress; > @@ -211,7 +210,8 @@ DmaUnmap ( > // > // Make sure we read buffer from uncached memory and not the cache > // > - gCpu->FlushDataCache (gCpu, Map->HostAddress, Map->NumberOfBytes, EfiCpuFlushTypeInvalidate); > + mCpu->FlushDataCache (mCpu, Map->HostAddress, Map->NumberOfBytes, > + EfiCpuFlushTypeInvalidate); > } > } > > @@ -311,11 +311,9 @@ ArmDmaLibConstructor ( > EFI_STATUS Status; > > // Get the Cpu protocol for later use > - Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&gCpu); > + Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&mCpu); > ASSERT_EFI_ERROR(Status); > > - gCacheAlignment = ArmCacheWritebackGranule (); > - > return Status; > } > > diff --git a/ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf b/ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf > index 95c13006eaac..31de3cfd828c 100644 > --- a/ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf > +++ b/ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf > @@ -37,8 +37,6 @@ [LibraryClasses] > UncachedMemoryAllocationLib > IoLib > BaseMemoryLib > - ArmLib > - > > [Protocols] > gEfiCpuArchProtocolGuid > -- > 2.7.4 >