From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 0649681E66 for ; Mon, 14 Nov 2016 18:23:45 -0800 (PST) Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga105.fm.intel.com with ESMTP; 14 Nov 2016 18:23:49 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,640,1473145200"; d="scan'208";a="31034329" Received: from jfan12-desk.ccr.corp.intel.com ([10.239.9.5]) by orsmga004.jf.intel.com with ESMTP; 14 Nov 2016 18:23:47 -0800 From: Jeff Fan To: edk2-devel@lists.01.org Cc: Paolo Bonzini , Laszlo Ersek , Jiewen Yao , Feng Tian , Michael D Kinney Date: Tue, 15 Nov 2016 10:23:44 +0800 Message-Id: <20161115022345.10620-2-jeff.fan@intel.com> X-Mailer: git-send-email 2.9.3.windows.2 In-Reply-To: <20161115022345.10620-1-jeff.fan@intel.com> References: <20161115022345.10620-1-jeff.fan@intel.com> Subject: [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Add volatile for mNumberToFinish X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Nov 2016 02:23:45 -0000 The GCC 5.4 will optimize mNumberToFinish in EarlyInitializeCpu(). It will cause S3 resume failure. Adding *volatile* could make sure compiler does not so such optimization. Cc: Paolo Bonzini Cc: Laszlo Ersek Cc: Jiewen Yao Cc: Feng Tian Cc: Michael D Kinney Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan --- UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c index 3fb6864..f13ff3e 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c @@ -55,7 +55,7 @@ AsmGetAddressMap ( #define LEGACY_REGION_BASE (0xA0000 - LEGACY_REGION_SIZE) ACPI_CPU_DATA mAcpiCpuData; -UINT32 mNumberToFinish; +volatile UINT32 mNumberToFinish; MP_CPU_EXCHANGE_INFO *mExchangeInfo; BOOLEAN mRestoreSmmConfigurationInS3 = FALSE; VOID *mGdtForAp = NULL; @@ -371,7 +371,7 @@ EarlyMPRendezvousProcedure ( // // Count down the number with lock mechanism. // - InterlockedDecrement (&mNumberToFinish); + InterlockedDecrement ((UINT32 *) &mNumberToFinish); } /** @@ -406,7 +406,7 @@ MPRendezvousProcedure ( TopOfStack = (UINT32) (UINTN) Stack + sizeof (Stack); TopOfStack &= ~(UINT32) (CPU_STACK_ALIGNMENT - 1); CopyMem ((VOID *) (UINTN) mApHltLoopCode, mApHltLoopCodeTemplate, sizeof (mApHltLoopCodeTemplate)); - TransferApToSafeState ((UINT32) (UINTN) mApHltLoopCode, TopOfStack, &mNumberToFinish); + TransferApToSafeState ((UINT32) (UINTN) mApHltLoopCode, TopOfStack, (UINT32 *) &mNumberToFinish); } /** -- 2.9.3.windows.2