From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5C96C81F1B for ; Fri, 18 Nov 2016 05:52:57 -0800 (PST) Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 6F0838FD05; Fri, 18 Nov 2016 13:53:02 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-70.phx2.redhat.com [10.3.116.70]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id uAIDqrU4013644; Fri, 18 Nov 2016 08:53:00 -0500 From: Laszlo Ersek To: edk2-devel-01 Cc: Jeff Fan , Jordan Justen , Michael Kinney , Paolo Bonzini Date: Fri, 18 Nov 2016 14:52:48 +0100 Message-Id: <20161118135249.26018-4-lersek@redhat.com> In-Reply-To: <20161118135249.26018-1-lersek@redhat.com> References: <20161118135249.26018-1-lersek@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Fri, 18 Nov 2016 13:53:02 +0000 (UTC) Subject: [PATCH v2 3/4] OvmfPkg/IndustryStandard: add macros for QEMU's SMI feature control bits X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Nov 2016 13:52:57 -0000 The bits are specified in "docs/specs/q35-apm-sts.txt" in the QEMU tree. Cc: Jeff Fan Cc: Jordan Justen Cc: Michael Kinney Cc: Paolo Bonzini Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=230 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek --- Notes: v2: - new in v2 OvmfPkg/Include/IndustryStandard/Q35MchIch9.h | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h b/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h index 4dc2c39901c1..5848c5202912 100644 --- a/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h +++ b/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h @@ -91,8 +91,13 @@ // // IO ports // -#define ICH9_APM_CNT 0xB2 -#define ICH9_APM_STS 0xB3 +#define ICH9_APM_CNT 0xB2 +#define ICH9_APM_STS 0xB3 +// +// The following bits are QEMU extensions. +// +#define QEMU_ICH9_APM_STS_GET_SET_FEAT BIT1 +#define QEMU_ICH9_APM_STS_F_BCAST_SMI BIT2 // // IO ports relative to PMBASE -- 2.9.2