From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A6BF281F23 for ; Thu, 1 Dec 2016 09:56:44 -0800 (PST) Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1E8F34C36F; Thu, 1 Dec 2016 17:56:44 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-138.phx2.redhat.com [10.3.116.138]) by int-mx11.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id uB1HuaWr018501; Thu, 1 Dec 2016 12:56:43 -0500 From: Laszlo Ersek To: edk2-devel-01 Cc: Ard Biesheuvel , Jordan Justen Date: Thu, 1 Dec 2016 18:56:31 +0100 Message-Id: <20161201175633.2538-4-lersek@redhat.com> In-Reply-To: <20161201175633.2538-1-lersek@redhat.com> References: <20161201175633.2538-1-lersek@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.24 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Thu, 01 Dec 2016 17:56:44 +0000 (UTC) Subject: [PATCH 3/5] OvmfPkg/IndustryStandard: add QemuFwCfgDma.h X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 01 Dec 2016 17:56:44 -0000 Add the type and macro definitions related to QEMU's DMA-like fw_cfg access method in a dedicated header file. Cc: Ard Biesheuvel Cc: Jordan Justen Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek --- OvmfPkg/Include/IndustryStandard/QemuFwCfgDma.h | 50 ++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/OvmfPkg/Include/IndustryStandard/QemuFwCfgDma.h b/OvmfPkg/Include/IndustryStandard/QemuFwCfgDma.h new file mode 100644 index 000000000000..37a5804adb05 --- /dev/null +++ b/OvmfPkg/Include/IndustryStandard/QemuFwCfgDma.h @@ -0,0 +1,50 @@ +/** @file + Macro and type definitions related to QEMU's DMA-like fw_cfg access method, + based on "docs/specs/fw_cfg.txt" in the QEMU tree. + + Copyright (C) 2016, Red Hat, Inc. + + This program and the accompanying materials are licensed and made available + under the terms and conditions of the BSD License which accompanies this + distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT + WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +**/ + + +#ifndef __FW_CFG_DMA__ +#define __FW_CFG_DMA__ + +#include + +// +// If the following bit is set in the UINT32 fw_cfg revision / feature bitmap +// -- read from key 0x0001 with the basic IO Port or MMIO method --, then the +// DMA interface is available. +// +#define FW_CFG_F_DMA BIT1 + +// +// Communication structure for the DMA access method. All fields are encoded in +// big endian. +// +#pragma pack (1) +typedef struct { + UINT32 Control; + UINT32 Length; + UINT64 Address; +} FW_CFG_DMA_ACCESS; +#pragma pack () + +// +// Macros for the FW_CFG_DMA_ACCESS.Control bitmap (in native encoding). +// +#define FW_CFG_DMA_CTL_ERROR BIT0 +#define FW_CFG_DMA_CTL_READ BIT1 +#define FW_CFG_DMA_CTL_SKIP BIT2 +#define FW_CFG_DMA_CTL_SELECT BIT3 +#define FW_CFG_DMA_CTL_WRITE BIT4 + +#endif -- 2.9.2