From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id DD41981E10 for ; Wed, 18 Jan 2017 01:54:27 -0800 (PST) Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga103.fm.intel.com with ESMTP; 18 Jan 2017 01:54:28 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,249,1477983600"; d="scan'208";a="54624153" Received: from zwei4-mobl.ccr.corp.intel.com ([10.239.198.50]) by fmsmga005.fm.intel.com with ESMTP; 18 Jan 2017 01:54:26 -0800 From: zwei4 To: edk2-devel@lists.01.org Cc: Mike Wu , Benjamin You , Mang Guo , Shifei Lu , Ruth Li , Junjie He Date: Wed, 18 Jan 2017 17:54:22 +0800 Message-Id: <20170118095422.2696-1-david.wei@intel.com> X-Mailer: git-send-email 2.11.0.windows.1 Subject: [Patch][edk2-platforms/devel-MinnowBoard3 2/2] Restore P2SB MMIO X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 18 Jan 2017 09:54:28 -0000 Restore P2SB's, as well as GPIO controllers', MMIO resources to original values which have been overridden by PCI bus driver. Signed-off-by: zwei4 Cc: Mike Wu Cc: Benjamin You Cc: Mang Guo Cc: Shifei Lu Cc: Ruth Li Cc: Junjie He --- .../BroxtonSoC/BroxtonSiPkg/SouthCluster/ScInit/Dxe/ScInit.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/ScInit/Dxe/ScInit.c b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/ScInit/Dxe/ScInit.c index 6fb6c8df4..c4a9d5088 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/ScInit/Dxe/ScInit.c +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/ScInit/Dxe/ScInit.c @@ -1,7 +1,7 @@ /** @file This is the driver that initializes the Intel SC devices - Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License @@ -111,6 +111,16 @@ ScOnPciEnumComplete ( gBS->CloseEvent (Event); // + // Restore P2SB and GPIO controlers's Base Address to original value which is overridden by PCI BUS driver. + // P2SB will be switched to ACPI mode at exit boot service, so it's resource must be allocated from ACPI_MMIO_BASE_ADDRESS + // region, to avoid resource conflict with PCI resource used by PCI_HOST.asl. + // + MmioWrite32 ( + MmPciAddress (0, DEFAULT_PCI_BUS_NUMBER_SC, PCI_DEVICE_NUMBER_P2SB, PCI_FUNCTION_NUMBER_P2SB, R_P2SB_BASE), + (UINT32) ((PcdGet32 (PcdP2SBBaseAddress))) + ); + + // // Get SC PMC fuction disable reset HOB. // HobPtr.Guid = GetFirstGuidHob (&gScPmcFunctionDisableResetHobGuid); -- 2.11.0.windows.1