From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 940F081FA4 for ; Wed, 25 Jan 2017 22:09:33 -0800 (PST) Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga105.jf.intel.com with ESMTP; 25 Jan 2017 22:09:33 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,287,1477983600"; d="scan'208";a="57682420" Received: from ray-dev.ccr.corp.intel.com ([10.239.9.25]) by fmsmga005.fm.intel.com with ESMTP; 25 Jan 2017 22:09:32 -0800 From: Ruiyu Ni To: edk2-devel@lists.01.org Cc: Jeff Fan , Feng Tian Date: Thu, 26 Jan 2017 14:09:25 +0800 Message-Id: <20170126060927.352436-4-ruiyu.ni@intel.com> X-Mailer: git-send-email 2.9.0.windows.1 In-Reply-To: <20170126060927.352436-1-ruiyu.ni@intel.com> References: <20170126060927.352436-1-ruiyu.ni@intel.com> Subject: [PATCH 3/5] MdeModulePkg/PciBus: Accept Spec values as BarIndex and Alignment X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 26 Jan 2017 06:09:33 -0000 PI spec IncompatiblePciSupport part defines (UINT64) -1 as all BARs and 0 to use existing alignment. PciBus driver didn't accept these values. It treated 0xFF as all BARs and 0xFFFFFFFFFFFFFFFFULL to use existing alignment. The patch changes the code to still accept old values while also accept values defined in PI spec. So that the driver can provide backward compatibility and follow spec. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni Cc: Jeff Fan Cc: Feng Tian --- MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c index ac4d323..4ddec1f 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c @@ -1,7 +1,7 @@ /** @file PCI emumeration support functions implementation for PCI Bus module. -Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
(C) Copyright 2015 Hewlett Packard Enterprise Development LP
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License @@ -1335,8 +1335,8 @@ UpdatePciInfo ( ) { EFI_STATUS Status; - UINTN BarIndex; - UINTN BarEndIndex; + UINT64 BarIndex; + UINT64 BarEndIndex; BOOLEAN SetFlag; VOID *Configuration; EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr; @@ -1390,18 +1390,19 @@ UpdatePciInfo ( break; } - BarIndex = (UINTN) Ptr->AddrTranslationOffset; + BarIndex = Ptr->AddrTranslationOffset; BarEndIndex = BarIndex; // // Update all the bars in the device + // Compare against PCI_BAR_ALL is to keep backward compatibility. // - if (BarIndex == PCI_BAR_ALL) { + if ((BarIndex == (UINT64)-1) || (BarIndex == PCI_BAR_ALL)) { BarIndex = 0; BarEndIndex = PCI_MAX_BAR - 1; } - if (BarIndex > PCI_MAX_BAR) { + if (BarIndex >= PCI_MAX_BAR) { Ptr++; continue; } @@ -1472,7 +1473,7 @@ UpdatePciInfo ( // // Update the new length for the device // - if (Ptr->AddrLen != PCI_BAR_NOCHANGE) { + if (Ptr->AddrLen != 0) { PciIoDevice->PciBar[BarIndex].Length = Ptr->AddrLen; } } @@ -1506,7 +1507,7 @@ SetNewAlign ( // The new alignment is the same as the original, // so skip it // - if (NewAlignment == PCI_BAR_OLD_ALIGN) { + if ((NewAlignment == 0) || (NewAlignment == PCI_BAR_OLD_ALIGN)) { return ; } // -- 2.9.0.windows.1