From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id BAA9181F28 for ; Mon, 20 Feb 2017 00:25:24 -0800 (PST) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Feb 2017 00:25:24 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,185,1484035200"; d="scan'208";a="227410914" Received: from jfan12-desk.ccr.corp.intel.com ([10.239.9.5]) by fmsmga004.fm.intel.com with ESMTP; 20 Feb 2017 00:25:23 -0800 From: Jeff Fan To: edk2-devel@lists.01.org Date: Mon, 20 Feb 2017 16:25:14 +0800 Message-Id: <20170220082515.16796-1-jeff.fan@intel.com> X-Mailer: git-send-email 2.9.3.windows.2 Subject: [PATCH] Fix SMRR2 bug. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 20 Feb 2017 08:25:24 -0000 Signed-off-by: Jeff Fan --- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 54 ++++++++++++++++++------------ UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 2 ++ UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c | 25 ++++++++++++-- UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.h | 5 +++ UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 14 +++----- 5 files changed, 66 insertions(+), 34 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c index fc7714a..f01a896 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c @@ -939,6 +939,9 @@ PiCpuSmmEntry ( return EFI_SUCCESS; } +EFI_SMRAM_DESCRIPTOR *mSmramRanges; +UINTN mSmramRangeCount; + /** Find out SMRAM information including SMRR base and SMRR size. @@ -957,8 +960,6 @@ FindSmramInfo ( UINTN Size; EFI_SMM_ACCESS2_PROTOCOL *SmmAccess; EFI_SMRAM_DESCRIPTOR *CurrentSmramRange; - EFI_SMRAM_DESCRIPTOR *SmramRanges; - UINTN SmramRangeCount; UINTN Index; UINT64 MaxSize; BOOLEAN Found; @@ -976,31 +977,35 @@ FindSmramInfo ( Status = SmmAccess->GetCapabilities (SmmAccess, &Size, NULL); ASSERT (Status == EFI_BUFFER_TOO_SMALL); - SmramRanges = (EFI_SMRAM_DESCRIPTOR *)AllocatePool (Size); - ASSERT (SmramRanges != NULL); + mSmramRanges = (EFI_SMRAM_DESCRIPTOR *)AllocatePool (Size); + ASSERT (mSmramRanges != NULL); - Status = SmmAccess->GetCapabilities (SmmAccess, &Size, SmramRanges); + Status = SmmAccess->GetCapabilities (SmmAccess, &Size, mSmramRanges); ASSERT_EFI_ERROR (Status); - SmramRangeCount = Size / sizeof (EFI_SMRAM_DESCRIPTOR); + mSmramRangeCount = Size / sizeof (EFI_SMRAM_DESCRIPTOR); // // Find the largest SMRAM range between 1MB and 4GB that is at least 256K - 4K in size // CurrentSmramRange = NULL; - for (Index = 0, MaxSize = SIZE_256KB - EFI_PAGE_SIZE; Index < SmramRangeCount; Index++) { + for (Index = 0, MaxSize = SIZE_256KB - EFI_PAGE_SIZE; Index < mSmramRangeCount; Index++) { + DEBUG ((DEBUG_ERROR, "%a, %d SmramRange[%d] CpuStart = %x PhysicalSize = %x\n", __FUNCTION__, __LINE__, + Index, mSmramRanges[Index].CpuStart, mSmramRanges[Index].PhysicalSize)); // // Skip any SMRAM region that is already allocated, needs testing, or needs ECC initialization // - if ((SmramRanges[Index].RegionState & (EFI_ALLOCATED | EFI_NEEDS_TESTING | EFI_NEEDS_ECC_INITIALIZATION)) != 0) { + if ((mSmramRanges[Index].RegionState & (EFI_ALLOCATED | EFI_NEEDS_TESTING | EFI_NEEDS_ECC_INITIALIZATION)) != 0) { continue; } - - if (SmramRanges[Index].CpuStart >= BASE_1MB) { - if ((SmramRanges[Index].CpuStart + SmramRanges[Index].PhysicalSize) <= BASE_4GB) { - if (SmramRanges[Index].PhysicalSize >= MaxSize) { - MaxSize = SmramRanges[Index].PhysicalSize; - CurrentSmramRange = &SmramRanges[Index]; + DEBUG ((DEBUG_ERROR, "%a, %d SmramRange[%d] CpuStart = %x PhysicalSize = %x\n", __FUNCTION__, __LINE__, + Index, mSmramRanges[Index].CpuStart, mSmramRanges[Index].PhysicalSize)); + + if (mSmramRanges[Index].CpuStart >= BASE_1MB) { + if ((mSmramRanges[Index].CpuStart + mSmramRanges[Index].PhysicalSize) <= BASE_4GB) { + if (mSmramRanges[Index].PhysicalSize >= MaxSize) { + MaxSize = mSmramRanges[Index].PhysicalSize; + CurrentSmramRange = &mSmramRanges[Index]; } } } @@ -1013,20 +1018,25 @@ FindSmramInfo ( do { Found = FALSE; - for (Index = 0; Index < SmramRangeCount; Index++) { - if (SmramRanges[Index].CpuStart < *SmrrBase && *SmrrBase == (SmramRanges[Index].CpuStart + SmramRanges[Index].PhysicalSize)) { - *SmrrBase = (UINT32)SmramRanges[Index].CpuStart; - *SmrrSize = (UINT32)(*SmrrSize + SmramRanges[Index].PhysicalSize); + for (Index = 0; Index < mSmramRangeCount; Index++) { + if (mSmramRanges[Index].CpuStart < *SmrrBase && + *SmrrBase == (mSmramRanges[Index].CpuStart + mSmramRanges[Index].PhysicalSize)) { + *SmrrBase = (UINT32)mSmramRanges[Index].CpuStart; + *SmrrSize = (UINT32)(*SmrrSize + mSmramRanges[Index].PhysicalSize); Found = TRUE; - } else if ((*SmrrBase + *SmrrSize) == SmramRanges[Index].CpuStart && SmramRanges[Index].PhysicalSize > 0) { - *SmrrSize = (UINT32)(*SmrrSize + SmramRanges[Index].PhysicalSize); + } else if ((*SmrrBase + *SmrrSize) == mSmramRanges[Index].CpuStart && mSmramRanges[Index].PhysicalSize > 0) { + *SmrrSize = (UINT32)(*SmrrSize + mSmramRanges[Index].PhysicalSize); Found = TRUE; } } } while (Found); - FreePool (SmramRanges); - DEBUG ((EFI_D_INFO, "SMRR Base: 0x%x, SMRR Size: 0x%x\n", *SmrrBase, *SmrrSize)); + DEBUG ((EFI_D_ERROR, "SMRR Base: 0x%x, SMRR Size: 0x%x\n", *SmrrBase, *SmrrSize)); + + for (Index = 0; Index < mSmramRangeCount; Index++) { + DEBUG ((EFI_D_ERROR, "mSmramRanges[%d].PhysicalStart = %x\n", Index, mSmramRanges[Index].PhysicalStart)); + DEBUG ((EFI_D_ERROR, "mSmramRanges[%d].CpuStart = %x\n", Index, mSmramRanges[Index].CpuStart)); + } } /** diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h index 69c54fb..c29d15d 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h @@ -414,6 +414,8 @@ extern UINTN mSemaphoreSize; extern SPIN_LOCK *mPFLock; extern SPIN_LOCK *mConfigSmmCodeAccessCheckLock; extern SPIN_LOCK *mMemoryMappedLock; +extern EFI_SMRAM_DESCRIPTOR *mSmramRanges; +extern UINTN mSmramRangeCount; /** Create 4G PageTable in SMRAM. diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c index f53819e..761e9a3 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c @@ -244,6 +244,23 @@ DebugExceptionHandler ( ClearTrapFlag (SystemContext); } +BOOLEAN +IsInSmmRange ( + IN EFI_PHYSICAL_ADDRESS Address + ) +{ + UINTN Index; + + for (Index = 0; Index < mSmramRangeCount; Index++) { + if (Address >= mSmramRanges[Index].CpuStart && + Address < mSmramRanges[Index].CpuStart + mSmramRanges[Index].PhysicalSize) { + DEBUG ((EFI_D_ERROR, " JEFF: Address = %x\n", Address)); + return TRUE; + } + } + return FALSE; +} + /** Check if the memory address will be mapped by 4KB-page. @@ -274,9 +291,11 @@ IsAddressValid ( return FALSE; } else { - if ((Address < mCpuHotPlugData.SmrrBase) || - (Address >= mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)) { - *Nx = TRUE; +// if ((Address < mCpuHotPlugData.SmrrBase) || +// (Address >= mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)) { + *Nx = TRUE; + if (IsInSmmRange (Address)) { + *Nx = FALSE; } return TRUE; } diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.h b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.h index 04a3dfb..2c5ac3f 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.h +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.h @@ -114,6 +114,11 @@ GetCpuIndex ( VOID ); +BOOLEAN +IsInSmmRange ( + IN EFI_PHYSICAL_ADDRESS Address + ); + // // The flag indicates if execute-disable is supported by processor. // diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c index 17b2f4c..e86e4cf 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c @@ -822,8 +822,7 @@ SmiPFHandler ( // If a page fault occurs in SMRAM range, it might be in a SMM stack guard page, // or SMM page protection violation. // - if ((PFAddress >= mCpuHotPlugData.SmrrBase) && - (PFAddress < (mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize))) { + if (IsInSmmRange (PFAddress)) { CpuIndex = GetCpuIndex (); GuardPageAddress = (mSmmStackArrayBase + EFI_PAGE_SIZE + CpuIndex * mSmmStackSize); if ((FeaturePcdGet (PcdCpuSmmStackGuard)) && @@ -853,13 +852,10 @@ SmiPFHandler ( } } CpuDeadLoop (); - } - - // - // If a page fault occurs in SMM range - // - if ((PFAddress < mCpuHotPlugData.SmrrBase) || - (PFAddress >= mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)) { + } else { + // + // If a page fault does not occur in SMM range + // if ((SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0) { DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%lx) out of SMM range after SMM is locked!\n", PFAddress)); DEBUG_CODE ( -- 2.9.3.windows.2