From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-x22f.google.com (mail-wm0-x22f.google.com [IPv6:2a00:1450:400c:c09::22f]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A64EC82242 for ; Wed, 22 Feb 2017 04:14:04 -0800 (PST) Received: by mail-wm0-x22f.google.com with SMTP id v77so563617wmv.0 for ; Wed, 22 Feb 2017 04:14:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=gK/iFHKG5lpPXU3GLF361fOSNMZPeNzZtoJXHCoMrw4=; b=FmmLo8gQinYxz60YhOh+0rMonf7iXqwAyhYvuAvgzvWIUi8KqIxxTmeyf4+lz8SlDk aePjNUnuQDJXzPxJYC5Kl7AhsPYx0ZCs0sF8qSGXqI5RJLQlL9QIb2TaQhbG8ZyfCJaQ 5m91t5VrBTbSojtdKEKrc9WuSQfLYKD18vRHU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=gK/iFHKG5lpPXU3GLF361fOSNMZPeNzZtoJXHCoMrw4=; b=aedlPcoSmSnvsAXxqzpFRfZHKsv4uNFRZwPnz+TUTFwdipnMxJYdznerg7mq+s0+i1 HlR5he8tm7J488xiUCpIlhICFN3DY2is39BZFWuAoFGjHi9imj2QljDVWIKImIOulvBJ JQOojY1CFEw/VdXvqc8eO5j+H4Dj6eqbhtwiXUtsbakL5wsbUGzCyf9e1tlpgOqBxG5x 6sULOivqnNqnO6SQqLJ5wV/KsycjI0TksZqaVDR7QCBBEvAmEInm/2p+g6MPp5KIB/Gu 7UBWP2IA0Rea0W4rCdNE8+Djj4G6a8B4hvaBQuTyZ9X94mfwAvdCY8OzRYvAj9f2DtLs IGLQ== X-Gm-Message-State: AMke39lnon2tbhfLBDoaT6ZhEIs4NdTCkGcJUEIAf6sMwNPloeGX6akTVC/aIlZ7ZRXjf91w X-Received: by 10.28.64.213 with SMTP id n204mr2314358wma.12.1487765643285; Wed, 22 Feb 2017 04:14:03 -0800 (PST) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id b87sm1873058wmi.0.2017.02.22.04.14.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 22 Feb 2017 04:14:02 -0800 (PST) Date: Wed, 22 Feb 2017 12:14:00 +0000 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org, heyi.guo@linaro.org Message-ID: <20170222121400.GT16034@bivouac.eciton.net> References: <1487756301-15646-1-git-send-email-ard.biesheuvel@linaro.org> <1487756301-15646-5-git-send-email-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <1487756301-15646-5-git-send-email-ard.biesheuvel@linaro.org> User-Agent: Mutt/1.5.23 (2014-03-12) Subject: Re: [PATCH 4/4] ArmPkg/ArmMmuLib: AARCH64: enable stack alignment checking X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 22 Feb 2017 12:14:05 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Feb 22, 2017 at 09:38:21AM +0000, Ard Biesheuvel wrote: > Enable the hardware stack alignment check, as mandated by the UEFI spec. > This ensures that the stack pointer is 16 byte aligned at each instance > where it is used as the base address in a load/store operation. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm > --- > ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c > index 9e0593ce598b..2f8f99d44a31 100644 > --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c > +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c > @@ -734,6 +734,7 @@ ArmConfigureMmu ( > MAIR_ATTR(TT_ATTR_INDX_MEMORY_WRITE_BACK, MAIR_ATTR_NORMAL_MEMORY_WRITE_BACK)); // mapped to EFI_MEMORY_WB > > ArmDisableAlignmentCheck (); > + ArmEnableStackAlignmentCheck (); > ArmEnableInstructionCache (); > ArmEnableDataCache (); > > -- > 2.7.4 >