From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr0-x233.google.com (mail-wr0-x233.google.com [IPv6:2a00:1450:400c:c0c::233]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id CBFBB8034D for ; Tue, 7 Mar 2017 08:49:14 -0800 (PST) Received: by mail-wr0-x233.google.com with SMTP id g10so5618942wrg.2 for ; Tue, 07 Mar 2017 08:49:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=qes1NsIUOwkTt7toEOIWRS2Ge/MX/75AgAZPGtuqk94=; b=j72gpRxP+aIS3710BO9hgVf2QrLVIN6Yw2ReIk+DYexK81uTaoX2VemXc+2T/67TXD /qwfZQVF04ORCNdsBZdG0oiLxr/+yh8JTXrHzFy6g5w7o7+xFdRrxJXcJKEw/mTCEvr9 n2YnzO2eLPtV3MVMAEbD4dPzPNaepYpdnWX9Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=qes1NsIUOwkTt7toEOIWRS2Ge/MX/75AgAZPGtuqk94=; b=S5lSQY9sfngM/L59f/d85A2+douCEs0CQ3ACFD+BsHpOeqnD1k6jTS+LGHyIX5mT7V ZHZjxHT91pCQz0TqWtNT9iRbQH6tjQr7hPrgU+GOe69lJcxEKVux8TXche038sS6coXz n7LRJubinXYvMDKH3rcSiHLiVy2vERwja6IdbcXwCH5lSDwrHnFjhxoI+gr4rn7Cps23 docNGBwTr0w+c4BXPT0hM4ko8IBlqO1G5LJCzUidupOFeBbBcfg6fPeKpET5Vs7m19zw +z4kfs4210+hxw40M2mQcOn2C448o6NVr3xqtgkEHBHI9XGXYDwYQEdz0mXGWcDa1I4/ OOAA== X-Gm-Message-State: AMke39keXGfDiDgcBY1jHVXpES9qsouhzICQiTe9v0A/BpOWqyoj0/qoHV3ng8p6GTvtDSBU X-Received: by 10.223.171.76 with SMTP id r12mr1278563wrc.164.1488905352994; Tue, 07 Mar 2017 08:49:12 -0800 (PST) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id c2sm659789wre.55.2017.03.07.08.49.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 07 Mar 2017 08:49:12 -0800 (PST) Date: Tue, 7 Mar 2017 16:49:10 +0000 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org Message-ID: <20170307164910.GV16034@bivouac.eciton.net> References: <1488283992-32104-1-git-send-email-ard.biesheuvel@linaro.org> <1488283992-32104-2-git-send-email-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <1488283992-32104-2-git-send-email-ard.biesheuvel@linaro.org> User-Agent: Mutt/1.5.23 (2014-03-12) Subject: Re: [PATCH 2/3] ArmPkg/UncachedMemoryAllocationLib: use CWG value to align pool allocations X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 07 Mar 2017 16:49:15 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Tue, Feb 28, 2017 at 12:13:11PM +0000, Ard Biesheuvel wrote: > Uncached pool allocations are aligned to the data cache line length under > the assumption that this is sufficient to prevent cache maintenance from > corrupting adjacent allocations. However, the value to use in such cases > is architecturally called the Cache Writeback Granule (CWG), which is > essentially the maximum Dcache line length rather than the minimum. > > Note that this is mostly a cosmetical fix, given that the pool allocation > is turned into a page allocation later, and rounded up accordingly. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm > --- > ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c b/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c > index cd13a7da92e0..0d8abad23433 100644 > --- a/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c > +++ b/ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c > @@ -545,7 +545,7 @@ UncachedInternalAllocatePool ( > IN UINTN AllocationSize > ) > { > - UINTN CacheLineLength = ArmDataCacheLineLength (); > + UINTN CacheLineLength = ArmCacheWritebackGranule (); > return UncachedInternalAllocateAlignedPool (MemoryType, AllocationSize, CacheLineLength); > } > > -- > 2.7.4 >