Re: [PATCH] ArmPkg/CpuDxe: handle implied attributes in EfiAttributeToArmAttribute

[Leif Lindholm <leif.lindholm@linaro.org>]

On Wed, Mar 08, 2017 at 12:51:44PM +0100, Ard Biesheuvel wrote:
> Some memory attributes are implied by the memory type, e.g., device memory
> is always mapped non-executable and cached memory should have the inner
> shareable attribute.
> 
> In order to prevent unnecessary memory attribute updates of mappings
> created early on, make EfiAttributeToArmAttribute() return these implied
> attributes in the same way as ArmMmuLib does already. This avoids false
> positives when looking for differences between current and desired mapping
> attributes.
> 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

> ---
>  ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c | 10 +++++++---
>  1 file changed, 7 insertions(+), 3 deletions(-)
> 
> diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
> index 7688846e70cb..3e216c7cb235 100644
> --- a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
> +++ b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
> @@ -204,16 +204,20 @@ EfiAttributeToArmAttribute (
>  
>    switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) {
>    case EFI_MEMORY_UC:
> -    ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY;
> +    if (ArmReadCurrentEL () == AARCH64_EL2) {
> +      ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_XN_MASK;
> +    } else {
> +      ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_UXN_MASK | TT_PXN_MASK;
> +    }
>      break;
>    case EFI_MEMORY_WC:
>      ArmAttributes = TT_ATTR_INDX_MEMORY_NON_CACHEABLE;
>      break;
>    case EFI_MEMORY_WT:
> -    ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_THROUGH;
> +    ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_THROUGH | TT_SH_INNER_SHAREABLE;
>      break;
>    case EFI_MEMORY_WB:
> -    ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_BACK;
> +    ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_BACK | TT_SH_INNER_SHAREABLE;
>      break;
>    default:
>      ArmAttributes = TT_ATTR_INDX_MASK;
> -- 
> 2.7.4
>