From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 3DA2C80390 for ; Thu, 9 Mar 2017 00:36:09 -0800 (PST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Mar 2017 00:36:09 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,268,1486454400"; d="scan'208";a="1139930903" Received: from jfan12-desk.ccr.corp.intel.com ([10.239.158.57]) by fmsmga002.fm.intel.com with ESMTP; 09 Mar 2017 00:36:07 -0800 From: Jeff Fan To: edk2-devel@lists.01.org Cc: Feng Tian , Michael Kinney Date: Thu, 9 Mar 2017 16:35:44 +0800 Message-Id: <20170309083553.6016-3-jeff.fan@intel.com> X-Mailer: git-send-email 2.9.3.windows.2 In-Reply-To: <20170309083553.6016-1-jeff.fan@intel.com> References: <20170309083553.6016-1-jeff.fan@intel.com> Subject: [PATCH 02/11] UefiCpuPkg/CpuS3DataDxe: Consume the existing PcdCpuS3DataAddress X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 09 Mar 2017 08:36:09 -0000 If PCD PcdCpuS3DataAddress is set before, CpuS3DataDxe should get RegisterTable and PreSmmRegisterTable from existing PCD pointed buffer and needn't to allocate new buffer for RegisterTable and PreSmmRegisterTable. Cc: Feng Tian Cc: Michael Kinney Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan --- UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c | 54 ++++++++++++++++++++++--------------- 1 file changed, 33 insertions(+), 21 deletions(-) diff --git a/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c b/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c index 07c7102..dccb406 100644 --- a/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c +++ b/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c @@ -160,12 +160,18 @@ CpuS3DataInitialize ( VOID *Gdt; VOID *Idt; EFI_EVENT Event; + ACPI_CPU_DATA *OldAcpiCpuData; if (!PcdGetBool (PcdAcpiS3Enable)) { return EFI_UNSUPPORTED; } // + // Set PcdCpuS3DataAddress to the base address of the ACPI_CPU_DATA structure + // + OldAcpiCpuData = (ACPI_CPU_DATA *) (UINTN) PcdGet64 (PcdCpuS3DataAddress); + + // // Allocate ACPI NVS memory below 4G memory for use on ACPI S3 resume. // AcpiCpuDataEx = AllocateAcpiNvsMemoryBelow4G (sizeof (ACPI_CPU_DATA_EX)); @@ -229,32 +235,38 @@ CpuS3DataInitialize ( AcpiCpuDataEx->GdtrProfile.Base = (UINTN)Gdt; AcpiCpuDataEx->IdtrProfile.Base = (UINTN)Idt; - // - // Allocate buffer for empty RegisterTable and PreSmmInitRegisterTable for all CPUs - // - TableSize = 2 * NumberOfCpus * sizeof (CPU_REGISTER_TABLE); - RegisterTable = (CPU_REGISTER_TABLE *)AllocateAcpiNvsMemoryBelow4G (TableSize); - ASSERT (RegisterTable != NULL); - for (Index = 0; Index < NumberOfCpus; Index++) { - Status = MpServices->GetProcessorInfo ( + if (OldAcpiCpuData != NULL) { + AcpiCpuData->RegisterTable = OldAcpiCpuData->RegisterTable; + AcpiCpuData->PreSmmInitRegisterTable = OldAcpiCpuData->PreSmmInitRegisterTable; + } else { + // + // Allocate buffer for empty RegisterTable and PreSmmInitRegisterTable for all CPUs + // + TableSize = 2 * NumberOfCpus * sizeof (CPU_REGISTER_TABLE); + RegisterTable = (CPU_REGISTER_TABLE *)AllocateAcpiNvsMemoryBelow4G (TableSize); + ASSERT (RegisterTable != NULL); + + for (Index = 0; Index < NumberOfCpus; Index++) { + Status = MpServices->GetProcessorInfo ( MpServices, Index, &ProcessorInfoBuffer ); - ASSERT_EFI_ERROR (Status); - - RegisterTable[Index].InitialApicId = (UINT32)ProcessorInfoBuffer.ProcessorId; - RegisterTable[Index].TableLength = 0; - RegisterTable[Index].AllocatedSize = 0; - RegisterTable[Index].RegisterTableEntry = 0; - - RegisterTable[NumberOfCpus + Index].InitialApicId = (UINT32)ProcessorInfoBuffer.ProcessorId; - RegisterTable[NumberOfCpus + Index].TableLength = 0; - RegisterTable[NumberOfCpus + Index].AllocatedSize = 0; - RegisterTable[NumberOfCpus + Index].RegisterTableEntry = 0; + ASSERT_EFI_ERROR (Status); + + RegisterTable[Index].InitialApicId = (UINT32)ProcessorInfoBuffer.ProcessorId; + RegisterTable[Index].TableLength = 0; + RegisterTable[Index].AllocatedSize = 0; + RegisterTable[Index].RegisterTableEntry = 0; + + RegisterTable[NumberOfCpus + Index].InitialApicId = (UINT32)ProcessorInfoBuffer.ProcessorId; + RegisterTable[NumberOfCpus + Index].TableLength = 0; + RegisterTable[NumberOfCpus + Index].AllocatedSize = 0; + RegisterTable[NumberOfCpus + Index].RegisterTableEntry = 0; + } + AcpiCpuData->RegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)RegisterTable; + AcpiCpuData->PreSmmInitRegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)(RegisterTable + NumberOfCpus); } - AcpiCpuData->RegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)RegisterTable; - AcpiCpuData->PreSmmInitRegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)(RegisterTable + NumberOfCpus); // // Set PcdCpuS3DataAddress to the base address of the ACPI_CPU_DATA structure -- 2.9.3.windows.2