From: Anthony PERARD <anthony.perard@citrix.com>
To: "Fan, Jeff" <jeff.fan@intel.com>
Cc: "Yao, Jiewen" <jiewen.yao@intel.com>,
"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>,
"Kinney, Michael D" <michael.d.kinney@intel.com>
Subject: Re: [PATCH V4 1/3] UefiCpuPkg/CpuDxe: Add memory attribute setting.
Date: Fri, 10 Mar 2017 15:21:42 +0000 [thread overview]
Message-ID: <20170310152142.GL1760@perard.uk.xensource.com> (raw)
In-Reply-To: <542CF652F8836A4AB8DBFAAD40ED192A4C559F60@shsmsx102.ccr.corp.intel.com>
On Fri, Mar 10, 2017 at 01:02:22AM +0000, Fan, Jeff wrote:
> Anthony,
>
> MSR 0x1A0 is architectural MSR defined in IA32 SDM.
>
> Have you tried AMD real platform?
Yes, I did, and unless I've made a mistake, trying to read msr 0x1a0
does generate a GPF.
Also, I've now take a look into the AMD manuals[1] and more specificaly
"AMD64 Architecture Programmer’s Manual Volume 2: System
Programming"[2], there is no sign of MSR 0x1a0 (in Appendix A).
As for the XD bit on AMD, (well NX actually), it is describe at 5.6.3,
in the "Page Translation and Protection" chapter.
About MSR 0x1a0 been architectural defined, I guess that applies only to
Intel CPUs, all of them.
[1]: http://developer.amd.com/resources/developer-guides-manuals/
[2]: http://support.amd.com/TechDocs/24593.pdf
Thanks,
--
Anthony PERARD
next prev parent reply other threads:[~2017-03-10 15:21 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-21 6:57 [PATCH V4 0/3] DXE Memory Protection Jiewen Yao
2017-02-21 6:57 ` [PATCH V4 1/3] UefiCpuPkg/CpuDxe: Add memory attribute setting Jiewen Yao
2017-03-09 11:52 ` Anthony PERARD
2017-03-10 1:02 ` Fan, Jeff
2017-03-10 15:21 ` Anthony PERARD [this message]
2017-03-13 1:58 ` Fan, Jeff
2017-02-21 6:57 ` [PATCH V4 2/3] MdeModulePkg/dec: add PcdImageProtectionPolicy Jiewen Yao
2017-02-21 6:57 ` [PATCH V4 3/3] MdeModulePkg/DxeCore: Add UEFI image protection Jiewen Yao
2017-02-21 7:23 ` [PATCH V4 0/3] DXE Memory Protection Fan, Jeff
2017-02-21 8:36 ` Ard Biesheuvel
2017-02-21 8:39 ` Yao, Jiewen
2017-02-21 17:25 ` Ard Biesheuvel
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