* [PATCH] UefiCpuPkg/CpuDxe: Remove MSR_IA32_MISC_ENABLE check
@ 2017-03-15 1:52 Jeff Fan
0 siblings, 0 replies; 4+ messages in thread
From: Jeff Fan @ 2017-03-15 1:52 UTC (permalink / raw)
To: edk2-devel; +Cc: Anthony PERARD, Jiewen Yao, Feng Tian
The architectural MSR MSR_IA32_MISC_ENABLE is not supported by AMD processors.
Because reading CPUID.80000001H:EDK[20] is enough to check if XD feature is
supported or not, we just remove checking MSR_IA32_MISC_ENABLE(0x1A0).
Cc: Anthony PERARD <anthony.perard@citrix.com>
Cc: Jiewen Yao <jiewen.yao@citrix.com>
Cc: Feng Tian <feng.tian@citrix.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
---
UefiCpuPkg/CpuDxe/CpuPageTable.c | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/UefiCpuPkg/CpuDxe/CpuPageTable.c b/UefiCpuPkg/CpuDxe/CpuPageTable.c
index 65f607a..ab664b4 100644
--- a/UefiCpuPkg/CpuDxe/CpuPageTable.c
+++ b/UefiCpuPkg/CpuDxe/CpuPageTable.c
@@ -193,12 +193,9 @@ GetCurrentPagingContext (
AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);
if ((RegEdx & BIT20) != 0) {
// XD supported
- if ((AsmReadMsr64 (0x000001A0) & BIT34) == 0) {
- // XD enabled
- if ((AsmReadMsr64 (0xC0000080) & BIT11) != 0) {
- // XD activated
- PagingContext->ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED;
- }
+ if ((AsmReadMsr64 (0xC0000080) & BIT11) != 0) {
+ // XD activated
+ PagingContext->ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED;
}
}
if ((RegEdx & BIT26) != 0) {
--
2.9.3.windows.2
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH] UefiCpuPkg/CpuDxe: Remove MSR_IA32_MISC_ENABLE check
@ 2017-03-15 1:54 Jeff Fan
2017-03-15 15:50 ` Anthony PERARD
2017-03-17 2:54 ` Tian, Feng
0 siblings, 2 replies; 4+ messages in thread
From: Jeff Fan @ 2017-03-15 1:54 UTC (permalink / raw)
To: edk2-devel; +Cc: Anthony PERARD, Jiewen Yao, Feng Tian
The architectural MSR MSR_IA32_MISC_ENABLE is not supported by AMD processors.
Because reading CPUID.80000001H:EDK[20] is enough to check if XD feature is
supported or not, we just remove checking MSR_IA32_MISC_ENABLE(0x1A0).
Cc: Anthony PERARD <anthony.perard@citrix.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
---
UefiCpuPkg/CpuDxe/CpuPageTable.c | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/UefiCpuPkg/CpuDxe/CpuPageTable.c b/UefiCpuPkg/CpuDxe/CpuPageTable.c
index 65f607a..ab664b4 100644
--- a/UefiCpuPkg/CpuDxe/CpuPageTable.c
+++ b/UefiCpuPkg/CpuDxe/CpuPageTable.c
@@ -193,12 +193,9 @@ GetCurrentPagingContext (
AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);
if ((RegEdx & BIT20) != 0) {
// XD supported
- if ((AsmReadMsr64 (0x000001A0) & BIT34) == 0) {
- // XD enabled
- if ((AsmReadMsr64 (0xC0000080) & BIT11) != 0) {
- // XD activated
- PagingContext->ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED;
- }
+ if ((AsmReadMsr64 (0xC0000080) & BIT11) != 0) {
+ // XD activated
+ PagingContext->ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED;
}
}
if ((RegEdx & BIT26) != 0) {
--
2.9.3.windows.2
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH] UefiCpuPkg/CpuDxe: Remove MSR_IA32_MISC_ENABLE check
2017-03-15 1:54 Jeff Fan
@ 2017-03-15 15:50 ` Anthony PERARD
2017-03-17 2:54 ` Tian, Feng
1 sibling, 0 replies; 4+ messages in thread
From: Anthony PERARD @ 2017-03-15 15:50 UTC (permalink / raw)
To: Jeff Fan; +Cc: edk2-devel, Jiewen Yao, Feng Tian
On Wed, Mar 15, 2017 at 09:54:30AM +0800, Jeff Fan wrote:
> The architectural MSR MSR_IA32_MISC_ENABLE is not supported by AMD processors.
> Because reading CPUID.80000001H:EDK[20] is enough to check if XD feature is
> supported or not, we just remove checking MSR_IA32_MISC_ENABLE(0x1A0).
>
> Cc: Anthony PERARD <anthony.perard@citrix.com>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Feng Tian <feng.tian@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Thanks, that works for me. I've tested on AMD and Intel machine, with
Xen.
Tested-by: Anthony PERARD <anthony.perard@citrix.com>
> ---
> UefiCpuPkg/CpuDxe/CpuPageTable.c | 9 +++------
> 1 file changed, 3 insertions(+), 6 deletions(-)
>
> diff --git a/UefiCpuPkg/CpuDxe/CpuPageTable.c b/UefiCpuPkg/CpuDxe/CpuPageTable.c
> index 65f607a..ab664b4 100644
> --- a/UefiCpuPkg/CpuDxe/CpuPageTable.c
> +++ b/UefiCpuPkg/CpuDxe/CpuPageTable.c
> @@ -193,12 +193,9 @@ GetCurrentPagingContext (
> AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);
> if ((RegEdx & BIT20) != 0) {
> // XD supported
> - if ((AsmReadMsr64 (0x000001A0) & BIT34) == 0) {
> - // XD enabled
> - if ((AsmReadMsr64 (0xC0000080) & BIT11) != 0) {
> - // XD activated
> - PagingContext->ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED;
> - }
> + if ((AsmReadMsr64 (0xC0000080) & BIT11) != 0) {
> + // XD activated
> + PagingContext->ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED;
> }
> }
> if ((RegEdx & BIT26) != 0) {
> --
> 2.9.3.windows.2
>
--
Anthony PERARD
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] UefiCpuPkg/CpuDxe: Remove MSR_IA32_MISC_ENABLE check
2017-03-15 1:54 Jeff Fan
2017-03-15 15:50 ` Anthony PERARD
@ 2017-03-17 2:54 ` Tian, Feng
1 sibling, 0 replies; 4+ messages in thread
From: Tian, Feng @ 2017-03-17 2:54 UTC (permalink / raw)
To: Fan, Jeff, edk2-devel@lists.01.org
Cc: Anthony PERARD, Yao, Jiewen, Tian, Feng
Reviewed-by: Feng Tian <feng.tian@intel.com>
Thanks
Feng
-----Original Message-----
From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Jeff Fan
Sent: Wednesday, March 15, 2017 9:55 AM
To: edk2-devel@lists.01.org
Cc: Anthony PERARD <anthony.perard@citrix.com>; Tian, Feng <feng.tian@intel.com>; Yao, Jiewen <jiewen.yao@intel.com>
Subject: [edk2] [PATCH] UefiCpuPkg/CpuDxe: Remove MSR_IA32_MISC_ENABLE check
The architectural MSR MSR_IA32_MISC_ENABLE is not supported by AMD processors.
Because reading CPUID.80000001H:EDK[20] is enough to check if XD feature is supported or not, we just remove checking MSR_IA32_MISC_ENABLE(0x1A0).
Cc: Anthony PERARD <anthony.perard@citrix.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
---
UefiCpuPkg/CpuDxe/CpuPageTable.c | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/UefiCpuPkg/CpuDxe/CpuPageTable.c b/UefiCpuPkg/CpuDxe/CpuPageTable.c
index 65f607a..ab664b4 100644
--- a/UefiCpuPkg/CpuDxe/CpuPageTable.c
+++ b/UefiCpuPkg/CpuDxe/CpuPageTable.c
@@ -193,12 +193,9 @@ GetCurrentPagingContext (
AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);
if ((RegEdx & BIT20) != 0) {
// XD supported
- if ((AsmReadMsr64 (0x000001A0) & BIT34) == 0) {
- // XD enabled
- if ((AsmReadMsr64 (0xC0000080) & BIT11) != 0) {
- // XD activated
- PagingContext->ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED;
- }
+ if ((AsmReadMsr64 (0xC0000080) & BIT11) != 0) {
+ // XD activated
+ PagingContext->ContextData.Ia32.Attributes |=
+ PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED;
}
}
if ((RegEdx & BIT26) != 0) {
--
2.9.3.windows.2
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2017-03-15 15:50 ` Anthony PERARD
2017-03-17 2:54 ` Tian, Feng
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