From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id CDA0920D2C3B9 for ; Tue, 28 Mar 2017 20:03:51 -0700 (PDT) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga105.jf.intel.com with ESMTP; 28 Mar 2017 20:03:51 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,239,1486454400"; d="scan'208";a="1113146587" Received: from ray-dev.ccr.corp.intel.com ([10.239.9.25]) by orsmga001.jf.intel.com with ESMTP; 28 Mar 2017 20:03:50 -0700 From: Ruiyu Ni To: edk2-devel@lists.01.org Cc: Jeff Fan Date: Wed, 29 Mar 2017 11:03:38 +0800 Message-Id: <20170329030346.249872-3-ruiyu.ni@intel.com> X-Mailer: git-send-email 2.9.0.windows.1 In-Reply-To: <20170329030346.249872-1-ruiyu.ni@intel.com> References: <20170329030346.249872-1-ruiyu.ni@intel.com> Subject: [PATCH 02/10] UefiCpuPkg/MtrrLib: Add CacheInvalid enum type to MtrrLib.h X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 29 Mar 2017 03:03:52 -0000 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni Cc: Jeff Fan --- UefiCpuPkg/Include/Library/MtrrLib.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/UefiCpuPkg/Include/Library/MtrrLib.h b/UefiCpuPkg/Include/Library/MtrrLib.h index a769279..573c14c 100644 --- a/UefiCpuPkg/Include/Library/MtrrLib.h +++ b/UefiCpuPkg/Include/Library/MtrrLib.h @@ -119,7 +119,8 @@ typedef enum { CacheWriteCombining = 1, CacheWriteThrough = 4, CacheWriteProtected = 5, - CacheWriteBack = 6 + CacheWriteBack = 6, + CacheInvalid = 7 } MTRR_MEMORY_CACHE_TYPE; #define MTRR_CACHE_UNCACHEABLE 0 -- 2.9.0.windows.1