From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr0-x229.google.com (mail-wr0-x229.google.com [IPv6:2a00:1450:400c:c0c::229]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 078A020080923 for ; Wed, 5 Apr 2017 06:20:44 -0700 (PDT) Received: by mail-wr0-x229.google.com with SMTP id w43so13874972wrb.0 for ; Wed, 05 Apr 2017 06:20:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=He5MqQqBo8tKoyzUkgh+5AYSUKSEI03zZlbQMwZ/ZF8=; b=QI2/vmYVC3uQ6SJb12w7gdL2EAEy79b104l22E8K9zsdXbwIiaVrfj8HavYkRswklI xqY9VjIV0GmKwsWBLlswZ8+5jrq9a9527LpxIoyVWf9W/y4OwbBABEeU1Be3U6eirC4J 7QnRcfNy61XYDNuw0MAs+CcFCn9thkoQCreQA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=He5MqQqBo8tKoyzUkgh+5AYSUKSEI03zZlbQMwZ/ZF8=; b=ARxhGa3E8rWd8Cujcr+XEPNkDDiDP6pejgX/7aDAVHAP1mWjahyRjfHhcrSSxe+meF 6ys9FQNaiT/P8FS4M1/ZQGcXr0dy8mccTgA9giZ5230rTI5XJBUfzCv3zb7vWxcsV0Sk Rg+AB7OOaU3hXXYkTyXKJu2/ysvzZSyufV2/3nOAtWRhl2uFWCdr9xp+cFl+a3vUbfLv CqfchxLZaXcSaWdqY0Ms6pvDy9cCAvGefV55HlfYWbDeYsEH5H8PEF4X8jzbSlOt1d3a CuXzQpydknSBgFN3Bxn+Zr8zQABqQ2Xpj0nze8BoSek+jEZnb94rMzvQuOGR4058IePD szCg== X-Gm-Message-State: AFeK/H1prkdhK0PxF943V69Oxsz8dQUw5/bcdWafCX5tp3qljSIKHUz1 WT2oPGLZhgTAaiBt X-Received: by 10.28.210.13 with SMTP id j13mr13949514wmg.94.1491398441266; Wed, 05 Apr 2017 06:20:41 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id u145sm22335984wmu.1.2017.04.05.06.20.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 05 Apr 2017 06:20:40 -0700 (PDT) Date: Wed, 5 Apr 2017 14:20:38 +0100 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org, ryan.harkin@linaro.org Message-ID: <20170405132038.GH25239@bivouac.eciton.net> References: <20170404123010.11722-1-ard.biesheuvel@linaro.org> <20170404123010.11722-4-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <20170404123010.11722-4-ard.biesheuvel@linaro.org> User-Agent: Mutt/1.5.23 (2014-03-12) Subject: Re: [PATCH v3 3/6] ArmPlatformPkg/ArmJunoDxe: use the generic non-discoverable device support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 05 Apr 2017 13:20:44 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Tue, Apr 04, 2017 at 01:30:07PM +0100, Ard Biesheuvel wrote: > Replace the open coded reimplementation of 'PCI emulation' with a pair > of calls into NonDiscoverableDeviceRegistrationLib to register the OHCI > and EHCI controllers. These will be picked up by the generic driver instead. > That is a *sweet* diffstat. Reviewed-by: Leif Lindholm > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel > --- > ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c | 30 +- > ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf | 3 +- > ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxeInternal.h | 5 - > ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciEmulation.c | 596 -------------------- > ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciEmulation.h | 284 ---------- > ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciRootBridgeIo.c | 299 ---------- > 6 files changed, 27 insertions(+), 1190 deletions(-) > > diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c > index f13c49559bb4..14ff189a3078 100644 > --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c > +++ b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c > @@ -28,6 +28,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -447,10 +448,31 @@ ArmJunoEntryPoint ( > UINT32 JunoRevision; > EFI_EVENT EndOfDxeEvent; > > - Status = PciEmulationEntryPoint (); > - if (EFI_ERROR (Status)) { > - return Status; > - } > + // > + // Register the OHCI and EHCI controllers as non-coherent > + // non-discoverable devices. > + // > + Status = RegisterNonDiscoverableMmioDevice ( > + NonDiscoverableDeviceTypeOhci, > + NonDiscoverableDeviceDmaTypeNonCoherent, > + NULL, > + NULL, > + 1, > + FixedPcdGet32 (PcdSynopsysUsbOhciBaseAddress), > + SIZE_64KB > + ); > + ASSERT_EFI_ERROR (Status); > + > + Status = RegisterNonDiscoverableMmioDevice ( > + NonDiscoverableDeviceTypeEhci, > + NonDiscoverableDeviceDmaTypeNonCoherent, > + NULL, > + NULL, > + 1, > + FixedPcdGet32 (PcdSynopsysUsbEhciBaseAddress), > + SIZE_64KB > + ); > + ASSERT_EFI_ERROR (Status); > > // > // If a hypervisor has been declared then we need to make sure its region is protected at runtime > diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf > index 168070c6add4..6719d0adcc87 100644 > --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf > +++ b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf > @@ -21,8 +21,6 @@ [Defines] > [Sources.common] > AcpiTables.c > ArmJunoDxe.c > - PciEmulation.c > - PciRootBridgeIo.c > > [Packages] > ArmPkg/ArmPkg.dec > @@ -42,6 +40,7 @@ [LibraryClasses] > DmaLib > DxeServicesTableLib > IoLib > + NonDiscoverableDeviceRegistrationLib > PcdLib > PrintLib > SerialPortLib > diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxeInternal.h b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxeInternal.h > index df0277067e34..5d2b68fabd12 100644 > --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxeInternal.h > +++ b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxeInternal.h > @@ -42,11 +42,6 @@ > #define R_TST_CTRL_1 0x0158 /* Test Control Register 1 */ > > > -EFI_STATUS > -PciEmulationEntryPoint ( > - VOID > - ); > - > /** > * Callback called when ACPI Protocol is installed > */ > diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciEmulation.c b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciEmulation.c > deleted file mode 100644 > index 2ddebf606e3d..000000000000 > --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciEmulation.c > +++ /dev/null > @@ -1,596 +0,0 @@ > -/** @file > - > - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
> - Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved.
> - > - This program and the accompanying materials > - are licensed and made available under the terms and conditions of the BSD License > - which accompanies this distribution. The full text of the license may be found at > - http://opensource.org/licenses/bsd-license.php > - > - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > - > -**/ > - > -#include "PciEmulation.h" > - > -#define HOST_CONTROLLER_OPERATION_REG_SIZE 0x44 > - > -typedef struct { > - ACPI_HID_DEVICE_PATH AcpiDevicePath; > - PCI_DEVICE_PATH PciDevicePath; > - EFI_DEVICE_PATH_PROTOCOL EndDevicePath; > -} EFI_PCI_IO_DEVICE_PATH; > - > -typedef struct { > - UINT32 Signature; > - EFI_PCI_IO_DEVICE_PATH DevicePath; > - EFI_PCI_IO_PROTOCOL PciIoProtocol; > - PCI_TYPE00 *ConfigSpace; > - PCI_ROOT_BRIDGE RootBridge; > - UINTN Segment; > -} EFI_PCI_IO_PRIVATE_DATA; > - > -#define EFI_PCI_IO_PRIVATE_DATA_SIGNATURE SIGNATURE_32('p', 'c', 'i', 'o') > -#define EFI_PCI_IO_PRIVATE_DATA_FROM_THIS(a) CR (a, EFI_PCI_IO_PRIVATE_DATA, PciIoProtocol, EFI_PCI_IO_PRIVATE_DATA_SIGNATURE) > - > -EFI_PCI_IO_DEVICE_PATH PciIoDevicePathTemplate = > -{ > - { > - { ACPI_DEVICE_PATH, ACPI_DP, { sizeof (ACPI_HID_DEVICE_PATH), 0 } }, > - EISA_PNP_ID(0x0A03), // HID > - 0 // UID > - }, > - { > - { HARDWARE_DEVICE_PATH, HW_PCI_DP, { sizeof (PCI_DEVICE_PATH), 0 } }, > - 0, > - 0 > - }, > - { END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0} } > -}; > - > -STATIC > -VOID > -ConfigureUSBHost ( > - VOID > - ) > -{ > -} > - > - > -EFI_STATUS > -PciIoPollMem ( > - IN EFI_PCI_IO_PROTOCOL *This, > - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, > - IN UINT8 BarIndex, > - IN UINT64 Offset, > - IN UINT64 Mask, > - IN UINT64 Value, > - IN UINT64 Delay, > - OUT UINT64 *Result > - ) > -{ > - ASSERT (FALSE); > - return EFI_UNSUPPORTED; > -} > - > -EFI_STATUS > -PciIoPollIo ( > - IN EFI_PCI_IO_PROTOCOL *This, > - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, > - IN UINT8 BarIndex, > - IN UINT64 Offset, > - IN UINT64 Mask, > - IN UINT64 Value, > - IN UINT64 Delay, > - OUT UINT64 *Result > - ) > -{ > - ASSERT (FALSE); > - return EFI_UNSUPPORTED; > -} > - > -EFI_STATUS > -PciIoMemRead ( > - IN EFI_PCI_IO_PROTOCOL *This, > - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, > - IN UINT8 BarIndex, > - IN UINT64 Offset, > - IN UINTN Count, > - IN OUT VOID *Buffer > - ) > -{ > - EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (This); > - > - return PciRootBridgeIoMemRead (&Private->RootBridge.Io, > - (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, > - Private->ConfigSpace->Device.Bar[BarIndex] + Offset, //Fix me ConfigSpace > - Count, > - Buffer > - ); > -} > - > -EFI_STATUS > -PciIoMemWrite ( > - IN EFI_PCI_IO_PROTOCOL *This, > - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, > - IN UINT8 BarIndex, > - IN UINT64 Offset, > - IN UINTN Count, > - IN OUT VOID *Buffer > - ) > -{ > - EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (This); > - > - return PciRootBridgeIoMemWrite (&Private->RootBridge.Io, > - (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, > - Private->ConfigSpace->Device.Bar[BarIndex] + Offset, //Fix me ConfigSpace > - Count, > - Buffer > - ); > -} > - > -EFI_STATUS > -PciIoIoRead ( > - IN EFI_PCI_IO_PROTOCOL *This, > - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, > - IN UINT8 BarIndex, > - IN UINT64 Offset, > - IN UINTN Count, > - IN OUT VOID *Buffer > - ) > -{ > - ASSERT (FALSE); > - return EFI_UNSUPPORTED; > -} > - > -EFI_STATUS > -PciIoIoWrite ( > - IN EFI_PCI_IO_PROTOCOL *This, > - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, > - IN UINT8 BarIndex, > - IN UINT64 Offset, > - IN UINTN Count, > - IN OUT VOID *Buffer > - ) > -{ > - ASSERT (FALSE); > - return EFI_UNSUPPORTED; > -} > - > -/** > - Enable a PCI driver to read PCI controller registers in PCI configuration space. > - > - @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance. > - @param[in] Width Signifies the width of the memory operations. > - @param[in] Offset The offset within the PCI configuration space for > - the PCI controller. > - @param[in] Count The number of PCI configuration operations to > - perform. Bytes moved is Width size * Count, > - starting at Offset. > - > - @param[in out] Buffer The destination buffer to store the results. > - > - @retval EFI_SUCCESS The data was read from the PCI controller. > - @retval EFI_INVALID_PARAMETER "Width" is invalid. > - @retval EFI_INVALID_PARAMETER "Buffer" is NULL. > - > -**/ > -EFI_STATUS > -PciIoPciRead ( > - IN EFI_PCI_IO_PROTOCOL *This, > - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, > - IN UINT32 Offset, > - IN UINTN Count, > - IN OUT VOID *Buffer > - ) > -{ > - EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (This); > - EFI_STATUS Status; > - > - if ((Width < 0) || (Width >= EfiPciIoWidthMaximum) || (Buffer == NULL)) { > - return EFI_INVALID_PARAMETER; > - } > - > - Status = PciRootBridgeIoMemRW ( > - (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH)Width, > - Count, > - TRUE, > - (PTR)(UINTN)Buffer, > - TRUE, > - (PTR)(UINTN)(((UINT8 *)Private->ConfigSpace) + Offset) //Fix me ConfigSpace > - ); > - > - return Status; > -} > - > -/** > - Enable a PCI driver to write PCI controller registers in PCI configuration space. > - > - @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance. > - @param[in] Width Signifies the width of the memory operations. > - @param[in] Offset The offset within the PCI configuration space for > - the PCI controller. > - @param[in] Count The number of PCI configuration operations to > - perform. Bytes moved is Width size * Count, > - starting at Offset. > - > - @param[in out] Buffer The source buffer to write data from. > - > - @retval EFI_SUCCESS The data was read from the PCI controller. > - @retval EFI_INVALID_PARAMETER "Width" is invalid. > - @retval EFI_INVALID_PARAMETER "Buffer" is NULL. > - > -**/ > -EFI_STATUS > -PciIoPciWrite ( > - IN EFI_PCI_IO_PROTOCOL *This, > - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, > - IN UINT32 Offset, > - IN UINTN Count, > - IN OUT VOID *Buffer > - ) > -{ > - EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (This); > - > - if ((Width < 0) || (Width >= EfiPciIoWidthMaximum) || (Buffer == NULL)) { > - return EFI_INVALID_PARAMETER; > - } > - > - return PciRootBridgeIoMemRW ((EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, > - Count, > - TRUE, > - (PTR)(UINTN)(((UINT8 *)Private->ConfigSpace) + Offset), //Fix me ConfigSpace > - TRUE, > - (PTR)(UINTN)Buffer > - ); > -} > - > -EFI_STATUS > -PciIoCopyMem ( > - IN EFI_PCI_IO_PROTOCOL *This, > - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, > - IN UINT8 DestBarIndex, > - IN UINT64 DestOffset, > - IN UINT8 SrcBarIndex, > - IN UINT64 SrcOffset, > - IN UINTN Count > - ) > -{ > - ASSERT (FALSE); > - return EFI_UNSUPPORTED; > -} > - > -EFI_STATUS > -PciIoMap ( > - IN EFI_PCI_IO_PROTOCOL *This, > - IN EFI_PCI_IO_PROTOCOL_OPERATION Operation, > - IN VOID *HostAddress, > - IN OUT UINTN *NumberOfBytes, > - OUT EFI_PHYSICAL_ADDRESS *DeviceAddress, > - OUT VOID **Mapping > - ) > -{ > - DMA_MAP_OPERATION DmaOperation; > - > - if (Operation == EfiPciIoOperationBusMasterRead) { > - DmaOperation = MapOperationBusMasterRead; > - } else if (Operation == EfiPciIoOperationBusMasterWrite) { > - DmaOperation = MapOperationBusMasterWrite; > - } else if (Operation == EfiPciIoOperationBusMasterCommonBuffer) { > - DmaOperation = MapOperationBusMasterCommonBuffer; > - } else { > - return EFI_INVALID_PARAMETER; > - } > - return DmaMap (DmaOperation, HostAddress, NumberOfBytes, DeviceAddress, Mapping); > -} > - > -EFI_STATUS > -PciIoUnmap ( > - IN EFI_PCI_IO_PROTOCOL *This, > - IN VOID *Mapping > - ) > -{ > - return DmaUnmap (Mapping); > -} > - > -/** > - Allocate pages that are suitable for an EfiPciIoOperationBusMasterCommonBuffer > - mapping. > - > - @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance. > - @param[in] Type This parameter is not used and must be ignored. > - @param[in] MemoryType The type of memory to allocate, EfiBootServicesData or > - EfiRuntimeServicesData. > - @param[in] Pages The number of pages to allocate. > - @param[out] HostAddress A pointer to store the base system memory address of > - the allocated range. > - @param[in] Attributes The requested bit mask of attributes for the allocated > - range. Only the attributes, > - EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE and > - EFI_PCI_ATTRIBUTE_MEMORY_CACHED may be used with this > - function. If any other bits are set, then EFI_UNSUPPORTED > - is returned. This function ignores this bit mask. > - > - @retval EFI_SUCCESS The requested memory pages were allocated. > - @retval EFI_INVALID_PARAMETER HostAddress is NULL. > - @retval EFI_INVALID_PARAMETER MemoryType is invalid. > - @retval EFI_UNSUPPORTED Attributes is unsupported. > - @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated. > - > -**/ > -EFI_STATUS > -PciIoAllocateBuffer ( > - IN EFI_PCI_IO_PROTOCOL *This, > - IN EFI_ALLOCATE_TYPE Type, > - IN EFI_MEMORY_TYPE MemoryType, > - IN UINTN Pages, > - OUT VOID **HostAddress, > - IN UINT64 Attributes > - ) > -{ > - if (Attributes & > - (~(EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | > - EFI_PCI_ATTRIBUTE_MEMORY_CACHED ))) { > - return EFI_UNSUPPORTED; > - } > - > - return DmaAllocateBuffer (MemoryType, Pages, HostAddress); > -} > - > - > -EFI_STATUS > -PciIoFreeBuffer ( > - IN EFI_PCI_IO_PROTOCOL *This, > - IN UINTN Pages, > - IN VOID *HostAddress > - ) > -{ > - return DmaFreeBuffer (Pages, HostAddress); > -} > - > - > -EFI_STATUS > -PciIoFlush ( > - IN EFI_PCI_IO_PROTOCOL *This > - ) > -{ > - return EFI_SUCCESS; > -} > - > -/** > - Retrieves this PCI controller's current PCI bus number, device number, and function number. > - > - @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance. > - @param[out] SegmentNumber The PCI controller's current PCI segment number. > - @param[out] BusNumber The PCI controller's current PCI bus number. > - @param[out] DeviceNumber The PCI controller's current PCI device number. > - @param[out] FunctionNumber The PCI controller's current PCI function number. > - > - @retval EFI_SUCCESS The PCI controller location was returned. > - @retval EFI_INVALID_PARAMETER At least one out of the four output parameters is > - a NULL pointer. > -**/ > -EFI_STATUS > -PciIoGetLocation ( > - IN EFI_PCI_IO_PROTOCOL *This, > - OUT UINTN *SegmentNumber, > - OUT UINTN *BusNumber, > - OUT UINTN *DeviceNumber, > - OUT UINTN *FunctionNumber > - ) > -{ > - EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (This); > - > - if ((SegmentNumber == NULL) || (BusNumber == NULL) || > - (DeviceNumber == NULL) || (FunctionNumber == NULL) ) { > - return EFI_INVALID_PARAMETER; > - } > - > - *SegmentNumber = Private->Segment; > - *BusNumber = 0xff; > - *DeviceNumber = 0; > - *FunctionNumber = 0; > - > - return EFI_SUCCESS; > -} > - > -/** > - Performs an operation on the attributes that this PCI controller supports. > - > - The operations include getting the set of supported attributes, retrieving > - the current attributes, setting the current attributes, enabling attributes, > - and disabling attributes. > - > - @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance. > - @param[in] Operation The operation to perform on the attributes for this > - PCI controller. > - @param[in] Attributes The mask of attributes that are used for Set, > - Enable and Disable operations. > - @param[out] Result A pointer to the result mask of attributes that are > - returned for the Get and Supported operations. This > - is an optional parameter that may be NULL for the > - Set, Enable, and Disable operations. > - > - @retval EFI_SUCCESS The operation on the PCI controller's > - attributes was completed. If the operation > - was Get or Supported, then the attribute mask > - is returned in Result. > - @retval EFI_INVALID_PARAMETER Operation is greater than or equal to > - EfiPciIoAttributeOperationMaximum. > - @retval EFI_INVALID_PARAMETER Operation is Get and Result is NULL. > - @retval EFI_INVALID_PARAMETER Operation is Supported and Result is NULL. > - > -**/ > -EFI_STATUS > -PciIoAttributes ( > - IN EFI_PCI_IO_PROTOCOL *This, > - IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation, > - IN UINT64 Attributes, > - OUT UINT64 *Result OPTIONAL > - ) > -{ > - switch (Operation) { > - case EfiPciIoAttributeOperationGet: > - case EfiPciIoAttributeOperationSupported: > - if (Result == NULL) { > - return EFI_INVALID_PARAMETER; > - } > - // > - // We are not a real PCI device so just say things we kind of do > - // > - *Result = EFI_PCI_DEVICE_ENABLE; > - break; > - > - case EfiPciIoAttributeOperationSet: > - case EfiPciIoAttributeOperationEnable: > - case EfiPciIoAttributeOperationDisable: > - if (Attributes & (~EFI_PCI_DEVICE_ENABLE)) { > - return EFI_UNSUPPORTED; > - } > - // Since we are not a real PCI device no enable/set or disable operations exist. > - return EFI_SUCCESS; > - > - default: > - return EFI_INVALID_PARAMETER; > - }; > - return EFI_SUCCESS; > -} > - > -EFI_STATUS > -PciIoGetBarAttributes ( > - IN EFI_PCI_IO_PROTOCOL *This, > - IN UINT8 BarIndex, > - OUT UINT64 *Supports, OPTIONAL > - OUT VOID **Resources OPTIONAL > - ) > -{ > - ASSERT (FALSE); > - return EFI_UNSUPPORTED; > -} > - > -EFI_STATUS > -PciIoSetBarAttributes ( > - IN EFI_PCI_IO_PROTOCOL *This, > - IN UINT64 Attributes, > - IN UINT8 BarIndex, > - IN OUT UINT64 *Offset, > - IN OUT UINT64 *Length > - ) > -{ > - ASSERT (FALSE); > - return EFI_UNSUPPORTED; > -} > - > -EFI_PCI_IO_PROTOCOL PciIoTemplate = > -{ > - PciIoPollMem, > - PciIoPollIo, > - { PciIoMemRead, PciIoMemWrite }, > - { PciIoIoRead, PciIoIoWrite }, > - { PciIoPciRead, PciIoPciWrite }, > - PciIoCopyMem, > - PciIoMap, > - PciIoUnmap, > - PciIoAllocateBuffer, > - PciIoFreeBuffer, > - PciIoFlush, > - PciIoGetLocation, > - PciIoAttributes, > - PciIoGetBarAttributes, > - PciIoSetBarAttributes, > - 0, > - 0 > -}; > - > -EFI_STATUS > -PciInstallDevice ( > - IN UINTN DeviceId, > - IN PHYSICAL_ADDRESS MemoryStart, > - IN UINT64 MemorySize, > - IN UINTN ClassCode1, > - IN UINTN ClassCode2, > - IN UINTN ClassCode3 > - ) > -{ > - EFI_STATUS Status; > - EFI_HANDLE Handle; > - EFI_PCI_IO_PRIVATE_DATA *Private; > - > - // Configure USB host > - ConfigureUSBHost (); > - > - // Create a private structure > - Private = AllocatePool (sizeof (EFI_PCI_IO_PRIVATE_DATA)); > - if (Private == NULL) { > - Status = EFI_OUT_OF_RESOURCES; > - return Status; > - } > - > - Private->Signature = EFI_PCI_IO_PRIVATE_DATA_SIGNATURE; // Fill in signature > - Private->RootBridge.Signature = PCI_ROOT_BRIDGE_SIGNATURE; // Fake Root Bridge structure needs a signature too > - Private->RootBridge.MemoryStart = MemoryStart; // Get the USB capability register base > - Private->Segment = 0; // Default to segment zero > - > - // Calculate the total size of the USB controller (OHCI + EHCI). > - Private->RootBridge.MemorySize = MemorySize; //CapabilityLength + (HOST_CONTROLLER_OPERATION_REG_SIZE + ((4 * PhysicalPorts) - 1)); > - > - // Create fake PCI config space: OHCI + EHCI > - Private->ConfigSpace = AllocateZeroPool (sizeof (PCI_TYPE00)); > - if (Private->ConfigSpace == NULL) { > - Status = EFI_OUT_OF_RESOURCES; > - FreePool (Private); > - return Status; > - } > - > - // > - // Configure PCI config space: OHCI + EHCI > - // > - Private->ConfigSpace->Hdr.VendorId = 0xFFFF; // Invalid vendor Id as it is not an actual device. > - Private->ConfigSpace->Hdr.DeviceId = 0x0000; // Not relevant as the vendor id is not valid. > - Private->ConfigSpace->Hdr.ClassCode[0] = ClassCode1; > - Private->ConfigSpace->Hdr.ClassCode[1] = ClassCode2; > - Private->ConfigSpace->Hdr.ClassCode[2] = ClassCode3; > - Private->ConfigSpace->Device.Bar[0] = MemoryStart; > - > - Handle = NULL; > - > - // Unique device path. > - CopyMem (&Private->DevicePath, &PciIoDevicePathTemplate, sizeof (PciIoDevicePathTemplate)); > - Private->DevicePath.AcpiDevicePath.UID = 1; // Use '1' to differentiate from PLDA root complex > - Private->DevicePath.PciDevicePath.Device = DeviceId; > - > - // Copy protocol structure > - CopyMem (&Private->PciIoProtocol, &PciIoTemplate, sizeof (PciIoTemplate)); > - > - Status = gBS->InstallMultipleProtocolInterfaces (&Handle, > - &gEfiPciIoProtocolGuid, &Private->PciIoProtocol, > - &gEfiDevicePathProtocolGuid, &Private->DevicePath, > - NULL); > - if (EFI_ERROR (Status)) { > - DEBUG ((EFI_D_ERROR, "PciEmulationEntryPoint InstallMultipleProtocolInterfaces () failed.\n")); > - } > - > - return Status; > -} > - > -EFI_STATUS > -PciEmulationEntryPoint ( > - VOID > - ) > -{ > - EFI_STATUS Status; > - > - Status = PciInstallDevice (0, FixedPcdGet32 (PcdSynopsysUsbOhciBaseAddress), SIZE_64KB, PCI_IF_OHCI, PCI_CLASS_SERIAL_USB, PCI_CLASS_SERIAL); > - if (EFI_ERROR (Status)) { > - DEBUG ((EFI_D_ERROR, "PciEmulation: failed to install OHCI device.\n")); > - } > - > - Status = PciInstallDevice (1, FixedPcdGet32 (PcdSynopsysUsbEhciBaseAddress), SIZE_64KB, PCI_IF_EHCI, PCI_CLASS_SERIAL_USB, PCI_CLASS_SERIAL); > - if (EFI_ERROR (Status)) { > - DEBUG ((EFI_D_ERROR, "PciEmulation: failed to install EHCI device.\n")); > - } > - > - return Status; > -} > diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciEmulation.h b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciEmulation.h > deleted file mode 100644 > index de2855d01d6b..000000000000 > --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciEmulation.h > +++ /dev/null > @@ -1,284 +0,0 @@ > -/** @file > - > - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
> - Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved.
> - > - This program and the accompanying materials > - are licensed and made available under the terms and conditions of the BSD License > - which accompanies this distribution. The full text of the license may be found at > - http://opensource.org/licenses/bsd-license.php > - > - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > - > -**/ > - > -#ifndef _PCI_ROOT_BRIDGE_H_ > -#define _PCI_ROOT_BRIDGE_H_ > - > -#include > - > -#include > -#include > -#include > -#include > -#include > -#include > -#include > -#include > - > -#include > -#include > -#include > -#include > -#include > - > -#include > - > -#include "ArmJunoDxeInternal.h" > - > -#define EFI_RESOURCE_NONEXISTENT 0xFFFFFFFFFFFFFFFFULL > -#define EFI_RESOURCE_LESS 0xFFFFFFFFFFFFFFFEULL > -#define EFI_RESOURCE_SATISFIED 0x0000000000000000ULL > - > - > -typedef struct { > - ACPI_HID_DEVICE_PATH AcpiDevicePath; > - EFI_DEVICE_PATH_PROTOCOL EndDevicePath; > -} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH; > - > - > -#define ACPI_CONFIG_IO 0 > -#define ACPI_CONFIG_MMIO 1 > -#define ACPI_CONFIG_BUS 2 > - > -typedef struct { > - EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR Desc[3]; > - EFI_ACPI_END_TAG_DESCRIPTOR EndDesc; > -} ACPI_CONFIG_INFO; > - > - > -#define PCI_ROOT_BRIDGE_SIGNATURE SIGNATURE_32 ('P', 'c', 'i', 'F') > - > -typedef struct { > - UINT32 Signature; > - EFI_HANDLE Handle; > - EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL Io; > - EFI_PCI_ROOT_BRIDGE_DEVICE_PATH DevicePath; > - > - UINT8 StartBus; > - UINT8 EndBus; > - UINT16 Type; > - UINT32 MemoryStart; > - UINT32 MemorySize; > - UINTN IoOffset; > - UINT32 IoStart; > - UINT32 IoSize; > - UINT64 PciAttributes; > - > - ACPI_CONFIG_INFO *Config; > - > -} PCI_ROOT_BRIDGE; > - > - > -#define INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(a) CR (a, PCI_ROOT_BRIDGE, Io, PCI_ROOT_BRIDGE_SIGNATURE) > - > - > -typedef union { > - UINT8 volatile *Buffer; > - UINT8 volatile *Ui8; > - UINT16 volatile *Ui16; > - UINT32 volatile *Ui32; > - UINT64 volatile *Ui64; > - UINTN volatile Ui; > -} PTR; > - > - > - > -EFI_STATUS > -EFIAPI > -PciRootBridgeIoPollMem ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, > - IN UINT64 Address, > - IN UINT64 Mask, > - IN UINT64 Value, > - IN UINT64 Delay, > - OUT UINT64 *Result > - ); > - > -EFI_STATUS > -EFIAPI > -PciRootBridgeIoPollIo ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, > - IN UINT64 Address, > - IN UINT64 Mask, > - IN UINT64 Value, > - IN UINT64 Delay, > - OUT UINT64 *Result > - ); > - > -EFI_STATUS > -EFIAPI > -PciRootBridgeIoMemRead ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, > - IN UINT64 Address, > - IN UINTN Count, > - IN OUT VOID *Buffer > - ); > - > -EFI_STATUS > -EFIAPI > -PciRootBridgeIoMemWrite ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, > - IN UINT64 Address, > - IN UINTN Count, > - IN OUT VOID *Buffer > - ); > - > -EFI_STATUS > -EFIAPI > -PciRootBridgeIoIoRead ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, > - IN UINT64 UserAddress, > - IN UINTN Count, > - IN OUT VOID *UserBuffer > - ); > - > -EFI_STATUS > -EFIAPI > -PciRootBridgeIoIoWrite ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, > - IN UINT64 UserAddress, > - IN UINTN Count, > - IN OUT VOID *UserBuffer > - ); > - > -EFI_STATUS > -EFIAPI > -PciRootBridgeIoCopyMem ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, > - IN UINT64 DestAddress, > - IN UINT64 SrcAddress, > - IN UINTN Count > - ); > - > -EFI_STATUS > -EFIAPI > -PciRootBridgeIoPciRead ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, > - IN UINT64 Address, > - IN UINTN Count, > - IN OUT VOID *Buffer > - ); > - > -EFI_STATUS > -EFIAPI > -PciRootBridgeIoPciWrite ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, > - IN UINT64 Address, > - IN UINTN Count, > - IN OUT VOID *Buffer > - ); > - > -EFI_STATUS > -EFIAPI > -PciRootBridgeIoMap ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation, > - IN VOID *HostAddress, > - IN OUT UINTN *NumberOfBytes, > - OUT EFI_PHYSICAL_ADDRESS *DeviceAddress, > - OUT VOID **Mapping > - ); > - > -EFI_STATUS > -EFIAPI > -PciRootBridgeIoUnmap ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, > - IN VOID *Mapping > - ); > - > -EFI_STATUS > -EFIAPI > -PciRootBridgeIoAllocateBuffer ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, > - IN EFI_ALLOCATE_TYPE Type, > - IN EFI_MEMORY_TYPE MemoryType, > - IN UINTN Pages, > - OUT VOID **HostAddress, > - IN UINT64 Attributes > - ); > - > -EFI_STATUS > -EFIAPI > -PciRootBridgeIoFreeBuffer ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, > - IN UINTN Pages, > - OUT VOID *HostAddress > - ); > - > -EFI_STATUS > -EFIAPI > -PciRootBridgeIoFlush ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This > - ); > - > -EFI_STATUS > -EFIAPI > -PciRootBridgeIoGetAttributes ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, > - OUT UINT64 *Supported, > - OUT UINT64 *Attributes > - ); > - > -EFI_STATUS > -EFIAPI > -PciRootBridgeIoSetAttributes ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, > - IN UINT64 Attributes, > - IN OUT UINT64 *ResourceBase, > - IN OUT UINT64 *ResourceLength > - ); > - > -EFI_STATUS > -EFIAPI > -PciRootBridgeIoConfiguration ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, > - OUT VOID **Resources > - ); > - > -// > -// Private Function Prototypes > -// > -EFI_STATUS > -EFIAPI > -PciRootBridgeIoMemRW ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, > - IN UINTN Count, > - IN BOOLEAN InStrideFlag, > - IN PTR In, > - IN BOOLEAN OutStrideFlag, > - OUT PTR Out > - ); > - > -BOOLEAN > -PciIoMemAddressValid ( > - IN EFI_PCI_IO_PROTOCOL *This, > - IN UINT64 Address > - ); > - > -EFI_STATUS > -EmulatePciIoForEhci ( > - INTN MvPciIfMaxIf > - ); > - > -#endif > diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciRootBridgeIo.c b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciRootBridgeIo.c > deleted file mode 100644 > index f1eaceff28d8..000000000000 > --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciRootBridgeIo.c > +++ /dev/null > @@ -1,299 +0,0 @@ > -/** @file > - > - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
> - > - This program and the accompanying materials > - are licensed and made available under the terms and conditions of the BSD License > - which accompanies this distribution. The full text of the license may be found at > - http://opensource.org/licenses/bsd-license.php > - > - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > - > -**/ > - > -#include "PciEmulation.h" > - > -BOOLEAN > -PciRootBridgeMemAddressValid ( > - IN PCI_ROOT_BRIDGE *Private, > - IN UINT64 Address > - ) > -{ > - if ((Address >= Private->MemoryStart) && (Address < (Private->MemoryStart + Private->MemorySize))) { > - return TRUE; > - } > - > - return FALSE; > -} > - > - > -EFI_STATUS > -PciRootBridgeIoMemRW ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, > - IN UINTN Count, > - IN BOOLEAN InStrideFlag, > - IN PTR In, > - IN BOOLEAN OutStrideFlag, > - OUT PTR Out > - ) > -{ > - UINTN Stride; > - UINTN InStride; > - UINTN OutStride; > - > - Width = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) (Width & 0x03); > - Stride = (UINTN)1 << Width; > - InStride = InStrideFlag ? Stride : 0; > - OutStride = OutStrideFlag ? Stride : 0; > - > - // > - // Loop for each iteration and move the data > - // > - switch (Width) { > - case EfiPciWidthUint8: > - for (;Count > 0; Count--, In.Buffer += InStride, Out.Buffer += OutStride) { > - *In.Ui8 = *Out.Ui8; > - } > - break; > - case EfiPciWidthUint16: > - for (;Count > 0; Count--, In.Buffer += InStride, Out.Buffer += OutStride) { > - *In.Ui16 = *Out.Ui16; > - } > - break; > - case EfiPciWidthUint32: > - for (;Count > 0; Count--, In.Buffer += InStride, Out.Buffer += OutStride) { > - *In.Ui32 = *Out.Ui32; > - } > - break; > - default: > - return EFI_INVALID_PARAMETER; > - } > - > - return EFI_SUCCESS; > -} > - > -EFI_STATUS > -PciRootBridgeIoPciRW ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, > - IN BOOLEAN Write, > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, > - IN UINT64 UserAddress, > - IN UINTN Count, > - IN OUT VOID *UserBuffer > - ) > -{ > - return EFI_SUCCESS; > -} > - > -/** > - Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space. > - > - @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. > - @param Width Signifies the width of the memory operations. > - @param Address The base address of the memory operations. > - @param Count The number of memory operations to perform. > - @param Buffer For read operations, the destination buffer to store the results. For write > - operations, the source buffer to write data from. > - > - @retval EFI_SUCCESS The data was read from or written to the PCI root bridge. > - @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. > - @retval EFI_INVALID_PARAMETER One or more parameters are invalid. > - > -**/ > -EFI_STATUS > -EFIAPI > -PciRootBridgeIoMemRead ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, > - IN UINT64 Address, > - IN UINTN Count, > - IN OUT VOID *Buffer > - ) > -{ > - PCI_ROOT_BRIDGE *Private; > - UINTN AlignMask; > - PTR In; > - PTR Out; > - > - if ( Buffer == NULL ) { > - return EFI_INVALID_PARAMETER; > - } > - > - Private = INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (This); > - > - if (!PciRootBridgeMemAddressValid (Private, Address)) { > - return EFI_INVALID_PARAMETER; > - } > - > - AlignMask = (1 << (Width & 0x03)) - 1; > - if (Address & AlignMask) { > - return EFI_INVALID_PARAMETER; > - } > - > - In.Buffer = Buffer; > - Out.Buffer = (VOID *)(UINTN) Address; > - > - switch (Width) { > - case EfiPciWidthUint8: > - case EfiPciWidthUint16: > - case EfiPciWidthUint32: > - case EfiPciWidthUint64: > - return PciRootBridgeIoMemRW (Width, Count, TRUE, In, TRUE, Out); > - > - case EfiPciWidthFifoUint8: > - case EfiPciWidthFifoUint16: > - case EfiPciWidthFifoUint32: > - case EfiPciWidthFifoUint64: > - return PciRootBridgeIoMemRW (Width, Count, TRUE, In, FALSE, Out); > - > - case EfiPciWidthFillUint8: > - case EfiPciWidthFillUint16: > - case EfiPciWidthFillUint32: > - case EfiPciWidthFillUint64: > - return PciRootBridgeIoMemRW (Width, Count, FALSE, In, TRUE, Out); > - > - default: > - break; > - } > - > - return EFI_INVALID_PARAMETER; > -} > - > -/** > - Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space. > - > - @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. > - @param Width Signifies the width of the memory operations. > - @param Address The base address of the memory operations. > - @param Count The number of memory operations to perform. > - @param Buffer For read operations, the destination buffer to store the results. For write > - operations, the source buffer to write data from. > - > - @retval EFI_SUCCESS The data was read from or written to the PCI root bridge. > - @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. > - @retval EFI_INVALID_PARAMETER One or more parameters are invalid. > - > -**/ > -EFI_STATUS > -EFIAPI > -PciRootBridgeIoMemWrite ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, > - IN UINT64 Address, > - IN UINTN Count, > - IN OUT VOID *Buffer > - ) > -{ > - PCI_ROOT_BRIDGE *Private; > - UINTN AlignMask; > - PTR In; > - PTR Out; > - > - if ( Buffer == NULL ) { > - return EFI_INVALID_PARAMETER; > - } > - > - Private = INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (This); > - > - if (!PciRootBridgeMemAddressValid (Private, Address)) { > - return EFI_INVALID_PARAMETER; > - } > - > - AlignMask = (1 << (Width & 0x03)) - 1; > - if (Address & AlignMask) { > - return EFI_INVALID_PARAMETER; > - } > - > - In.Buffer = (VOID *)(UINTN) Address; > - Out.Buffer = Buffer; > - > - switch (Width) { > - case EfiPciWidthUint8: > - case EfiPciWidthUint16: > - case EfiPciWidthUint32: > - case EfiPciWidthUint64: > - return PciRootBridgeIoMemRW (Width, Count, TRUE, In, TRUE, Out); > - > - case EfiPciWidthFifoUint8: > - case EfiPciWidthFifoUint16: > - case EfiPciWidthFifoUint32: > - case EfiPciWidthFifoUint64: > - return PciRootBridgeIoMemRW (Width, Count, FALSE, In, TRUE, Out); > - > - case EfiPciWidthFillUint8: > - case EfiPciWidthFillUint16: > - case EfiPciWidthFillUint32: > - case EfiPciWidthFillUint64: > - return PciRootBridgeIoMemRW (Width, Count, TRUE, In, FALSE, Out); > - > - default: > - break; > - } > - > - return EFI_INVALID_PARAMETER; > -} > - > -/** > - Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space. > - > - @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. > - @param Width Signifies the width of the memory operations. > - @param Address The base address of the memory operations. > - @param Count The number of memory operations to perform. > - @param Buffer For read operations, the destination buffer to store the results. For write > - operations, the source buffer to write data from. > - > - @retval EFI_SUCCESS The data was read from or written to the PCI root bridge. > - @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. > - @retval EFI_INVALID_PARAMETER One or more parameters are invalid. > - > -**/ > -EFI_STATUS > -EFIAPI > -PciRootBridgeIoPciRead ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, > - IN UINT64 Address, > - IN UINTN Count, > - IN OUT VOID *Buffer > - ) > -{ > - if (Buffer == NULL) { > - return EFI_INVALID_PARAMETER; > - } > - > - return PciRootBridgeIoPciRW (This, FALSE, Width, Address, Count, Buffer); > -} > - > -/** > - Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space. > - > - @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. > - @param Width Signifies the width of the memory operations. > - @param Address The base address of the memory operations. > - @param Count The number of memory operations to perform. > - @param Buffer For read operations, the destination buffer to store the results. For write > - operations, the source buffer to write data from. > - > - @retval EFI_SUCCESS The data was read from or written to the PCI root bridge. > - @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. > - @retval EFI_INVALID_PARAMETER One or more parameters are invalid. > - > -**/ > -EFI_STATUS > -EFIAPI > -PciRootBridgeIoPciWrite ( > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, > - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, > - IN UINT64 Address, > - IN UINTN Count, > - IN OUT VOID *Buffer > - ) > -{ > - if (Buffer == NULL) { > - return EFI_INVALID_PARAMETER; > - } > - > - return PciRootBridgeIoPciRW (This, TRUE, Width, Address, Count, Buffer); > -} > -- > 2.9.3 >