From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr0-x233.google.com (mail-wr0-x233.google.com [IPv6:2a00:1450:400c:c0c::233]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 57BDD21DFA8F2 for ; Thu, 6 Apr 2017 13:09:15 -0700 (PDT) Received: by mail-wr0-x233.google.com with SMTP id g19so35097320wrb.0 for ; Thu, 06 Apr 2017 13:09:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=LqMl9IHQOA4N9IaHb9vCQnpmj8k2k6Cnj8OOnrDJE0Y=; b=Y6Zh2wZ2eF/77tU8XTiFBDyvDJDrzXj7clI+mTBH1Car02ihh1KlFxi00RTdOoEiQw uNn/lN7vgn7uX906QphfR/XjT+PnUGFdmk3LXG+W5lxr3OuNDSd15DObzysmTaoBjKLk kVHE/KtfBeJ4Tc4X8BmKUXGAD4yMjmVigw10k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=LqMl9IHQOA4N9IaHb9vCQnpmj8k2k6Cnj8OOnrDJE0Y=; b=i8B5R0yIzdmIQicFZEDKt/nIomgYMOKiy4JtVgBRrZiDS4VdB0qO5rkYlI1WzVgpcy elKoV9IOCIRA23VP5nAMsy7QfVz76930IBECLjlFl2AFuxrXI7YoUCDLDlBkSqL1uPFW oNGFMldYbkd4FzhBl9mpD8/i1Mq2VL+gm4IraNHp0DikXO8iVmlObBqcCj9QQ6acwuC3 bq7GYJbO4R2cP28KOWDdiycXvpOJxU2SJMC6IzGQJtNnDuCK7B+BjlMlTJVczkGd78AU NPpXDsaxikCFnEDsNzI/KnhQzeawWi0irTEc4cSQ66CowNEm/JyvUfJsuo4d1+h1/cky 9anw== X-Gm-Message-State: AFeK/H1NPwkM3hQQ+8qeX3p9JmR/dga9Uj1CHkBIS8FTV+z+xBckBF8Cd8Xd8uLX45p3OFUx X-Received: by 10.223.156.18 with SMTP id f18mr25423075wrc.113.1491509353947; Thu, 06 Apr 2017 13:09:13 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id w12sm3319744wra.21.2017.04.06.13.09.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 06 Apr 2017 13:09:13 -0700 (PDT) Date: Thu, 6 Apr 2017 21:09:11 +0100 From: Leif Lindholm To: Ard Biesheuvel Cc: "edk2-devel@lists.01.org" , Ryan Harkin , Evan Lloyd , Jeremy Linton Message-ID: <20170406200911.GQ25239@bivouac.eciton.net> References: <20170406131551.3322-1-ard.biesheuvel@linaro.org> <20170406131551.3322-2-ard.biesheuvel@linaro.org> <20170406182648.GK25239@bivouac.eciton.net> <20170406184507.GO25239@bivouac.eciton.net> <20170406190610.GP25239@bivouac.eciton.net> MIME-Version: 1.0 In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) Subject: Re: [PATCH v2 1/5] ArmPlatformPkg/FVP: map motherboard VRAM as uncached memory X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 06 Apr 2017 20:09:15 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Apr 06, 2017 at 09:01:57PM +0100, Ard Biesheuvel wrote: > On 6 April 2017 at 20:06, Leif Lindholm wrote: > > On Thu, Apr 06, 2017 at 07:46:50PM +0100, Ard Biesheuvel wrote: > >> >> >> + // VRAM > >> >> >> + VirtualMemoryTable[++Index].PhysicalBase = PL111_CLCD_VRAM_MOTHERBOARD_BASE; > >> >> >> + VirtualMemoryTable[Index].VirtualBase = PL111_CLCD_VRAM_MOTHERBOARD_BASE; > >> >> >> + VirtualMemoryTable[Index].Length = PL111_CLCD_VRAM_MOTHERBOARD_SIZE; > >> >> >> + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED; > >> >> > > >> >> > Hmm, looking at this made me a bit confused though. Normal uncached > >> >> > memory is certainly bufferable (that's basically what write-combining > >> >> > means). > >> >> > > >> >> > >> >> It maps to MAIR attribute encoding 0x44, which translates as > >> >> > >> >> Normal Memory, Outer Non-Cacheable, Inner Non-Cacheable > >> > > >> > Exactly - which is definitely "buffered". > >> > > >> >> > This looks like a naming hangover from ARMv5 translation table format. > >> >> > Is it about time we clean this up? > >> >> > >> >> The whole 'ARM_MEMORY_REGION_xxxx' intermediate namespace should be > >> >> removed, I think. > >> > > >> > That sounds like a good idea to me. > >> > There's also _NONSECURE crud in there. > >> > > >> > >> Yes. But I hope you're not saying you want that to be done first > >> before this patch can go in? > > > > No, but it may mean it makes sense to add a comment regarding the > > Attributes line, since it looks like it's doing the opposite of what > > is actually being done. > > > > Something like > > --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c > +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c > @@ -134,6 +134,12 @@ ArmPlatformGetVirtualMemoryMap ( > VirtualMemoryTable[++Index].PhysicalBase = PL111_CLCD_VRAM_MOTHERBOARD_BASE; > VirtualMemoryTable[Index].VirtualBase = PL111_CLCD_VRAM_MOTHERBOARD_BASE; > VirtualMemoryTable[Index].Length = PL111_CLCD_VRAM_MOTHERBOARD_SIZE; > + // > + // Map the VRAM region as Normal Non-Cacheable memory and not device memory, > + // so that we can use the accelerated string routines that may use unaligned > + // accesses or DC ZVA instructions. The enum identifier is slightly awkward > + // here, but it maps to a memory type that allows buffering and reordering. > + // > VirtualMemoryTable[Index].Attributes = > ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED; > > // Map sparse memory region if present > > perhaps? Yeah, that's spot on. Reviewed-by: Leif Lindholm