From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id BDF552008317D for ; Thu, 6 Apr 2017 18:18:30 -0700 (PDT) Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP; 06 Apr 2017 18:18:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,162,1488873600"; d="scan'208";a="74765742" Received: from jfan12-desk.ccr.corp.intel.com ([10.239.158.57]) by orsmga004.jf.intel.com with ESMTP; 06 Apr 2017 18:18:29 -0700 From: Jeff Fan To: edk2-devel@lists.01.org Cc: Jiewen Yao , Michael Kinney , Feng Tian Date: Fri, 7 Apr 2017 09:18:22 +0800 Message-Id: <20170407011823.12664-5-jeff.fan@intel.com> X-Mailer: git-send-email 2.9.3.windows.2 In-Reply-To: <20170407011823.12664-1-jeff.fan@intel.com> References: <20170407011823.12664-1-jeff.fan@intel.com> Subject: [PATCH v2 4/5] UefiCpuPkg/PiSmmCpuDxeSmm: Consume new APIs X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 07 Apr 2017 01:18:30 -0000 Consuming PeCoffSerachImageBase() from PeCoffGetEntrypointLib and consuming DumpCpuContext() from CpuExceptionHandlerLib to replace its own implementation. Cc: Jiewen Yao Cc: Michael Kinney Cc: Feng Tian Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan --- UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 18 +++++-------- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 37 +++----------------------- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 4 +-- UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h | 6 +---- UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 18 +++++-------- 5 files changed, 18 insertions(+), 65 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c index 119810a..32ce595 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c @@ -1,7 +1,7 @@ /** @file Page table manipulation functions for IA-32 processors -Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.
Copyright (c) 2017, AMD Incorporated. All rights reserved.
This program and the accompanying materials @@ -88,8 +88,8 @@ SmiDefaultPFHandler ( VOID EFIAPI SmiPFHandler ( - IN EFI_EXCEPTION_TYPE InterruptType, - IN EFI_SYSTEM_CONTEXT SystemContext + IN EFI_EXCEPTION_TYPE InterruptType, + IN EFI_SYSTEM_CONTEXT SystemContext ) { UINTN PFAddress; @@ -108,6 +108,7 @@ SmiPFHandler ( // if ((PFAddress >= mCpuHotPlugData.SmrrBase) && (PFAddress < (mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize))) { + DumpCpuContext (InterruptType, SystemContext); CpuIndex = GetCpuIndex (); GuardPageAddress = (mSmmStackArrayBase + EFI_PAGE_SIZE + CpuIndex * mSmmStackSize); if ((FeaturePcdGet (PcdCpuSmmStackGuard)) && @@ -115,15 +116,6 @@ SmiPFHandler ( (PFAddress < (GuardPageAddress + EFI_PAGE_SIZE))) { DEBUG ((DEBUG_ERROR, "SMM stack overflow!\n")); } else { - DEBUG ((DEBUG_ERROR, "SMM exception data - 0x%x(", SystemContext.SystemContextIa32->ExceptionData)); - DEBUG ((DEBUG_ERROR, "I:%x, R:%x, U:%x, W:%x, P:%x", - (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != 0, - (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_RSVD) != 0, - (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_US) != 0, - (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_WR) != 0, - (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_P) != 0 - )); - DEBUG ((DEBUG_ERROR, ")\n")); if ((SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != 0) { DEBUG ((DEBUG_ERROR, "SMM exception at execution (0x%x)\n", PFAddress)); DEBUG_CODE ( @@ -144,6 +136,7 @@ SmiPFHandler ( // if ((PFAddress < mCpuHotPlugData.SmrrBase) || (PFAddress >= mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)) { + DumpCpuContext (InterruptType, SystemContext); if ((SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != 0) { DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%x) out of SMM range after SMM is locked!\n", PFAddress)); DEBUG_CODE ( @@ -166,6 +159,7 @@ SmiPFHandler ( SystemContext.SystemContextIa32->ExceptionData ); } else { + DumpCpuContext (InterruptType, SystemContext); SmiDefaultPFHandler (); } diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c index 47cba10..2cb0bbc 100755 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c @@ -173,48 +173,17 @@ DumpModuleInfoByIp ( ) { UINTN Pe32Data; - EFI_IMAGE_DOS_HEADER *DosHdr; - EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr; VOID *PdbPointer; - UINT64 DumpIpAddress; // // Find Image Base // - Pe32Data = CallerIpAddress & ~(SIZE_4KB - 1); - while (Pe32Data != 0) { - DosHdr = (EFI_IMAGE_DOS_HEADER *) Pe32Data; - if (DosHdr->e_magic == EFI_IMAGE_DOS_SIGNATURE) { - // - // DOS image header is present, so read the PE header after the DOS image header. - // - Hdr.Pe32 = (EFI_IMAGE_NT_HEADERS32 *)(Pe32Data + (UINTN) ((DosHdr->e_lfanew) & 0x0ffff)); - // - // Make sure PE header address does not overflow and is less than the initial address. - // - if (((UINTN)Hdr.Pe32 > Pe32Data) && ((UINTN)Hdr.Pe32 < CallerIpAddress)) { - if (Hdr.Pe32->Signature == EFI_IMAGE_NT_SIGNATURE) { - // - // It's PE image. - // - break; - } - } - } - - // - // Not found the image base, check the previous aligned address - // - Pe32Data -= SIZE_4KB; - } - - DumpIpAddress = CallerIpAddress; - DEBUG ((EFI_D_ERROR, "It is invoked from the instruction before IP(0x%lx)", DumpIpAddress)); - + Pe32Data = PeCoffSerachImageBase (CallerIpAddress); if (Pe32Data != 0) { + DEBUG ((DEBUG_ERROR, "It is invoked from the instruction before IP(0x%p)", (VOID *) CallerIpAddress)); PdbPointer = PeCoffLoaderGetPdbPointer ((VOID *) Pe32Data); if (PdbPointer != NULL) { - DEBUG ((EFI_D_ERROR, " in module (%a)", PdbPointer)); + DEBUG ((DEBUG_ERROR, " in module (%a)\n", PdbPointer)); } } } diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h index fc9b06e..dbce9ec 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h @@ -694,8 +694,8 @@ SmmRelocateBases ( VOID EFIAPI SmiPFHandler ( - IN EFI_EXCEPTION_TYPE InterruptType, - IN EFI_SYSTEM_CONTEXT SystemContext + IN EFI_EXCEPTION_TYPE InterruptType, + IN EFI_SYSTEM_CONTEXT SystemContext ); /** diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h index 5aaf945..a216891 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h @@ -1,7 +1,7 @@ /** @file SMM profile internal header file. -Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at @@ -41,10 +41,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. // Please disable it. // -#define IA32_PF_EC_P (1u << 0) -#define IA32_PF_EC_WR (1u << 1) -#define IA32_PF_EC_US (1u << 2) -#define IA32_PF_EC_RSVD (1u << 3) #define IA32_PF_EC_ID (1u << 4) #define SMM_PROFILE_NAME L"SmmProfileData" diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c index 19b19d8..32385fa 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c @@ -1,7 +1,7 @@ /** @file Page Fault (#PF) handler for X64 processors -Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.
Copyright (c) 2017, AMD Incorporated. All rights reserved.
This program and the accompanying materials @@ -802,8 +802,8 @@ SmiDefaultPFHandler ( VOID EFIAPI SmiPFHandler ( - IN EFI_EXCEPTION_TYPE InterruptType, - IN EFI_SYSTEM_CONTEXT SystemContext + IN EFI_EXCEPTION_TYPE InterruptType, + IN EFI_SYSTEM_CONTEXT SystemContext ) { UINTN PFAddress; @@ -817,6 +817,7 @@ SmiPFHandler ( PFAddress = AsmReadCr2 (); if (mCpuSmmStaticPageTable && (PFAddress >= LShiftU64 (1, (mPhysicalAddressBits - 1)))) { + DumpCpuContext (InterruptType, SystemContext); DEBUG ((DEBUG_ERROR, "Do not support address 0x%lx by processor!\n", PFAddress)); CpuDeadLoop (); } @@ -827,6 +828,7 @@ SmiPFHandler ( // if ((PFAddress >= mCpuHotPlugData.SmrrBase) && (PFAddress < (mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize))) { + DumpCpuContext (InterruptType, SystemContext); CpuIndex = GetCpuIndex (); GuardPageAddress = (mSmmStackArrayBase + EFI_PAGE_SIZE + CpuIndex * mSmmStackSize); if ((FeaturePcdGet (PcdCpuSmmStackGuard)) && @@ -834,15 +836,6 @@ SmiPFHandler ( (PFAddress < (GuardPageAddress + EFI_PAGE_SIZE))) { DEBUG ((DEBUG_ERROR, "SMM stack overflow!\n")); } else { - DEBUG ((DEBUG_ERROR, "SMM exception data - 0x%lx(", SystemContext.SystemContextX64->ExceptionData)); - DEBUG ((DEBUG_ERROR, "I:%x, R:%x, U:%x, W:%x, P:%x", - (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0, - (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_RSVD) != 0, - (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_US) != 0, - (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_WR) != 0, - (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_P) != 0 - )); - DEBUG ((DEBUG_ERROR, ")\n")); if ((SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0) { DEBUG ((DEBUG_ERROR, "SMM exception at execution (0x%lx)\n", PFAddress)); DEBUG_CODE ( @@ -863,6 +856,7 @@ SmiPFHandler ( // if ((PFAddress < mCpuHotPlugData.SmrrBase) || (PFAddress >= mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)) { + DumpCpuContext (InterruptType, SystemContext); if ((SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0) { DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%lx) out of SMM range after SMM is locked!\n", PFAddress)); DEBUG_CODE ( -- 2.9.3.windows.2