From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-x22a.google.com (mail-wm0-x22a.google.com [IPv6:2a00:1450:400c:c09::22a]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id CF0D12194EB59 for ; Thu, 13 Apr 2017 09:37:23 -0700 (PDT) Received: by mail-wm0-x22a.google.com with SMTP id u2so50822823wmu.0 for ; Thu, 13 Apr 2017 09:37:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=KAW7HoBY0IWkoKsrib4e26M7S6zdcTbicai1QbtZr0o=; b=dYJwhWR1wMRWKA6E3yGN/bZaDaph6t+axBMV8wAiPnF3Yx/a4ur54HI2cgARCV1uCc 4STbvoe8+6BQgOjJo8KoI8n1j/bfApKBOzE0zlbVeVFNE6OsVNJsjbPDWpERHgrBudt7 KPpNn9IULqddZjfTeGj/CqKd60uuVr27KNxuc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=KAW7HoBY0IWkoKsrib4e26M7S6zdcTbicai1QbtZr0o=; b=Ok3dTnxPw64mFOvHnDArtR4BBZqHUolZE3N6/x3OsffCk7roJe8eILsz0TAaARz0/g Q3iD+RZEeej7G2IaK+xPyrJVJ50UW0i938/4FQTT/nQPAmuR/cGMBd9+qm/ln10JNi0P /bpfeSFlkFW8E+IRTl17WJhe3FFjBSdI16i/z/mGn5AdL3ufT3/+dhv3VVg/Rl18Zwom IAbTcds9zq74HiyKXroXky3cJ9N4CdDmN/rrn7IXftgF7AHDDy2UKMYsV/1/c0LSjZz3 Kn/5Zass8laCJDDsm5EYhlrm+PE10Ckv/Z2N5llegAGUyy2vtL28K+7lBFwlvnV00n/Y N2aQ== X-Gm-Message-State: AN3rC/7IqBdfjKPz5vytiKUl151pk0jwAXFFjQva8sCB3J/dFJt3viFe pJytCBVF5efmpTH4 X-Received: by 10.28.8.145 with SMTP id 139mr3845146wmi.26.1492101441996; Thu, 13 Apr 2017 09:37:21 -0700 (PDT) Received: from localhost.localdomain ([196.85.182.219]) by smtp.gmail.com with ESMTPSA id n45sm11280160wrn.30.2017.04.13.09.37.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Apr 2017 09:37:21 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org Cc: liming.gao@intel.com, lorenzo.pieralisi@arm.com, Ard Biesheuvel Date: Thu, 13 Apr 2017 17:37:05 +0100 Message-Id: <20170413163705.26316-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.9.3 Subject: [PATCH] MdePkg/IndustryStandard: add definitions for ACPI 6.0 IORT X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 13 Apr 2017 16:37:24 -0000 This adds #defines and struct typedefs for the various node types in the ACPI 6.0 IO Remapping Table (IORT). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- MdePkg/Include/IndustryStandard/IoRemappingTable.h | 187 ++++++++++++++++++++ 1 file changed, 187 insertions(+) diff --git a/MdePkg/Include/IndustryStandard/IoRemappingTable.h b/MdePkg/Include/IndustryStandard/IoRemappingTable.h new file mode 100644 index 000000000000..674cb611961d --- /dev/null +++ b/MdePkg/Include/IndustryStandard/IoRemappingTable.h @@ -0,0 +1,187 @@ +/** @file + ACPI IO Remapping Table (IORT) as specified in ARM spec DEN0049B + + Copyright (c) 2017, Linaro Limited. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +**/ + +#ifndef __IO_REMAPPING_TABLE_H__ +#define __IO_REMAPPING_TABLE_H__ + +#include + +#define EFI_ACPI_IO_REMAPPING_TABLE_REVISION 0x0 + +#define EFI_ACPI_IORT_TYPE_ITS_GROUP 0x0 +#define EFI_ACPI_IORT_TYPE_NAMED_COMP 0x1 +#define EFI_ACPI_IORT_TYPE_ROOT_COMPLEX 0x2 +#define EFI_ACPI_IORT_TYPE_SMMUv1v2 0x3 +#define EFI_ACPI_IORT_TYPE_SMMUv3 0x4 + +#define EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA BIT0 + +#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_TR BIT0 +#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_WA BIT1 +#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_RA BIT2 +#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_AHO BIT3 + +#define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM BIT0 +#define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_DACS BIT1 + +#define EFI_ACPI_IORT_SMMUv1v2_MODEL_v1 0x0 +#define EFI_ACPI_IORT_SMMUv1v2_MODEL_v2 0x1 +#define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU400 0x2 +#define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU500 0x3 + +#define EFI_ACPI_IORT_SMMUv1v2_FLAG_DVM BIT0 +#define EFI_ACPI_IORT_SMMUv1v2_FLAG_COH_WALK BIT1 + +#define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL 0x0 +#define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_EDGE 0x1 + +#define EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE BIT0 +#define EFI_ACPI_IORT_SMMUv3_FLAG_HTTU_OVERRIDE BIT1 + +#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED 0x0 +#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED 0x1 + +#define EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE BIT0 + +#pragma pack(1) + +// +// Table header +// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + INT32 NumNodes; + INT32 NodeOffset; + INT32 Reserved; +} EFI_ACPI_6_0_IO_REMAPPING_TABLE; + +// +// Definition for ID mapping table shared by all node types +// +typedef struct { + UINT32 InputBase; + UINT32 NumIds; + UINT32 OutputBase; + UINT32 OutputReference; + UINT32 Flags; +} EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE; + +// +// Header definition shared by all node types +// +typedef struct { + UINT8 Type; + UINT16 Length; + UINT8 Revision; + UINT32 Reserved; + UINT32 NumIdMappings; + UINT32 IdReference; +} EFI_ACPI_6_0_IO_REMAPPING_NODE; + +// +// Node type 0: ITS node +// +typedef struct { + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; + + UINT32 NumIts; +/* + UINT32 ItsIdentifiers[0]; +*/ +} EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE; + +// +// Node type 1: root complex node +// +typedef struct { + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; + + UINT32 CacheCoherent; + UINT8 AllocationHints; + UINT16 Reserved; + UINT8 MemoryAccessFlags; + + UINT32 AtsAttribute; + UINT32 PciSegmentNumber; +} EFI_ACPI_6_0_IO_REMAPPING_RC_NODE; + +// +// Node type 2: named component node +// +typedef struct { + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; + + UINT32 Flags; + UINT32 CacheCoherent; + UINT8 AllocationHints; + UINT16 Reserved; + UINT8 MemoryAccessFlags; + UINT8 AddressSizeLimit; +/* + CHAR8 ObjectName[0]; +*/ +} EFI_ACPI_6_0_IO_REMAPPING_NAMED_COMP_NODE; + +// +// Node type 3: SMMUv1 or SMMUv2 node +// +typedef struct { + UINT32 Interrupt; + UINT32 InterruptFlags; +} EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT; + +typedef struct { + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; + + UINT64 Base; + UINT64 Span; + UINT32 Model; + UINT32 Flags; + UINT32 GlobalInterruptArrayRef; + UINT32 NumContextInterrupts; + UINT32 ContextInterruptArrayRef; + UINT32 NumPmuInterrupts; + UINT32 PmuInterruptArrayRef; + + UINT32 SMMU_NSgIrpt; + UINT32 SMMU_NSgIrptFlags; + UINT32 SMMU_NSgCfgIrpt; + UINT32 SMMU_NSgCfgIrptFlags; + +/* + EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT ContextInterrupt[0]; + EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT PmuInterrupt[0]; +*/ +} EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE; + +// +// Node type 4: SMMUv4 node +// +typedef struct { + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; + + UINT64 Base; + UINT32 Flags; + UINT32 Reserved; + UINT64 VatosAddress; + UINT32 Model; + UINT32 Event; + UINT32 Pri; + UINT32 Gerr; + UINT32 Sync; +} EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE; + +#pragma pack() + +#endif -- 2.9.3