From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A8E00219FFEE2 for ; Wed, 24 May 2017 01:20:15 -0700 (PDT) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga105.jf.intel.com with ESMTP; 24 May 2017 01:20:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,385,1491289200"; d="scan'208";a="860728092" Received: from jfan12-desk.ccr.corp.intel.com ([10.239.158.57]) by FMSMGA003.fm.intel.com with ESMTP; 24 May 2017 01:20:14 -0700 From: Jeff Fan To: edk2-devel@lists.01.org Cc: Michael D Kinney , Eric Dong Date: Wed, 24 May 2017 16:18:40 +0800 Message-Id: <20170524081841.10496-2-jeff.fan@intel.com> X-Mailer: git-send-email 2.9.3.windows.2 In-Reply-To: <20170524081841.10496-1-jeff.fan@intel.com> References: <20170524081841.10496-1-jeff.fan@intel.com> Subject: [PATCH v2 1/2] UefiCpuPkg/CpuCommonFeaturesLib: Support X2APIC enable X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 24 May 2017 08:20:15 -0000 Current X2APIC is enabled in MpInitLib (used by CpuMpPei and CpuDxe) to follow SDM suggestion. That means we only enable X2APIC if we found there are any initial CPU ID value >= 255. This patch is to provide one chance for platform to enable X2APIC even there is no any initial CPU ID value >= 255. Cc: Michael D Kinney Cc: Eric Dong Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan --- .../CpuCommonFeaturesLib/CpuCommonFeatures.h | 15 +++++ .../CpuCommonFeaturesLib/CpuCommonFeaturesLib.c | 2 +- UefiCpuPkg/Library/CpuCommonFeaturesLib/X2Apic.c | 77 +++++++++++++++++++--- 3 files changed, 83 insertions(+), 11 deletions(-) diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h index aa6d112..9a7afed 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h @@ -798,6 +798,21 @@ C1eInitialize ( ); /** + Prepares for the data used by CPU feature detection and initialization. + + @param[in] NumberOfProcessors The number of CPUs in the platform. + + @return Pointer to a buffer of CPU related configuration data. + + @note This service could be called by BSP only. +**/ +VOID * +EFIAPI +X2ApicGetConfigData ( + IN UINTN NumberOfProcessors + ); + +/** Detects if X2Apci feature supported on current processor. Detect if X2Apci has been already enabled. diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c index 3390aa8..793a095 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c @@ -211,7 +211,7 @@ CpuCommonFeaturesLibConstructor ( if (IsCpuFeatureSupported (CPU_FEATURE_X2APIC)) { Status = RegisterCpuFeature ( "X2Apic", - NULL, + X2ApicGetConfigData, X2ApicSupport, X2ApicInitialize, CPU_FEATURE_X2APIC, diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/X2Apic.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/X2Apic.c index 9c2ad9a..6673c95 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/X2Apic.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/X2Apic.c @@ -15,6 +15,28 @@ #include "CpuCommonFeatures.h" /** + Prepares for the data used by CPU feature detection and initialization. + + @param[in] NumberOfProcessors The number of CPUs in the platform. + + @return Pointer to a buffer of CPU related configuration data. + + @note This service could be called by BSP only. +**/ +VOID * +EFIAPI +X2ApicGetConfigData ( + IN UINTN NumberOfProcessors + ) +{ + BOOLEAN *ConfigData; + + ConfigData = AllocateZeroPool (sizeof (BOOLEAN) * NumberOfProcessors); + ASSERT (ConfigData != NULL); + return ConfigData; +} + +/** Detects if X2Apci feature supported on current processor. Detect if X2Apci has been already enabled. @@ -39,8 +61,17 @@ X2ApicSupport ( IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, IN VOID *ConfigData OPTIONAL ) -{ - return (GetApicMode () == LOCAL_APIC_MODE_X2APIC); +{ + BOOLEAN *X2ApicEnabled; + + ASSERT (ConfigData != NULL); + X2ApicEnabled = (BOOLEAN *) ConfigData; + // + // *ConfigData indicates if X2APIC enabled on current processor + // + X2ApicEnabled[ProcessorNumber] = (GetApicMode () == LOCAL_APIC_MODE_X2APIC) ? TRUE : FALSE; + + return (CpuInfo->CpuIdVersionInfoEcx.Bits.x2APIC == 1); } /** @@ -69,13 +100,39 @@ X2ApicInitialize ( IN BOOLEAN State ) { - PRE_SMM_CPU_REGISTER_TABLE_WRITE_FIELD ( - ProcessorNumber, - Msr, - MSR_IA32_APIC_BASE, - MSR_IA32_APIC_BASE_REGISTER, - Bits.EXTD, - (State) ? 1 : 0 - ); + BOOLEAN *X2ApicEnabled; + + ASSERT (ConfigData != NULL); + X2ApicEnabled = (BOOLEAN *) ConfigData; + if (X2ApicEnabled[ProcessorNumber]) { + if (!State) { + DEBUG ((DEBUG_ERROR, "X2APIC should be enabled by PcdCpuFeaturesUserConfiguration!\n")); + ASSERT (FALSE); + } else { + PRE_SMM_CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + Msr, + MSR_IA32_APIC_BASE, + MSR_IA32_APIC_BASE_REGISTER, + Bits.EXTD, + 1 + ); + } + } else { + // + // Enable X2APIC mode only if X2APIC is not enabled, + // Needn't to disabe X2APIC mode again if X2APIC is not enabled + // + if (State) { + CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + Msr, + MSR_IA32_APIC_BASE, + MSR_IA32_APIC_BASE_REGISTER, + Bits.EXTD, + 1 + ); + } + } return RETURN_SUCCESS; } -- 2.9.3.windows.2