From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 834AC21AE3CB2 for ; Tue, 30 May 2017 20:03:31 -0700 (PDT) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 May 2017 20:04:31 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,421,1491289200"; d="scan'208";a="862978663" Received: from ray-dev.ccr.corp.intel.com ([10.239.9.1]) by FMSMGA003.fm.intel.com with ESMTP; 30 May 2017 20:04:30 -0700 From: Ruiyu Ni To: edk2-devel@lists.01.org Cc: Hao A Wu , Star Zeng Date: Wed, 31 May 2017 11:04:26 +0800 Message-Id: <20170531030426.425444-1-ruiyu.ni@intel.com> X-Mailer: git-send-email 2.12.2.windows.2 Subject: [PATCH] MdeModulePkg/Xhci: Remove TRB when canceling Async Int Transfer X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 31 May 2017 03:03:31 -0000 Some USB devices don't report data periodically through Int Transfer. They report data only when be asked. If the TRB is not removed from the XHCI HW, when next time HOST asks data again, the data is reported but consumed by the previous TRB, which results the HOST thinks data never comes. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao A Wu Cc: Star Zeng --- MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c index 4bec76a85f..058e8f36ba 100644 --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c @@ -2,7 +2,7 @@ XHCI transfer scheduling routines. -Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at @@ -1319,6 +1319,7 @@ XhciDelAsyncIntTransfer ( LIST_ENTRY *Next; URB *Urb; EFI_USB_DATA_DIRECTION Direction; + EFI_STATUS Status; Direction = ((EpNum & 0x80) != 0) ? EfiUsbDataIn : EfiUsbDataOut; EpNum &= 0x0F; @@ -1330,6 +1331,15 @@ XhciDelAsyncIntTransfer ( if ((Urb->Ep.BusAddr == BusAddr) && (Urb->Ep.EpAddr == EpNum) && (Urb->Ep.Direction == Direction)) { + // + // Device doesn't finish the IntTransfer until real data comes + // So the TRB should be removed as well. + // + Status = XhcDequeueTrbFromEndpoint (Xhc, Urb); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "XhciDelAsyncIntTransfer: XhcDequeueTrbFromEndpoint failed\n")); + } + RemoveEntryList (&Urb->UrbList); FreePool (Urb->Data); XhcFreeUrb (Xhc, Urb); @@ -1354,9 +1364,20 @@ XhciDelAllAsyncIntTransfers ( LIST_ENTRY *Entry; LIST_ENTRY *Next; URB *Urb; + EFI_STATUS Status; EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) { Urb = EFI_LIST_CONTAINER (Entry, URB, UrbList); + + // + // Device doesn't finish the IntTransfer until real data comes + // So the TRB should be removed as well. + // + Status = XhcDequeueTrbFromEndpoint (Xhc, Urb); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "XhciDelAllAsyncIntTransfers: XhcDequeueTrbFromEndpoint failed\n")); + } + RemoveEntryList (&Urb->UrbList); FreePool (Urb->Data); XhcFreeUrb (Xhc, Urb); -- 2.12.2.windows.2