[PATCH 3/5] OvmfPkg/SmmAccess: rebase code unique to SmmAccessPei to Q35TsegSizeLib

[Laszlo Ersek <lersek@redhat.com>]

SmmAccessPei and SmmAccess2Dxe share the internals between their
PEI_SMM_ACCESS_PPI and EFI_SMM_ACCESS2_PROTOCOL implementations,
respectively, in "SmramInternal.c".

In this patch, convert the code that is unique to SmmAccessPei -- namely
SmmAccessPeiEntryPoint() -- to Q35TsegSizeLib client code, as follows:

- Replace FixedPcdGet8 (PcdQ35TsegMbytes) macro invocations with
  Q35TsegSizeGetPreferredMbytes () function calls.

- Replace any mapping, from FixedPcdGet8 (PcdQ35TsegMbytes) to
  MCH_ESMRAMC_TSEG_xMB bitmask macros, with
  Q35TsegSizeGetPreferredEsmramcTsegSzMask() function calls.

This causes no change in observable behavior.

After this patch, no module INF file except
"OvmfPkg/Library/Q35TsegSizeLib/Q35TsegSizeLib.inf" refers to
PcdQ35TsegMbytes.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
---
 OvmfPkg/SmmAccess/SmmAccessPei.inf | 4 +---
 OvmfPkg/SmmAccess/SmmAccessPei.c   | 7 +++----
 2 files changed, 4 insertions(+), 7 deletions(-)

diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.inf b/OvmfPkg/SmmAccess/SmmAccessPei.inf
index 3908b085da3a..c07c603cb663 100644
--- a/OvmfPkg/SmmAccess/SmmAccessPei.inf
+++ b/OvmfPkg/SmmAccess/SmmAccessPei.inf
@@ -51,19 +51,17 @@ [LibraryClasses]
   DebugLib
   HobLib
   IoLib
   PcdLib
   PciLib
   PeiServicesLib
   PeimEntryPoint
+  Q35TsegSizeLib
 
 [FeaturePcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
 
-[FixedPcd]
-  gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes
-
 [Ppis]
   gPeiSmmAccessPpiGuid           ## PRODUCES
 
 [Depex]
   TRUE
diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.c b/OvmfPkg/SmmAccess/SmmAccessPei.c
index a4ce610a4650..104671a15c64 100644
--- a/OvmfPkg/SmmAccess/SmmAccessPei.c
+++ b/OvmfPkg/SmmAccess/SmmAccessPei.c
@@ -28,14 +28,15 @@
 #include <Library/BaseMemoryLib.h>
 #include <Library/DebugLib.h>
 #include <Library/HobLib.h>
 #include <Library/IoLib.h>
 #include <Library/PcdLib.h>
 #include <Library/PciLib.h>
 #include <Library/PeiServicesLib.h>
+#include <Library/Q35TsegSizeLib.h>
 #include <Ppi/SmmAccess.h>
 
 #include <OvmfPlatforms.h>
 
 #include "SmramInternal.h"
 
 //
@@ -315,25 +316,23 @@ SmmAccessPeiEntryPoint (
   PciWrite32 (DRAMC_REGISTER_Q35 (MCH_BGSM),
     TopOfLowRamMb << MCH_BGSM_MB_SHIFT);
 
   //
   // Set TSEG Memory Base.
   //
   PciWrite32 (DRAMC_REGISTER_Q35 (MCH_TSEGMB),
-    (TopOfLowRamMb - FixedPcdGet8 (PcdQ35TsegMbytes)) << MCH_TSEGMB_MB_SHIFT);
+    (TopOfLowRamMb - Q35TsegSizeGetPreferredMbytes ()) << MCH_TSEGMB_MB_SHIFT);
 
   //
   // Set TSEG size, and disable TSEG visibility outside of SMM. Note that the
   // T_EN bit has inverse meaning; when T_EN is set, then TSEG visibility is
   // *restricted* to SMM.
   //
   EsmramcVal &= ~(UINT32)MCH_ESMRAMC_TSEG_MASK;
-  EsmramcVal |= FixedPcdGet8 (PcdQ35TsegMbytes) == 8 ? MCH_ESMRAMC_TSEG_8MB :
-                FixedPcdGet8 (PcdQ35TsegMbytes) == 2 ? MCH_ESMRAMC_TSEG_2MB :
-                MCH_ESMRAMC_TSEG_1MB;
+  EsmramcVal |= Q35TsegSizeGetPreferredEsmramcTsegSzMask ();
   EsmramcVal |= MCH_ESMRAMC_T_EN;
   PciWrite8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC), EsmramcVal);
 
   //
   // TSEG should be closed (see above), but unlocked, initially. Set G_SMRAME
   // (Global SMRAM Enable) too, as both D_LCK and T_EN depend on it.
   //
-- 
2.9.3