From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 681CC20082E76 for ; Thu, 8 Jun 2017 10:12:31 -0700 (PDT) Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 317FDA6DFC; Thu, 8 Jun 2017 17:13:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 317FDA6DFC Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=lersek@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 317FDA6DFC Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-122.phx2.redhat.com [10.3.116.122]) by smtp.corp.redhat.com (Postfix) with ESMTP id 666977F1C4; Thu, 8 Jun 2017 17:13:39 +0000 (UTC) From: Laszlo Ersek To: edk2-devel-01 Cc: Jordan Justen Date: Thu, 8 Jun 2017 19:13:31 +0200 Message-Id: <20170608171333.17937-4-lersek@redhat.com> In-Reply-To: <20170608171333.17937-1-lersek@redhat.com> References: <20170608171333.17937-1-lersek@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Thu, 08 Jun 2017 17:13:40 +0000 (UTC) Subject: [PATCH 3/5] OvmfPkg/SmmAccess: rebase code unique to SmmAccessPei to Q35TsegSizeLib X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Jun 2017 17:12:31 -0000 SmmAccessPei and SmmAccess2Dxe share the internals between their PEI_SMM_ACCESS_PPI and EFI_SMM_ACCESS2_PROTOCOL implementations, respectively, in "SmramInternal.c". In this patch, convert the code that is unique to SmmAccessPei -- namely SmmAccessPeiEntryPoint() -- to Q35TsegSizeLib client code, as follows: - Replace FixedPcdGet8 (PcdQ35TsegMbytes) macro invocations with Q35TsegSizeGetPreferredMbytes () function calls. - Replace any mapping, from FixedPcdGet8 (PcdQ35TsegMbytes) to MCH_ESMRAMC_TSEG_xMB bitmask macros, with Q35TsegSizeGetPreferredEsmramcTsegSzMask() function calls. This causes no change in observable behavior. After this patch, no module INF file except "OvmfPkg/Library/Q35TsegSizeLib/Q35TsegSizeLib.inf" refers to PcdQ35TsegMbytes. Cc: Jordan Justen Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek --- OvmfPkg/SmmAccess/SmmAccessPei.inf | 4 +--- OvmfPkg/SmmAccess/SmmAccessPei.c | 7 +++---- 2 files changed, 4 insertions(+), 7 deletions(-) diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.inf b/OvmfPkg/SmmAccess/SmmAccessPei.inf index 3908b085da3a..c07c603cb663 100644 --- a/OvmfPkg/SmmAccess/SmmAccessPei.inf +++ b/OvmfPkg/SmmAccess/SmmAccessPei.inf @@ -51,19 +51,17 @@ [LibraryClasses] DebugLib HobLib IoLib PcdLib PciLib PeiServicesLib PeimEntryPoint + Q35TsegSizeLib [FeaturePcd] gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire -[FixedPcd] - gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes - [Ppis] gPeiSmmAccessPpiGuid ## PRODUCES [Depex] TRUE diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.c b/OvmfPkg/SmmAccess/SmmAccessPei.c index a4ce610a4650..104671a15c64 100644 --- a/OvmfPkg/SmmAccess/SmmAccessPei.c +++ b/OvmfPkg/SmmAccess/SmmAccessPei.c @@ -28,14 +28,15 @@ #include #include #include #include #include #include #include +#include #include #include #include "SmramInternal.h" // @@ -315,25 +316,23 @@ SmmAccessPeiEntryPoint ( PciWrite32 (DRAMC_REGISTER_Q35 (MCH_BGSM), TopOfLowRamMb << MCH_BGSM_MB_SHIFT); // // Set TSEG Memory Base. // PciWrite32 (DRAMC_REGISTER_Q35 (MCH_TSEGMB), - (TopOfLowRamMb - FixedPcdGet8 (PcdQ35TsegMbytes)) << MCH_TSEGMB_MB_SHIFT); + (TopOfLowRamMb - Q35TsegSizeGetPreferredMbytes ()) << MCH_TSEGMB_MB_SHIFT); // // Set TSEG size, and disable TSEG visibility outside of SMM. Note that the // T_EN bit has inverse meaning; when T_EN is set, then TSEG visibility is // *restricted* to SMM. // EsmramcVal &= ~(UINT32)MCH_ESMRAMC_TSEG_MASK; - EsmramcVal |= FixedPcdGet8 (PcdQ35TsegMbytes) == 8 ? MCH_ESMRAMC_TSEG_8MB : - FixedPcdGet8 (PcdQ35TsegMbytes) == 2 ? MCH_ESMRAMC_TSEG_2MB : - MCH_ESMRAMC_TSEG_1MB; + EsmramcVal |= Q35TsegSizeGetPreferredEsmramcTsegSzMask (); EsmramcVal |= MCH_ESMRAMC_T_EN; PciWrite8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC), EsmramcVal); // // TSEG should be closed (see above), but unlocked, initially. Set G_SMRAME // (Global SMRAM Enable) too, as both D_LCK and T_EN depend on it. // -- 2.9.3