From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 86D5D2094554E for ; Thu, 8 Jun 2017 10:12:32 -0700 (PDT) Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 53D38C0586A2; Thu, 8 Jun 2017 17:13:41 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 53D38C0586A2 Authentication-Results: ext-mx07.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx07.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=lersek@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 53D38C0586A2 Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-122.phx2.redhat.com [10.3.116.122]) by smtp.corp.redhat.com (Postfix) with ESMTP id 851FD7F1C3; Thu, 8 Jun 2017 17:13:40 +0000 (UTC) From: Laszlo Ersek To: edk2-devel-01 Cc: Jordan Justen Date: Thu, 8 Jun 2017 19:13:32 +0200 Message-Id: <20170608171333.17937-5-lersek@redhat.com> In-Reply-To: <20170608171333.17937-1-lersek@redhat.com> References: <20170608171333.17937-1-lersek@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Thu, 08 Jun 2017 17:13:41 +0000 (UTC) Subject: [PATCH 4/5] OvmfPkg/SmmAccess: rebase shared PEIM/DXE code to Q35TsegSizeLib X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Jun 2017 17:12:32 -0000 SmmAccessPei and SmmAccess2Dxe share the internals between their PEI_SMM_ACCESS_PPI and EFI_SMM_ACCESS2_PROTOCOL implementations, respectively, in "SmramInternal.c". In this patch, convert "SmramInternal.c" to Q35TsegSizeLib client code. Replace any mapping, from MCH_ESMRAMC_TSEG_xMB bitmask macros to byte counts, with (Q35TsegSizeConvertEsmramcValToMbytes (EsmramcVal) * SIZE_1MB) expressions. This causes no change in observable behavior. After this patch, the conversion to Q35TsegSizeLib is complete. Cc: Jordan Justen Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek --- OvmfPkg/SmmAccess/SmmAccess2Dxe.inf | 1 + OvmfPkg/SmmAccess/SmramInternal.c | 13 ++++++------- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf b/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf index 31e4dfa02991..f591b837bb62 100644 --- a/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf +++ b/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf @@ -41,14 +41,15 @@ [Packages] MdePkg/MdePkg.dec OvmfPkg/OvmfPkg.dec [LibraryClasses] DebugLib PcdLib PciLib + Q35TsegSizeLib UefiBootServicesTableLib UefiDriverEntryPoint [Protocols] gEfiSmmAccess2ProtocolGuid ## PRODUCES [FeaturePcd] diff --git a/OvmfPkg/SmmAccess/SmramInternal.c b/OvmfPkg/SmmAccess/SmramInternal.c index c3267ca94031..e7a7acbf1f8b 100644 --- a/OvmfPkg/SmmAccess/SmramInternal.c +++ b/OvmfPkg/SmmAccess/SmramInternal.c @@ -14,14 +14,15 @@ **/ #include #include #include #include +#include #include "SmramInternal.h" /** Read the MCH_SMRAM and ESMRAMC registers, and update the LockState and OpenState fields in the PEI_SMM_ACCESS_PPI / EFI_SMM_ACCESS2_PROTOCOL object, from the D_LCK and T_EN bits. @@ -128,15 +129,15 @@ SmramAccessGetCapabilities ( IN OUT UINTN *SmramMapSize, IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap ) { UINTN OriginalSize; UINT32 TsegMemoryBaseMb, TsegMemoryBase; UINT64 CommonRegionState; - UINT8 TsegSizeBits; + UINT8 EsmramcVal; OriginalSize = *SmramMapSize; *SmramMapSize = DescIdxCount * sizeof *SmramMap; if (OriginalSize < *SmramMapSize) { return EFI_BUFFER_TOO_SMALL; } @@ -162,27 +163,25 @@ SmramAccessGetCapabilities ( SmramMap[DescIdxSmmS3ResumeState].CpuStart = TsegMemoryBase; SmramMap[DescIdxSmmS3ResumeState].PhysicalSize = EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (sizeof (SMM_S3_RESUME_STATE))); SmramMap[DescIdxSmmS3ResumeState].RegionState = CommonRegionState | EFI_ALLOCATED; // - // Get the TSEG size bits from the ESMRAMC register. + // Read the ESMRAMC register so we can extract the TSEG size bits. // - TsegSizeBits = PciRead8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC)) & - MCH_ESMRAMC_TSEG_MASK; + EsmramcVal = PciRead8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC)); // // The second region is the main one, following the first. // SmramMap[DescIdxMain].PhysicalStart = SmramMap[DescIdxSmmS3ResumeState].PhysicalStart + SmramMap[DescIdxSmmS3ResumeState].PhysicalSize; SmramMap[DescIdxMain].CpuStart = SmramMap[DescIdxMain].PhysicalStart; SmramMap[DescIdxMain].PhysicalSize = - (TsegSizeBits == MCH_ESMRAMC_TSEG_8MB ? SIZE_8MB : - TsegSizeBits == MCH_ESMRAMC_TSEG_2MB ? SIZE_2MB : - SIZE_1MB) - SmramMap[DescIdxSmmS3ResumeState].PhysicalSize; + (Q35TsegSizeConvertEsmramcValToMbytes (EsmramcVal) * SIZE_1MB) - + SmramMap[DescIdxSmmS3ResumeState].PhysicalSize; SmramMap[DescIdxMain].RegionState = CommonRegionState; return EFI_SUCCESS; } -- 2.9.3