From: Leif Lindholm <leif.lindholm@linaro.org>
To: Jun Nie <jun.nie@linaro.org>
Cc: ard.biesheuvel@linaro.org, olivier.martin@arm.com,
haojian.zhuang@linaro.org, edk2-devel@lists.01.org,
shawn.guo@linaro.org, jason.liu@linaro.org
Subject: Re: [PATCH v2] EmbeddedPkg/MmcDxe: Add non-DDR timing mode support
Date: Mon, 12 Jun 2017 16:29:12 +0100 [thread overview]
Message-ID: <20170612152912.GJ26676@bivouac.eciton.net> (raw)
In-Reply-To: <1497233885-11082-1-git-send-email-jun.nie@linaro.org>
(olivier.martin@arm.com has not been a valid email target for almost 2
years now, so no need to keep on cc.)
On Mon, Jun 12, 2017 at 10:18:05AM +0800, Jun Nie wrote:
> Only DDR mode is support for 8bit mode currently. Add
> non-DDR case when configuring ECSD.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Jun Nie <jun.nie@linaro.org>
This looks good to me:
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> ---
> EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c | 16 ++++++++++++++--
> 1 file changed, 14 insertions(+), 2 deletions(-)
>
> diff --git a/EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c b/EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c
> index 574a77e..4ce0ddd 100644
> --- a/EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c
> +++ b/EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c
> @@ -254,7 +254,7 @@ InitializeEmmcDevice (
> EFI_MMC_HOST_PROTOCOL *Host;
> EFI_STATUS Status = EFI_SUCCESS;
> ECSD *ECSDData;
> - UINT32 BusClockFreq, Idx;
> + UINT32 BusClockFreq, Idx, BusMode;
> UINT32 TimingMode[4] = {EMMCHS52DDR1V2, EMMCHS52DDR1V8, EMMCHS52, EMMCHS26};
>
> Host = MmcHostInstance->MmcHost;
> @@ -286,7 +286,19 @@ InitializeEmmcDevice (
> }
> Status = Host->SetIos (Host, BusClockFreq, 8, TimingMode[Idx]);
> if (!EFI_ERROR (Status)) {
> - Status = EmmcSetEXTCSD (MmcHostInstance, EXTCSD_BUS_WIDTH, EMMC_BUS_WIDTH_DDR_8BIT);
> + switch (TimingMode[Idx]) {
> + case EMMCHS52DDR1V2:
> + case EMMCHS52DDR1V8:
> + BusMode = EMMC_BUS_WIDTH_DDR_8BIT;
> + break;
> + case EMMCHS52:
> + case EMMCHS26:
> + BusMode = EMMC_BUS_WIDTH_8BIT;
> + break;
> + default:
> + return EFI_UNSUPPORTED;
> + }
> + Status = EmmcSetEXTCSD (MmcHostInstance, EXTCSD_BUS_WIDTH, BusMode);
> if (EFI_ERROR (Status)) {
> DEBUG ((DEBUG_ERROR, "InitializeEmmcDevice(): Failed to set EXTCSD bus width, Status:%r\n", Status));
> }
> --
> 1.9.1
>
prev parent reply other threads:[~2017-06-12 15:28 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-12 2:18 [PATCH v2] EmbeddedPkg/MmcDxe: Add non-DDR timing mode support Jun Nie
2017-06-12 15:29 ` Leif Lindholm [this message]
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