From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-x230.google.com (mail-wm0-x230.google.com [IPv6:2a00:1450:400c:c09::230]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 1165F21CF3B71 for ; Mon, 3 Jul 2017 05:34:55 -0700 (PDT) Received: by mail-wm0-x230.google.com with SMTP id f67so53451358wmh.1 for ; Mon, 03 Jul 2017 05:36:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=JJrLFFPpxCdWsmfv96XEGyAYexiqMAfT9rNlcm3m4jc=; b=RtEhtvfzFj/360i2e6l2S4sqYhetUUcnGK8l2xN32NYk3tHr4Opb56yXItLncBZUBi 1fO3kL5gBoqDfFsenJCKxO+twSLVEkt3Lcq5lTfRVyawSzWOfyhJbQnjpjhYanJKfcRh SI2H0/bemVvnDX1y8rG0WJ0IrmtX++nZ8eGdE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=JJrLFFPpxCdWsmfv96XEGyAYexiqMAfT9rNlcm3m4jc=; b=rjNXZXMAf63PR9nIt2q9AqOBObpMuegHaRvLdKvm6SHkeiDmX2tMKGN6tWovcvRj+b vscyDhECkHisaljontWWcrqUcRIBJMHKZ6d/1cwxw63fnSR37t9gSWv7r+uc4ilZkHiC QwiekGzaGMUSbgRUC2J4XLlTAUlv5MWxS3MTdfrBkRZ5TPdzL0I+/+tihXs+aW94KloX 4RN2l1gZfcUoVNp5xFv43EBZ+GaqXylmcA8dW0mCnvBlYPDTt2sXhra2KlCqg2dt3DaU 1VseyuLFeXAjgKY7OVNAaHnemxYFB5g5D6itBCYNFXBYH8iK++VGVCvOh7LyQEAr8nc4 5Z9A== X-Gm-Message-State: AIVw112rtlG9SXxcT7hs+4lLd6OAzzuKvJATf5aV134JiqoOpx9y5VHO shhjN3Huey3nFkau X-Received: by 10.28.24.81 with SMTP id 78mr9278364wmy.112.1499085390531; Mon, 03 Jul 2017 05:36:30 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id z99sm17027881wrc.12.2017.07.03.05.36.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 03 Jul 2017 05:36:30 -0700 (PDT) Date: Mon, 3 Jul 2017 13:36:28 +0100 From: Leif Lindholm To: Jun Nie Cc: ard.biesheuvel@linaro.org, haojian.zhuang@linaro.org, edk2-devel@lists.01.org, shawn.guo@linaro.org, jason.liu@linaro.org Message-ID: <20170703123627.GE26676@bivouac.eciton.net> References: <1499054517-22398-1-git-send-email-jun.nie@linaro.org> MIME-Version: 1.0 In-Reply-To: <1499054517-22398-1-git-send-email-jun.nie@linaro.org> User-Agent: Mutt/1.5.23 (2014-03-12) Subject: Re: [PATCH] EmbeddedPkg/DwEmmcDxe: limit max clock for platform X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 03 Jul 2017 12:34:55 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Mon, Jul 03, 2017 at 12:01:56PM +0800, Jun Nie wrote: > Some boards may have max clock limitation. Add a Pcd to notify > driver. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Jun Nie > --- > EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c | 4 ++++ > EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf | 1 + > EmbeddedPkg/EmbeddedPkg.dec | 1 + > 3 files changed, 6 insertions(+) > > diff --git a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c > index fe23d11..308f3a7 100644 > --- a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c > +++ b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c > @@ -560,6 +560,10 @@ DwEmmcSetIos ( > EFI_STATUS Status = EFI_SUCCESS; > UINT32 Data; > > + if (BusClockFreq > PcdGet32 (PcdDwEmmcDxeMaxClockFrequencyInHz)) { This snippet means that any platform that was using this driver successfully, but where BusClockFreq is higher than the default value of this Pcd will stop working. > + return EFI_UNSUPPORTED; > + } > + > if (TimingMode != EMMCBACKWARD) { > Data = MmioRead32 (DWEMMC_UHSREG); > switch (TimingMode) { > diff --git a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf > index e3c8313..3582997 100644 > --- a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf > +++ b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf > @@ -48,6 +48,7 @@ > [Pcd] > gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeBaseAddress > gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz > + gDwEmmcDxeTokenSpaceGuid.PcdDwEmmcDxeMaxClockFrequencyInHz > > [Depex] > TRUE > diff --git a/EmbeddedPkg/EmbeddedPkg.dec b/EmbeddedPkg/EmbeddedPkg.dec > index 0d4a062..aec8259 100644 > --- a/EmbeddedPkg/EmbeddedPkg.dec > +++ b/EmbeddedPkg/EmbeddedPkg.dec > @@ -167,6 +167,7 @@ > # DwEmmc Driver PCDs > gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeBaseAddress|0x0|UINT32|0x00000035 > gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz|0x0|UINT32|0x00000036 > + gDwEmmcDxeTokenSpaceGuid.PcdDwEmmcDxeMaxClockFrequencyInHz|0x0|UINT32|400000000 And this definition sets the default value of this Pcd to 0. Meaning that all existing drivers would stop working. Also, 0x00000037 would seem like a more suitable Token than 400000000. If introducing a new limit value like this, I would strongly recommend making "0" a magic value meaning "no restrictions". i.e. UINT32 MaxFreq; MaxFreq = PcdGet32 (PcdDwEmmcDxeMaxClockFrequencyInHz); if ((MaxFreq != 0) && (BusClockFreq > MaxFreq)) { / Leif > > # > # Android FastBoot > -- > 1.9.1 >