* [PATCH v2 1/4] MdeModulePkg/XhciDxe: Refine IsTransferRingTrb and IsAsyncIntTrb
2017-07-04 5:20 [PATCH v2 0/4] MdeModulePkg/XhciDxe: Check timeout URB again after stopping endpoint Ruiyu Ni
@ 2017-07-04 5:20 ` Ruiyu Ni
2017-07-04 5:20 ` [PATCH v2 2/4] MdeModulePkg/XhciDxe: Dump the CMD/EVENT/INT/BULK ring information Ruiyu Ni
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Ruiyu Ni @ 2017-07-04 5:20 UTC (permalink / raw)
To: edk2-devel; +Cc: Hao A Wu, Star Zeng, Feng Tian
Current implementation of IsTransferRingTrb only checks whether
the TRB is in the RING of the URB.
The patch enhanced the logic to check that whether the TRB belongs
to the transaction of URB.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
---
MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c | 90 ++++++++++++++++----------------
1 file changed, 44 insertions(+), 46 deletions(-)
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
index 457344051b..a72a104b80 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
@@ -977,45 +977,42 @@ XhcFreeSched (
}
/**
- Check if the Trb is a transaction of the URBs in XHCI's asynchronous transfer list.
+ Check if the Trb is a transaction of the URB.
- @param Xhc The XHCI Instance.
- @param Trb The TRB to be checked.
- @param Urb The pointer to the matched Urb.
+ @param Trb The TRB to be checked
+ @param Urb The URB to be checked.
- @retval TRUE The Trb is matched with a transaction of the URBs in the async list.
- @retval FALSE The Trb is not matched with any URBs in the async list.
+ @retval TRUE It is a transaction of the URB.
+ @retval FALSE It is not any transaction of the URB.
**/
BOOLEAN
-IsAsyncIntTrb (
+IsTransferRingTrb (
IN USB_XHCI_INSTANCE *Xhc,
IN TRB_TEMPLATE *Trb,
- OUT URB **Urb
+ IN URB *Urb
)
{
- LIST_ENTRY *Entry;
- LIST_ENTRY *Next;
- TRB_TEMPLATE *CheckedTrb;
- URB *CheckedUrb;
- UINTN Index;
+ LINK_TRB *LinkTrb;
+ TRB_TEMPLATE *CheckedTrb;
+ UINTN Index;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
- EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {
- CheckedUrb = EFI_LIST_CONTAINER (Entry, URB, UrbList);
- CheckedTrb = CheckedUrb->TrbStart;
- for (Index = 0; Index < CheckedUrb->TrbNum; Index++) {
- if (Trb == CheckedTrb) {
- *Urb = CheckedUrb;
- return TRUE;
- }
- CheckedTrb++;
- //
- // If the checked TRB is the link TRB at the end of the transfer ring,
- // recircle it to the head of the ring.
- //
- if (CheckedTrb->Type == TRB_TYPE_LINK) {
- CheckedTrb = (TRB_TEMPLATE*) CheckedUrb->Ring->RingSeg0;
- }
+ CheckedTrb = Urb->TrbStart;
+ for (Index = 0; Index < Urb->TrbNum; Index++) {
+ if (Trb == CheckedTrb) {
+ return TRUE;
+ }
+ CheckedTrb++;
+ //
+ // If the checked TRB is the link TRB at the end of the transfer ring,
+ // recircle it to the head of the ring.
+ //
+ if (CheckedTrb->Type == TRB_TYPE_LINK) {
+ LinkTrb = (LINK_TRB *) CheckedTrb;
+ PhyAddr = (EFI_PHYSICAL_ADDRESS)(LinkTrb->PtrLo | LShiftU64 ((UINT64) LinkTrb->PtrHi, 32));
+ CheckedTrb = (TRB_TEMPLATE *)(UINTN) UsbHcGetHostAddrForPciAddr (Xhc->MemPool, (VOID *)(UINTN) PhyAddr, sizeof (TRB_TEMPLATE));
+ ASSERT (CheckedTrb == Urb->Ring->RingSeg0);
}
}
@@ -1023,38 +1020,39 @@ IsAsyncIntTrb (
}
/**
- Check if the Trb is a transaction of the URB.
+ Check if the Trb is a transaction of the URBs in XHCI's asynchronous transfer list.
- @param Trb The TRB to be checked
- @param Urb The transfer ring to be checked.
+ @param Xhc The XHCI Instance.
+ @param Trb The TRB to be checked.
+ @param Urb The pointer to the matched Urb.
- @retval TRUE It is a transaction of the URB.
- @retval FALSE It is not any transaction of the URB.
+ @retval TRUE The Trb is matched with a transaction of the URBs in the async list.
+ @retval FALSE The Trb is not matched with any URBs in the async list.
**/
BOOLEAN
-IsTransferRingTrb (
+IsAsyncIntTrb (
+ IN USB_XHCI_INSTANCE *Xhc,
IN TRB_TEMPLATE *Trb,
- IN URB *Urb
+ OUT URB **Urb
)
{
- TRB_TEMPLATE *CheckedTrb;
- UINTN Index;
-
- CheckedTrb = Urb->Ring->RingSeg0;
-
- ASSERT (Urb->Ring->TrbNumber == CMD_RING_TRB_NUMBER || Urb->Ring->TrbNumber == TR_RING_TRB_NUMBER);
+ LIST_ENTRY *Entry;
+ LIST_ENTRY *Next;
+ URB *CheckedUrb;
- for (Index = 0; Index < Urb->Ring->TrbNumber; Index++) {
- if (Trb == CheckedTrb) {
+ EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {
+ CheckedUrb = EFI_LIST_CONTAINER (Entry, URB, UrbList);
+ if (IsTransferRingTrb (Xhc, Trb, CheckedUrb)) {
+ *Urb = CheckedUrb;
return TRUE;
}
- CheckedTrb++;
}
return FALSE;
}
+
/**
Check the URB's execution result and update the URB's
result accordingly.
@@ -1131,7 +1129,7 @@ XhcCheckUrbResult (
// This way is used to avoid that those completed async transfer events don't get
// handled in time and are flushed by newer coming events.
//
- if (IsTransferRingTrb (TRBPtr, Urb)) {
+ if (IsTransferRingTrb (Xhc, TRBPtr, Urb)) {
CheckedUrb = Urb;
} else if (IsAsyncIntTrb (Xhc, TRBPtr, &AsyncUrb)) {
CheckedUrb = AsyncUrb;
--
2.12.2.windows.2
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH v2 2/4] MdeModulePkg/XhciDxe: Dump the CMD/EVENT/INT/BULK ring information
2017-07-04 5:20 [PATCH v2 0/4] MdeModulePkg/XhciDxe: Check timeout URB again after stopping endpoint Ruiyu Ni
2017-07-04 5:20 ` [PATCH v2 1/4] MdeModulePkg/XhciDxe: Refine IsTransferRingTrb and IsAsyncIntTrb Ruiyu Ni
@ 2017-07-04 5:20 ` Ruiyu Ni
2017-07-04 5:20 ` [PATCH v2 3/4] MdeModulePkg/XhciDxe: Separate common logic to XhcTransfer Ruiyu Ni
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Ruiyu Ni @ 2017-07-04 5:20 UTC (permalink / raw)
To: edk2-devel; +Cc: Hao A Wu, Star Zeng, Feng Tian
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
---
MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c | 27 ++++++++++++++++++++++++---
1 file changed, 24 insertions(+), 3 deletions(-)
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
index a72a104b80..f7f3409686 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
@@ -604,8 +604,6 @@ XhcInitSched (
XhcWriteOpReg (Xhc, XHC_CRCR_OFFSET, XHC_LOW_32BIT(CmdRingPhy));
XhcWriteOpReg (Xhc, XHC_CRCR_OFFSET + 4, XHC_HIGH_32BIT (CmdRingPhy));
- DEBUG ((EFI_D_INFO, "XhcInitSched:XHC_CRCR=0x%x\n", Xhc->CmdRing.RingSeg0));
-
//
// Disable the 'interrupter enable' bit in USB_CMD
// and clear IE & IP bit in all Interrupter X Management Registers.
@@ -620,7 +618,10 @@ XhcInitSched (
// Allocate EventRing for Cmd, Ctrl, Bulk, Interrupt, AsynInterrupt transfer
//
CreateEventRing (Xhc, &Xhc->EventRing);
- DEBUG ((EFI_D_INFO, "XhcInitSched:XHC_EVENTRING=0x%x\n", Xhc->EventRing.EventRingSeg0));
+ DEBUG ((DEBUG_INFO, "XhcInitSched: Created CMD ring [%p~%p) EVENT ring [%p~%p)\n",
+ Xhc->CmdRing.RingSeg0, (UINTN)Xhc->CmdRing.RingSeg0 + sizeof (TRB_TEMPLATE) * CMD_RING_TRB_NUMBER,
+ Xhc->EventRing.EventRingSeg0, (UINTN)Xhc->EventRing.EventRingSeg0 + sizeof (TRB_TEMPLATE) * EVENT_RING_TRB_NUMBER
+ ));
}
/**
@@ -2668,6 +2669,11 @@ XhcInitializeEndpointContext (
EndpointTransferRing = AllocateZeroPool(sizeof (TRANSFER_RING));
Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *) EndpointTransferRing;
CreateTransferRing(Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);
+ DEBUG ((DEBUG_INFO, "Endpoint[%x]: Created BULK ring [%p~%p)\n",
+ EpDesc->EndpointAddress,
+ EndpointTransferRing->RingSeg0,
+ (UINTN) EndpointTransferRing->RingSeg0 + TR_RING_TRB_NUMBER * sizeof (TRB_TEMPLATE)
+ ));
}
break;
@@ -2736,6 +2742,11 @@ XhcInitializeEndpointContext (
EndpointTransferRing = AllocateZeroPool(sizeof (TRANSFER_RING));
Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *) EndpointTransferRing;
CreateTransferRing(Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);
+ DEBUG ((DEBUG_INFO, "Endpoint[%x]: Created INT ring [%p~%p)\n",
+ EpDesc->EndpointAddress,
+ EndpointTransferRing->RingSeg0,
+ (UINTN) EndpointTransferRing->RingSeg0 + TR_RING_TRB_NUMBER * sizeof (TRB_TEMPLATE)
+ ));
}
break;
@@ -2850,6 +2861,11 @@ XhcInitializeEndpointContext64 (
EndpointTransferRing = AllocateZeroPool(sizeof (TRANSFER_RING));
Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *) EndpointTransferRing;
CreateTransferRing(Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);
+ DEBUG ((DEBUG_INFO, "Endpoint64[%x]: Created BULK ring [%p~%p)\n",
+ EpDesc->EndpointAddress,
+ EndpointTransferRing->RingSeg0,
+ (UINTN) EndpointTransferRing->RingSeg0 + TR_RING_TRB_NUMBER * sizeof (TRB_TEMPLATE)
+ ));
}
break;
@@ -2918,6 +2934,11 @@ XhcInitializeEndpointContext64 (
EndpointTransferRing = AllocateZeroPool(sizeof (TRANSFER_RING));
Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1] = (VOID *) EndpointTransferRing;
CreateTransferRing(Xhc, TR_RING_TRB_NUMBER, (TRANSFER_RING *)Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1]);
+ DEBUG ((DEBUG_INFO, "Endpoint64[%x]: Created INT ring [%p~%p)\n",
+ EpDesc->EndpointAddress,
+ EndpointTransferRing->RingSeg0,
+ (UINTN) EndpointTransferRing->RingSeg0 + TR_RING_TRB_NUMBER * sizeof (TRB_TEMPLATE)
+ ));
}
break;
--
2.12.2.windows.2
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH v2 3/4] MdeModulePkg/XhciDxe: Separate common logic to XhcTransfer
2017-07-04 5:20 [PATCH v2 0/4] MdeModulePkg/XhciDxe: Check timeout URB again after stopping endpoint Ruiyu Ni
2017-07-04 5:20 ` [PATCH v2 1/4] MdeModulePkg/XhciDxe: Refine IsTransferRingTrb and IsAsyncIntTrb Ruiyu Ni
2017-07-04 5:20 ` [PATCH v2 2/4] MdeModulePkg/XhciDxe: Dump the CMD/EVENT/INT/BULK ring information Ruiyu Ni
@ 2017-07-04 5:20 ` Ruiyu Ni
2017-07-04 5:20 ` [PATCH v2 4/4] MdeModulePkg/XhciDxe: Check timeout URB again after stopping endpoint Ruiyu Ni
2017-07-05 3:05 ` [PATCH v2 0/4] " Wu, Hao A
4 siblings, 0 replies; 6+ messages in thread
From: Ruiyu Ni @ 2017-07-04 5:20 UTC (permalink / raw)
To: edk2-devel; +Cc: Hao A Wu, Star Zeng, Feng Tian
The patch separates the common logic in XhcControlTransfer,
XhcBulkTransfer and XhcSyncIntTransfer to a sub-routine
XhcTransfer. It doesn't have functionality impact.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
---
MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c | 298 ++++++++++++++++--------------------
1 file changed, 132 insertions(+), 166 deletions(-)
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
index 2f6137ef57..e3cbdbc800 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
@@ -1,7 +1,7 @@
/** @file
The XHCI controller driver.
-Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -716,6 +716,97 @@ ON_EXIT:
return Status;
}
+/**
+ Submits a new transaction to a target USB device.
+
+ @param Xhc The XHCI Instance.
+ @param DeviceAddress The target device address.
+ @param EndPointAddress Endpoint number and its direction encoded in bit 7
+ @param DeviceSpeed Target device speed.
+ @param MaximumPacketLength Maximum packet size the default control transfer
+ endpoint is capable of sending or receiving.
+ @param Type The transaction type.
+ @param Request USB device request to send.
+ @param Data Data buffer to be transmitted or received from USB
+ device.
+ @param DataLength The size (in bytes) of the data buffer.
+ @param Timeout Indicates the maximum timeout, in millisecond.
+ @param TransferResult Return the result of this control transfer.
+
+ @retval EFI_SUCCESS Transfer was completed successfully.
+ @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resources.
+ @retval EFI_INVALID_PARAMETER Some parameters are invalid.
+ @retval EFI_TIMEOUT Transfer failed due to timeout.
+ @retval EFI_DEVICE_ERROR Transfer failed due to host controller or device error.
+**/
+EFI_STATUS
+XhcTransfer (
+ IN USB_XHCI_INSTANCE *Xhc,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN UINT8 DeviceSpeed,
+ IN UINTN MaximumPacketLength,
+ IN UINTN Type,
+ IN EFI_USB_DEVICE_REQUEST *Request,
+ IN OUT VOID *Data,
+ IN OUT UINTN *DataLength,
+ IN UINTN Timeout,
+ OUT UINT32 *TransferResult
+ )
+{
+ EFI_STATUS Status;
+ EFI_STATUS RecoveryStatus;
+ URB *Urb;
+
+ ASSERT ((Type == XHC_CTRL_TRANSFER) || (Type == XHC_BULK_TRANSFER) || (Type == XHC_INT_TRANSFER_SYNC));
+ Urb = XhcCreateUrb (
+ Xhc,
+ DeviceAddress,
+ EndPointAddress,
+ DeviceSpeed,
+ MaximumPacketLength,
+ Type,
+ Request,
+ Data,
+ *DataLength,
+ NULL,
+ NULL
+ );
+
+ if (Urb == NULL) {
+ DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: failed to create URB!\n", Type));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ Status = XhcExecTransfer (Xhc, FALSE, Urb, Timeout);
+
+ *TransferResult = Urb->Result;
+ *DataLength = Urb->Completed;
+
+ if (Status == EFI_TIMEOUT) {
+ //
+ // The transfer timed out. Abort the transfer by dequeueing of the TD.
+ //
+ RecoveryStatus = XhcDequeueTrbFromEndpoint (Xhc, Urb);
+ if (EFI_ERROR (RecoveryStatus)) {
+ DEBUG((DEBUG_ERROR, "XhcTransfer[Type=%d]: XhcDequeueTrbFromEndpoint failed\n", Type));
+ }
+ } else {
+ if (*TransferResult == EFI_USB_NOERROR) {
+ Status = EFI_SUCCESS;
+ } else if (*TransferResult == EFI_USB_ERR_STALL) {
+ RecoveryStatus = XhcRecoverHaltedEndpoint (Xhc, Urb);
+ if (EFI_ERROR (RecoveryStatus)) {
+ DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: XhcRecoverHaltedEndpoint failed\n", Type));
+ }
+ Status = EFI_DEVICE_ERROR;
+ }
+ }
+
+ Xhc->PciIo->Flush (Xhc->PciIo);
+ XhcFreeUrb (Xhc, Urb);
+ return Status;
+}
/**
Submits control transfer to a target USB device.
@@ -758,7 +849,6 @@ XhcControlTransfer (
)
{
USB_XHCI_INSTANCE *Xhc;
- URB *Urb;
UINT8 Endpoint;
UINT8 Index;
UINT8 DescriptorType;
@@ -769,7 +859,6 @@ XhcControlTransfer (
EFI_USB_HUB_DESCRIPTOR *HubDesc;
EFI_TPL OldTpl;
EFI_STATUS Status;
- EFI_STATUS RecoveryStatus;
UINTN MapSize;
EFI_USB_PORT_STATUS PortStatus;
UINT32 State;
@@ -876,70 +965,24 @@ XhcControlTransfer (
// combination of Ep addr and its direction.
//
Endpoint = (UINT8) (0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));
- Urb = XhcCreateUrb (
- Xhc,
- DeviceAddress,
- Endpoint,
- DeviceSpeed,
- MaximumPacketLength,
- XHC_CTRL_TRANSFER,
- Request,
- Data,
- *DataLength,
- NULL,
- NULL
- );
+ Status = XhcTransfer (
+ Xhc,
+ DeviceAddress,
+ Endpoint,
+ DeviceSpeed,
+ MaximumPacketLength,
+ XHC_CTRL_TRANSFER,
+ Request,
+ Data,
+ DataLength,
+ Timeout,
+ TransferResult
+ );
- if (Urb == NULL) {
- DEBUG ((EFI_D_ERROR, "XhcControlTransfer: failed to create URB"));
- Status = EFI_OUT_OF_RESOURCES;
+ if (EFI_ERROR (Status)) {
goto ON_EXIT;
}
- Status = XhcExecTransfer (Xhc, FALSE, Urb, Timeout);
-
- //
- // Get the status from URB. The result is updated in XhcCheckUrbResult
- // which is called by XhcExecTransfer
- //
- *TransferResult = Urb->Result;
- *DataLength = Urb->Completed;
-
- if (Status == EFI_TIMEOUT) {
- //
- // The transfer timed out. Abort the transfer by dequeueing of the TD.
- //
- RecoveryStatus = XhcDequeueTrbFromEndpoint(Xhc, Urb);
- if (EFI_ERROR(RecoveryStatus)) {
- DEBUG((EFI_D_ERROR, "XhcControlTransfer: XhcDequeueTrbFromEndpoint failed\n"));
- }
- goto FREE_URB;
- } else {
- if (*TransferResult == EFI_USB_NOERROR) {
- Status = EFI_SUCCESS;
- } else if (*TransferResult == EFI_USB_ERR_STALL) {
- RecoveryStatus = XhcRecoverHaltedEndpoint(Xhc, Urb);
- if (EFI_ERROR (RecoveryStatus)) {
- DEBUG ((EFI_D_ERROR, "XhcControlTransfer: XhcRecoverHaltedEndpoint failed\n"));
- }
- Status = EFI_DEVICE_ERROR;
- goto FREE_URB;
- } else {
- goto FREE_URB;
- }
- }
-
- Xhc->PciIo->Flush (Xhc->PciIo);
-
- if (Urb->DataMap != NULL) {
- Status = Xhc->PciIo->Unmap (Xhc->PciIo, Urb->DataMap);
- ASSERT_EFI_ERROR (Status);
- if (EFI_ERROR (Status)) {
- Status = EFI_DEVICE_ERROR;
- goto FREE_URB;
- }
- }
-
//
// Hook Get_Descriptor request from UsbBus as we need evaluate context and configure endpoint.
// Hook Get_Status request form UsbBus as we need trace device attach/detach event happened at hub.
@@ -1115,11 +1158,7 @@ XhcControlTransfer (
*(UINT32 *)Data = *(UINT32*)&PortStatus;
}
-FREE_URB:
- FreePool (Urb);
-
ON_EXIT:
-
if (EFI_ERROR (Status)) {
DEBUG ((EFI_D_ERROR, "XhcControlTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
}
@@ -1178,10 +1217,8 @@ XhcBulkTransfer (
)
{
USB_XHCI_INSTANCE *Xhc;
- URB *Urb;
UINT8 SlotId;
EFI_STATUS Status;
- EFI_STATUS RecoveryStatus;
EFI_TPL OldTpl;
//
@@ -1227,56 +1264,21 @@ XhcBulkTransfer (
// Create a new URB, insert it into the asynchronous
// schedule list, then poll the execution status.
//
- Urb = XhcCreateUrb (
- Xhc,
- DeviceAddress,
- EndPointAddress,
- DeviceSpeed,
- MaximumPacketLength,
- XHC_BULK_TRANSFER,
- NULL,
- Data[0],
- *DataLength,
- NULL,
- NULL
- );
-
- if (Urb == NULL) {
- DEBUG ((EFI_D_ERROR, "XhcBulkTransfer: failed to create URB\n"));
- Status = EFI_OUT_OF_RESOURCES;
- goto ON_EXIT;
- }
-
- Status = XhcExecTransfer (Xhc, FALSE, Urb, Timeout);
-
- *TransferResult = Urb->Result;
- *DataLength = Urb->Completed;
-
- if (Status == EFI_TIMEOUT) {
- //
- // The transfer timed out. Abort the transfer by dequeueing of the TD.
- //
- RecoveryStatus = XhcDequeueTrbFromEndpoint(Xhc, Urb);
- if (EFI_ERROR(RecoveryStatus)) {
- DEBUG((EFI_D_ERROR, "XhcBulkTransfer: XhcDequeueTrbFromEndpoint failed\n"));
- }
- } else {
- if (*TransferResult == EFI_USB_NOERROR) {
- Status = EFI_SUCCESS;
- } else if (*TransferResult == EFI_USB_ERR_STALL) {
- RecoveryStatus = XhcRecoverHaltedEndpoint(Xhc, Urb);
- if (EFI_ERROR (RecoveryStatus)) {
- DEBUG ((EFI_D_ERROR, "XhcBulkTransfer: XhcRecoverHaltedEndpoint failed\n"));
- }
- Status = EFI_DEVICE_ERROR;
- }
- }
-
- Xhc->PciIo->Flush (Xhc->PciIo);
- XhcFreeUrb (Xhc, Urb);
+ Status = XhcTransfer (
+ Xhc,
+ DeviceAddress,
+ EndPointAddress,
+ DeviceSpeed,
+ MaximumPacketLength,
+ XHC_BULK_TRANSFER,
+ NULL,
+ Data[0],
+ DataLength,
+ Timeout,
+ TransferResult
+ );
ON_EXIT:
-
if (EFI_ERROR (Status)) {
DEBUG ((EFI_D_ERROR, "XhcBulkTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
}
@@ -1490,10 +1492,8 @@ XhcSyncInterruptTransfer (
)
{
USB_XHCI_INSTANCE *Xhc;
- URB *Urb;
UINT8 SlotId;
EFI_STATUS Status;
- EFI_STATUS RecoveryStatus;
EFI_TPL OldTpl;
//
@@ -1534,53 +1534,19 @@ XhcSyncInterruptTransfer (
goto ON_EXIT;
}
- Urb = XhcCreateUrb (
- Xhc,
- DeviceAddress,
- EndPointAddress,
- DeviceSpeed,
- MaximumPacketLength,
- XHC_INT_TRANSFER_SYNC,
- NULL,
- Data,
- *DataLength,
- NULL,
- NULL
- );
-
- if (Urb == NULL) {
- DEBUG ((EFI_D_ERROR, "XhcSyncInterruptTransfer: failed to create URB\n"));
- Status = EFI_OUT_OF_RESOURCES;
- goto ON_EXIT;
- }
-
- Status = XhcExecTransfer (Xhc, FALSE, Urb, Timeout);
-
- *TransferResult = Urb->Result;
- *DataLength = Urb->Completed;
-
- if (Status == EFI_TIMEOUT) {
- //
- // The transfer timed out. Abort the transfer by dequeueing of the TD.
- //
- RecoveryStatus = XhcDequeueTrbFromEndpoint(Xhc, Urb);
- if (EFI_ERROR(RecoveryStatus)) {
- DEBUG((EFI_D_ERROR, "XhcSyncInterruptTransfer: XhcDequeueTrbFromEndpoint failed\n"));
- }
- } else {
- if (*TransferResult == EFI_USB_NOERROR) {
- Status = EFI_SUCCESS;
- } else if (*TransferResult == EFI_USB_ERR_STALL) {
- RecoveryStatus = XhcRecoverHaltedEndpoint(Xhc, Urb);
- if (EFI_ERROR (RecoveryStatus)) {
- DEBUG ((EFI_D_ERROR, "XhcSyncInterruptTransfer: XhcRecoverHaltedEndpoint failed\n"));
- }
- Status = EFI_DEVICE_ERROR;
- }
- }
-
- Xhc->PciIo->Flush (Xhc->PciIo);
- XhcFreeUrb (Xhc, Urb);
+ Status = XhcTransfer (
+ Xhc,
+ DeviceAddress,
+ EndPointAddress,
+ DeviceSpeed,
+ MaximumPacketLength,
+ XHC_INT_TRANSFER_SYNC,
+ NULL,
+ Data,
+ DataLength,
+ Timeout,
+ TransferResult
+ );
ON_EXIT:
if (EFI_ERROR (Status)) {
--
2.12.2.windows.2
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH v2 4/4] MdeModulePkg/XhciDxe: Check timeout URB again after stopping endpoint
2017-07-04 5:20 [PATCH v2 0/4] MdeModulePkg/XhciDxe: Check timeout URB again after stopping endpoint Ruiyu Ni
` (2 preceding siblings ...)
2017-07-04 5:20 ` [PATCH v2 3/4] MdeModulePkg/XhciDxe: Separate common logic to XhcTransfer Ruiyu Ni
@ 2017-07-04 5:20 ` Ruiyu Ni
2017-07-05 3:05 ` [PATCH v2 0/4] " Wu, Hao A
4 siblings, 0 replies; 6+ messages in thread
From: Ruiyu Ni @ 2017-07-04 5:20 UTC (permalink / raw)
To: edk2-devel; +Cc: Hao A Wu, Star Zeng, Feng Tian
This fixes BULK data loss when transfer is detected as timeout but
finished just before stopping endpoint.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
---
MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c | 36 +++++++++-------
MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h | 3 +-
MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c | 72 +++++++++++++++++++++++++++-----
MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h | 8 +++-
4 files changed, 90 insertions(+), 29 deletions(-)
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
index e3cbdbc800..20ad3f1611 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
@@ -780,26 +780,32 @@ XhcTransfer (
Status = XhcExecTransfer (Xhc, FALSE, Urb, Timeout);
- *TransferResult = Urb->Result;
- *DataLength = Urb->Completed;
-
if (Status == EFI_TIMEOUT) {
//
// The transfer timed out. Abort the transfer by dequeueing of the TD.
//
- RecoveryStatus = XhcDequeueTrbFromEndpoint (Xhc, Urb);
- if (EFI_ERROR (RecoveryStatus)) {
- DEBUG((DEBUG_ERROR, "XhcTransfer[Type=%d]: XhcDequeueTrbFromEndpoint failed\n", Type));
- }
- } else {
- if (*TransferResult == EFI_USB_NOERROR) {
+ RecoveryStatus = XhcDequeueTrbFromEndpoint(Xhc, Urb);
+ if (RecoveryStatus == EFI_ALREADY_STARTED) {
+ //
+ // The URB is finished just before stopping endpoint.
+ // Change returning status from EFI_TIMEOUT to EFI_SUCCESS.
+ //
+ ASSERT (Urb->Result == EFI_USB_NOERROR);
Status = EFI_SUCCESS;
- } else if (*TransferResult == EFI_USB_ERR_STALL) {
- RecoveryStatus = XhcRecoverHaltedEndpoint (Xhc, Urb);
- if (EFI_ERROR (RecoveryStatus)) {
- DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: XhcRecoverHaltedEndpoint failed\n", Type));
- }
- Status = EFI_DEVICE_ERROR;
+ DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: pending URB is finished, Length = %d.\n", Type, Urb->Completed));
+ } else if (EFI_ERROR(RecoveryStatus)) {
+ DEBUG((DEBUG_ERROR, "XhcTransfer[Type=%d]: XhcDequeueTrbFromEndpoint failed!\n", Type));
+ }
+ }
+
+ *TransferResult = Urb->Result;
+ *DataLength = Urb->Completed;
+
+ if (*TransferResult == EFI_USB_ERR_STALL) {
+ ASSERT (Status == EFI_DEVICE_ERROR);
+ RecoveryStatus = XhcRecoverHaltedEndpoint(Xhc, Urb);
+ if (EFI_ERROR (RecoveryStatus)) {
+ DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: XhcRecoverHaltedEndpoint failed!\n", Type));
}
}
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
index 28e240245b..76daaff4a4 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
@@ -2,7 +2,7 @@
Provides some data structure definitions used by the XHCI host controller driver.
-Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -243,6 +243,7 @@ struct _USB_XHCI_INSTANCE {
UINT64 *DCBAA;
VOID *DCBAAMap;
UINT32 MaxSlotsEn;
+ URB *PendingUrb;
//
// Cmd Transfer Ring
//
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
index f7f3409686..f8174d8d03 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
@@ -696,6 +696,7 @@ Done:
@param Urb The urb which doesn't get completed in a specified timeout range.
@retval EFI_SUCCESS The dequeuing of the TDs is successful.
+ @retval EFI_ALREADY_STARTED The Urb is finished so no deque is needed.
@retval Others Failed to stop the endpoint and dequeue the TDs.
**/
@@ -723,7 +724,7 @@ XhcDequeueTrbFromEndpoint (
//
// 1) Send Stop endpoint command to stop xHC from executing of the TDs on the endpoint
//
- Status = XhcStopEndpoint(Xhc, SlotId, Dci);
+ Status = XhcStopEndpoint(Xhc, SlotId, Dci, Urb);
if (EFI_ERROR(Status)) {
DEBUG ((EFI_D_ERROR, "XhcDequeueTrbFromEndpoint: Stop Endpoint Failed, Status = %r\n", Status));
goto Done;
@@ -732,10 +733,20 @@ XhcDequeueTrbFromEndpoint (
//
// 2)Set dequeue pointer
//
- Status = XhcSetTrDequeuePointer(Xhc, SlotId, Dci, Urb);
- if (EFI_ERROR(Status)) {
- DEBUG ((EFI_D_ERROR, "XhcDequeueTrbFromEndpoint: Set Transfer Ring Dequeue Pointer Failed, Status = %r\n", Status));
- goto Done;
+ if (Urb->Finished && Urb->Result == EFI_USB_NOERROR) {
+ //
+ // Return Already Started to indicate the pending URB is finished.
+ // This fixes BULK data loss when transfer is detected as timeout
+ // but finished just before stopping endpoint.
+ //
+ Status = EFI_ALREADY_STARTED;
+ DEBUG ((DEBUG_INFO, "XhcDequeueTrbFromEndpoint: Pending URB is finished: Length Actual/Expect = %d/%d!\n", Urb->Completed, Urb->DataLen));
+ } else {
+ Status = XhcSetTrDequeuePointer(Xhc, SlotId, Dci, Urb);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "XhcDequeueTrbFromEndpoint: Set Transfer Ring Dequeue Pointer Failed, Status = %r\n", Status));
+ goto Done;
+ }
}
//
@@ -1125,12 +1136,14 @@ XhcCheckUrbResult (
TRBPtr = (TRB_TEMPLATE *)(UINTN) UsbHcGetHostAddrForPciAddr (Xhc->MemPool, (VOID *)(UINTN) PhyAddr, sizeof (TRB_TEMPLATE));
//
- // Update the status of Urb according to the finished event regardless of whether
- // the urb is current checked one or in the XHCI's async transfer list.
+ // Update the status of URB including the pending URB, the URB that is currently checked,
+ // and URBs in the XHCI's async interrupt transfer list.
// This way is used to avoid that those completed async transfer events don't get
// handled in time and are flushed by newer coming events.
//
- if (IsTransferRingTrb (Xhc, TRBPtr, Urb)) {
+ if (Xhc->PendingUrb != NULL && IsTransferRingTrb (Xhc, TRBPtr, Xhc->PendingUrb)) {
+ CheckedUrb = Xhc->PendingUrb;
+ } else if (IsTransferRingTrb (Xhc, TRBPtr, Urb)) {
CheckedUrb = Urb;
} else if (IsAsyncIntTrb (Xhc, TRBPtr, &AsyncUrb)) {
CheckedUrb = AsyncUrb;
@@ -1163,6 +1176,16 @@ XhcCheckUrbResult (
DEBUG ((EFI_D_ERROR, "XhcCheckUrbResult: TRANSACTION_ERROR! Completecode = %x\n",EvtTrb->Completecode));
goto EXIT;
+ case TRB_COMPLETION_STOPPED:
+ case TRB_COMPLETION_STOPPED_LENGTH_INVALID:
+ CheckedUrb->Result |= EFI_USB_ERR_TIMEOUT;
+ CheckedUrb->Finished = TRUE;
+ //
+ // The pending URB is timeout and force stopped when stopping endpoint.
+ // Continue the loop to receive the Command Complete Event for stopping endpoint.
+ //
+ continue;
+
case TRB_COMPLETION_SHORT_PACKET:
case TRB_COMPLETION_SUCCESS:
if (EvtTrb->Completecode == TRB_COMPLETION_SHORT_PACKET) {
@@ -3155,6 +3178,7 @@ XhcSetConfigCmd64 (
@param Xhc The XHCI Instance.
@param SlotId The slot id to be configured.
@param Dci The device context index of endpoint.
+ @param PendingUrb The pending URB to check completion status when stopping the end point.
@retval EFI_SUCCESS Stop endpoint successfully.
@retval Others Failed to stop endpoint.
@@ -3165,7 +3189,8 @@ EFIAPI
XhcStopEndpoint (
IN USB_XHCI_INSTANCE *Xhc,
IN UINT8 SlotId,
- IN UINT8 Dci
+ IN UINT8 Dci,
+ IN URB *PendingUrb OPTIONAL
)
{
EFI_STATUS Status;
@@ -3175,6 +3200,29 @@ XhcStopEndpoint (
DEBUG ((EFI_D_INFO, "XhcStopEndpoint: Slot = 0x%x, Dci = 0x%x\n", SlotId, Dci));
//
+ // When XhcCheckUrbResult waits for the Stop_Endpoint completion, it also checks
+ // the PendingUrb completion status, because it's possible that the PendingUrb is
+ // finished just before stopping the end point, but after the looping check.
+ //
+ // The PendingUrb could be passed to XhcCmdTransfer to XhcExecTransfer to XhcCheckUrbResult
+ // through function parameter, but That will cause every consumer of XhcCmdTransfer,
+ // XhcExecTransfer and XhcCheckUrbResult pass a NULL PendingUrb.
+ // But actually only XhcCheckUrbResult is aware of the PendingUrb.
+ // So we choose to save the PendingUrb into the USB_XHCI_INSTANCE and use it in XhcCheckUrbResult.
+ //
+ ASSERT (Xhc->PendingUrb == NULL);
+ Xhc->PendingUrb = PendingUrb;
+ //
+ // Reset the URB result from Timeout to NoError.
+ // The USB result will be:
+ // changed to Timeout when Stop/StopInvalidLength Transfer Event is received, or
+ // remain NoError when Success/ShortPacket Transfer Event is received.
+ //
+ if (PendingUrb != NULL) {
+ PendingUrb->Result = EFI_USB_NOERROR;
+ }
+
+ //
// Send stop endpoint command to transit Endpoint from running to stop state
//
ZeroMem (&CmdTrbStopED, sizeof (CmdTrbStopED));
@@ -3192,6 +3240,8 @@ XhcStopEndpoint (
DEBUG ((EFI_D_ERROR, "XhcStopEndpoint: Stop Endpoint Failed, Status = %r\n", Status));
}
+ Xhc->PendingUrb = NULL;
+
return Status;
}
@@ -3418,7 +3468,7 @@ XhcSetInterface (
// XHCI 4.3.6 - Setting Alternate Interfaces
// 1) Stop any Running Transfer Rings affected by the Alternate Interface setting.
//
- Status = XhcStopEndpoint (Xhc, SlotId, Dci);
+ Status = XhcStopEndpoint (Xhc, SlotId, Dci, NULL);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -3620,7 +3670,7 @@ XhcSetInterface64 (
// XHCI 4.3.6 - Setting Alternate Interfaces
// 1) Stop any Running Transfer Rings affected by the Alternate Interface setting.
//
- Status = XhcStopEndpoint (Xhc, SlotId, Dci);
+ Status = XhcStopEndpoint (Xhc, SlotId, Dci, NULL);
if (EFI_ERROR (Status)) {
return Status;
}
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h
index 931c7efa0c..f40f94c1e4 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h
@@ -2,7 +2,7 @@
This file contains the definition for XHCI host controller schedule routines.
-Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -80,6 +80,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#define TRB_COMPLETION_TRB_ERROR 5
#define TRB_COMPLETION_STALL_ERROR 6
#define TRB_COMPLETION_SHORT_PACKET 13
+#define TRB_COMPLETION_STOPPED 26
+#define TRB_COMPLETION_STOPPED_LENGTH_INVALID 27
//
// The topology string used to present usb device location
@@ -1343,6 +1345,7 @@ XhcDequeueTrbFromEndpoint (
@param Xhc The XHCI Instance.
@param SlotId The slot id to be configured.
@param Dci The device context index of endpoint.
+ @param PendingUrb The pending URB to check completion status when stopping the end point.
@retval EFI_SUCCESS Stop endpoint successfully.
@retval Others Failed to stop endpoint.
@@ -1353,7 +1356,8 @@ EFIAPI
XhcStopEndpoint (
IN USB_XHCI_INSTANCE *Xhc,
IN UINT8 SlotId,
- IN UINT8 Dci
+ IN UINT8 Dci,
+ IN URB *PendingUrb OPTIONAL
);
/**
--
2.12.2.windows.2
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH v2 0/4] MdeModulePkg/XhciDxe: Check timeout URB again after stopping endpoint
2017-07-04 5:20 [PATCH v2 0/4] MdeModulePkg/XhciDxe: Check timeout URB again after stopping endpoint Ruiyu Ni
` (3 preceding siblings ...)
2017-07-04 5:20 ` [PATCH v2 4/4] MdeModulePkg/XhciDxe: Check timeout URB again after stopping endpoint Ruiyu Ni
@ 2017-07-05 3:05 ` Wu, Hao A
4 siblings, 0 replies; 6+ messages in thread
From: Wu, Hao A @ 2017-07-05 3:05 UTC (permalink / raw)
To: Ni, Ruiyu, edk2-devel@lists.01.org
The patch series is good to me.
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
Best Regards,
Hao Wu
> -----Original Message-----
> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Ruiyu
> Ni
> Sent: Tuesday, July 04, 2017 1:20 PM
> To: edk2-devel@lists.01.org
> Subject: [edk2] [PATCH v2 0/4] MdeModulePkg/XhciDxe: Check timeout URB
> again after stopping endpoint
>
>
> This fixes BULK data loss when transfer is detected as timeout but
> finished just before stopping endpoint.
>
> Ruiyu Ni (4):
> MdeModulePkg/XhciDxe: Refine IsTransferRingTrb and IsAsyncIntTrb
> MdeModulePkg/XhciDxe: Dump the CMD/EVENT/INT/BULK ring information
> MdeModulePkg/XhciDxe: Separate common logic to XhcTransfer
> MdeModulePkg/XhciDxe: Check timeout URB again after stopping endpoint
>
> MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c | 304 ++++++++++++++----------------
> -
> MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h | 3 +-
> MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c | 187 +++++++++++++------
> MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h | 8 +-
> 4 files changed, 274 insertions(+), 228 deletions(-)
>
> --
> 2.12.2.windows.2
>
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 6+ messages in thread