From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 330C921CF3B86 for ; Tue, 4 Jul 2017 09:54:58 -0700 (PDT) Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 2BD9D80462; Tue, 4 Jul 2017 16:56:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 2BD9D80462 Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=lersek@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 2BD9D80462 Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-126.phx2.redhat.com [10.3.116.126]) by smtp.corp.redhat.com (Postfix) with ESMTP id 62B5D5D968; Tue, 4 Jul 2017 16:56:35 +0000 (UTC) From: Laszlo Ersek To: edk2-devel-01 Cc: Jordan Justen Date: Tue, 4 Jul 2017 18:56:23 +0200 Message-Id: <20170704165629.13610-3-lersek@redhat.com> In-Reply-To: <20170704165629.13610-1-lersek@redhat.com> References: <20170704165629.13610-1-lersek@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Tue, 04 Jul 2017 16:56:36 +0000 (UTC) Subject: [PATCH v2 2/8] OvmfPkg/PlatformPei: prepare for PcdQ35TsegMbytes becoming dynamic X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Jul 2017 16:54:58 -0000 In one of the next patches we'll turn PcdQ35TsegMbytes into a dynamic PCD, to be set by PlatformPei. Introduce the Q35TsegMbytesInitialization() function and the "mQ35TsegMbytes" global variable to support this. Q35TsegMbytesInitialization() manages the PCD and caches its final value into "mQ35TsegMbytes". Call Q35TsegMbytesInitialization() from InitializePlatform() just in time for the current PCD consumers, PublishPeiMemory(), InitializeRamRegions() and QemuInitializeRam() -- which is called from InitializeRamRegions() -- to be rebased on top of "mQ35TsegMbytes". Call Q35TsegMbytesInitialization() only when PcdSmmSmramRequire is TRUE, given that PcdQ35TsegMbytes is consumed in that case only. Cc: Jordan Justen Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek --- OvmfPkg/PlatformPei/Platform.h | 5 +++++ OvmfPkg/PlatformPei/MemDetect.c | 17 ++++++++++++++--- OvmfPkg/PlatformPei/Platform.c | 4 ++++ 3 files changed, 23 insertions(+), 3 deletions(-) diff --git a/OvmfPkg/PlatformPei/Platform.h b/OvmfPkg/PlatformPei/Platform.h index 18f42c3f0ea8..d2d627b221c4 100644 --- a/OvmfPkg/PlatformPei/Platform.h +++ b/OvmfPkg/PlatformPei/Platform.h @@ -49,14 +49,19 @@ AddReservedMemoryBaseSizeHob ( ); VOID AddressWidthInitialization ( VOID ); +VOID +Q35TsegMbytesInitialization ( + VOID + ); + EFI_STATUS PublishPeiMemory ( VOID ); UINT32 GetSystemMemorySizeBelow4gb ( diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c index 78a8e0de346c..886d23622665 100644 --- a/OvmfPkg/PlatformPei/MemDetect.c +++ b/OvmfPkg/PlatformPei/MemDetect.c @@ -38,14 +38,25 @@ Module Name: #include "Cmos.h" UINT8 mPhysMemAddressWidth; STATIC UINT32 mS3AcpiReservedMemoryBase; STATIC UINT32 mS3AcpiReservedMemorySize; +STATIC UINT16 mQ35TsegMbytes; + +VOID +Q35TsegMbytesInitialization ( + VOID + ) +{ + mQ35TsegMbytes = PcdGet16 (PcdQ35TsegMbytes); +} + + UINT32 GetSystemMemorySizeBelow4gb ( VOID ) { UINT8 Cmos0x34; UINT8 Cmos0x35; @@ -344,15 +355,15 @@ PublishPeiMemory ( UINT32 PeiMemoryCap; LowerMemorySize = GetSystemMemorySizeBelow4gb (); if (FeaturePcdGet (PcdSmmSmramRequire)) { // // TSEG is chipped from the end of low RAM // - LowerMemorySize -= FixedPcdGet16 (PcdQ35TsegMbytes) * SIZE_1MB; + LowerMemorySize -= mQ35TsegMbytes * SIZE_1MB; } // // If S3 is supported, then the S3 permanent PEI memory is placed next, // downwards. Its size is primarily dictated by CpuMpPei. The formula below // is an approximation. // @@ -452,15 +463,15 @@ QemuInitializeRam ( // Create memory HOBs // AddMemoryRangeHob (0, BASE_512KB + BASE_128KB); if (FeaturePcdGet (PcdSmmSmramRequire)) { UINT32 TsegSize; - TsegSize = FixedPcdGet16 (PcdQ35TsegMbytes) * SIZE_1MB; + TsegSize = mQ35TsegMbytes * SIZE_1MB; AddMemoryRangeHob (BASE_1MB, LowerMemorySize - TsegSize); AddReservedMemoryBaseSizeHob (LowerMemorySize - TsegSize, TsegSize, TRUE); } else { AddMemoryRangeHob (BASE_1MB, LowerMemorySize); } @@ -601,15 +612,15 @@ InitializeRamRegions ( if (FeaturePcdGet (PcdSmmSmramRequire)) { UINT32 TsegSize; // // Make sure the TSEG area that we reported as a reserved memory resource // cannot be used for reserved memory allocations. // - TsegSize = FixedPcdGet16 (PcdQ35TsegMbytes) * SIZE_1MB; + TsegSize = mQ35TsegMbytes * SIZE_1MB; BuildMemoryAllocationHob ( GetSystemMemorySizeBelow4gb() - TsegSize, TsegSize, EfiReservedMemoryType ); } } diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c index 3e9fda7c7ab0..b8a28450d6c5 100644 --- a/OvmfPkg/PlatformPei/Platform.c +++ b/OvmfPkg/PlatformPei/Platform.c @@ -641,14 +641,18 @@ InitializePlatform ( } S3Verification (); BootModeInitialization (); AddressWidthInitialization (); MaxCpuCountInitialization (); + if (FeaturePcdGet (PcdSmmSmramRequire)) { + Q35TsegMbytesInitialization (); + } + PublishPeiMemory (); InitializeRamRegions (); if (mXen) { DEBUG ((EFI_D_INFO, "Xen was detected\n")); InitializeXen (); -- 2.13.1.3.g8be5a757fa67