[PATCH v2 0/8] OvmfPkg: recognize an extended TSEG when QEMU offers it

[PATCH v2 0/8] OvmfPkg: recognize an extended TSEG when QEMU offers it

[Laszlo Ersek]

This is version 2 of the series posted previously at
<https://lists.01.org/pipermail/edk2-devel/2017-June/011452.html>.

Version 2 is a rewrite from scratch based on Jordan's feedback for v1
and the subsequent discussion.

Repo:   https://github.com/lersek/edk2.git
Branch: extended_tseg_bz1447027_v2

Cc: Jordan Justen <jordan.l.justen@intel.com>

Thanks
Laszlo

Laszlo Ersek (8):
  OvmfPkg: widen PcdQ35TsegMbytes to UINT16
  OvmfPkg/PlatformPei: prepare for PcdQ35TsegMbytes becoming dynamic
  OvmfPkg/SmmAccess: prepare for PcdQ35TsegMbytes becoming dynamic
  OvmfPkg: make PcdQ35TsegMbytes dynamic
  OvmfPkg/IndustryStandard/Q35MchIch9.h: add extended TSEG size macros
  OvmfPkg/SmmAccess: support extended TSEG size
  OvmfPkg/PlatformPei: honor extended TSEG in PcdQ35TsegMbytes if
    available
  OvmfPkg: mention the extended TSEG near the PcdQ35TsegMbytes
    declaration

 OvmfPkg/Include/IndustryStandard/Q35MchIch9.h |  4 ++
 OvmfPkg/OvmfPkg.dec                           | 15 +++--
 OvmfPkg/OvmfPkgIa32.dsc                       |  1 +
 OvmfPkg/OvmfPkgIa32X64.dsc                    |  1 +
 OvmfPkg/OvmfPkgX64.dsc                        |  1 +
 OvmfPkg/PlatformPei/MemDetect.c               | 67 +++++++++++++++++++-
 OvmfPkg/PlatformPei/Platform.c                | 14 ++--
 OvmfPkg/PlatformPei/Platform.h                |  7 ++
 OvmfPkg/SmmAccess/SmmAccess2Dxe.c             |  1 +
 OvmfPkg/SmmAccess/SmmAccess2Dxe.inf           |  3 +
 OvmfPkg/SmmAccess/SmmAccessPei.c              | 10 +--
 OvmfPkg/SmmAccess/SmmAccessPei.inf            |  4 +-
 OvmfPkg/SmmAccess/SmramInternal.c             | 25 +++++++-
 OvmfPkg/SmmAccess/SmramInternal.h             | 13 ++++
 14 files changed, 142 insertions(+), 24 deletions(-)

-- 
2.13.1.3.g8be5a757fa67

[PATCH v2 1/8] OvmfPkg: widen PcdQ35TsegMbytes to UINT16

[Laszlo Ersek]

Widen PcdQ35TsegMbytes to UINT16, in preparation for setting it
dynamically to the QEMU-advertized extended TSEG size (which is 16-bits
wide).

Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
---
 OvmfPkg/OvmfPkg.dec              | 2 +-
 OvmfPkg/PlatformPei/MemDetect.c  | 6 +++---
 OvmfPkg/SmmAccess/SmmAccessPei.c | 6 +++---
 3 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index 5627be0bab0a..021ac2a77211 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -91,15 +91,15 @@ [PcdsFixedAtBuild]
   gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxLunLimit|7|UINT32|7
 
   ## The following setting controls how many megabytes we configure as TSEG on
   #  Q35, for SMRAM purposes. Permitted values are: 1, 2, 8. Other values cause
   #  undefined behavior.
   #
   #  This PCD is only consulted if PcdSmmSmramRequire is TRUE (see below).
-  gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT8|0x20
+  gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT16|0x20
 
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0xa
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize|0|UINT32|0xb
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase|0x0|UINT32|0xc
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwSpareBase|0x0|UINT32|0xd
diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
index af96a04d194a..78a8e0de346c 100644
--- a/OvmfPkg/PlatformPei/MemDetect.c
+++ b/OvmfPkg/PlatformPei/MemDetect.c
@@ -344,15 +344,15 @@ PublishPeiMemory (
   UINT32                      PeiMemoryCap;
 
   LowerMemorySize = GetSystemMemorySizeBelow4gb ();
   if (FeaturePcdGet (PcdSmmSmramRequire)) {
     //
     // TSEG is chipped from the end of low RAM
     //
-    LowerMemorySize -= FixedPcdGet8 (PcdQ35TsegMbytes) * SIZE_1MB;
+    LowerMemorySize -= FixedPcdGet16 (PcdQ35TsegMbytes) * SIZE_1MB;
   }
 
   //
   // If S3 is supported, then the S3 permanent PEI memory is placed next,
   // downwards. Its size is primarily dictated by CpuMpPei. The formula below
   // is an approximation.
   //
@@ -452,15 +452,15 @@ QemuInitializeRam (
     // Create memory HOBs
     //
     AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);
 
     if (FeaturePcdGet (PcdSmmSmramRequire)) {
       UINT32 TsegSize;
 
-      TsegSize = FixedPcdGet8 (PcdQ35TsegMbytes) * SIZE_1MB;
+      TsegSize = FixedPcdGet16 (PcdQ35TsegMbytes) * SIZE_1MB;
       AddMemoryRangeHob (BASE_1MB, LowerMemorySize - TsegSize);
       AddReservedMemoryBaseSizeHob (LowerMemorySize - TsegSize, TsegSize,
         TRUE);
     } else {
       AddMemoryRangeHob (BASE_1MB, LowerMemorySize);
     }
 
@@ -601,15 +601,15 @@ InitializeRamRegions (
     if (FeaturePcdGet (PcdSmmSmramRequire)) {
       UINT32 TsegSize;
 
       //
       // Make sure the TSEG area that we reported as a reserved memory resource
       // cannot be used for reserved memory allocations.
       //
-      TsegSize = FixedPcdGet8 (PcdQ35TsegMbytes) * SIZE_1MB;
+      TsegSize = FixedPcdGet16 (PcdQ35TsegMbytes) * SIZE_1MB;
       BuildMemoryAllocationHob (
         GetSystemMemorySizeBelow4gb() - TsegSize,
         TsegSize,
         EfiReservedMemoryType
         );
     }
   }
diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.c b/OvmfPkg/SmmAccess/SmmAccessPei.c
index a4ce610a4650..76790e330f65 100644
--- a/OvmfPkg/SmmAccess/SmmAccessPei.c
+++ b/OvmfPkg/SmmAccess/SmmAccessPei.c
@@ -315,24 +315,24 @@ SmmAccessPeiEntryPoint (
   PciWrite32 (DRAMC_REGISTER_Q35 (MCH_BGSM),
     TopOfLowRamMb << MCH_BGSM_MB_SHIFT);
 
   //
   // Set TSEG Memory Base.
   //
   PciWrite32 (DRAMC_REGISTER_Q35 (MCH_TSEGMB),
-    (TopOfLowRamMb - FixedPcdGet8 (PcdQ35TsegMbytes)) << MCH_TSEGMB_MB_SHIFT);
+    (TopOfLowRamMb - FixedPcdGet16 (PcdQ35TsegMbytes)) << MCH_TSEGMB_MB_SHIFT);
 
   //
   // Set TSEG size, and disable TSEG visibility outside of SMM. Note that the
   // T_EN bit has inverse meaning; when T_EN is set, then TSEG visibility is
   // *restricted* to SMM.
   //
   EsmramcVal &= ~(UINT32)MCH_ESMRAMC_TSEG_MASK;
-  EsmramcVal |= FixedPcdGet8 (PcdQ35TsegMbytes) == 8 ? MCH_ESMRAMC_TSEG_8MB :
-                FixedPcdGet8 (PcdQ35TsegMbytes) == 2 ? MCH_ESMRAMC_TSEG_2MB :
+  EsmramcVal |= FixedPcdGet16 (PcdQ35TsegMbytes) == 8 ? MCH_ESMRAMC_TSEG_8MB :
+                FixedPcdGet16 (PcdQ35TsegMbytes) == 2 ? MCH_ESMRAMC_TSEG_2MB :
                 MCH_ESMRAMC_TSEG_1MB;
   EsmramcVal |= MCH_ESMRAMC_T_EN;
   PciWrite8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC), EsmramcVal);
 
   //
   // TSEG should be closed (see above), but unlocked, initially. Set G_SMRAME
   // (Global SMRAM Enable) too, as both D_LCK and T_EN depend on it.
-- 
2.13.1.3.g8be5a757fa67

[PATCH v2 2/8] OvmfPkg/PlatformPei: prepare for PcdQ35TsegMbytes becoming dynamic

[Laszlo Ersek]

In one of the next patches we'll turn PcdQ35TsegMbytes into a dynamic PCD,
to be set by PlatformPei. Introduce the Q35TsegMbytesInitialization()
function and the "mQ35TsegMbytes" global variable to support this.

Q35TsegMbytesInitialization() manages the PCD and caches its final value
into "mQ35TsegMbytes". Call Q35TsegMbytesInitialization() from
InitializePlatform() just in time for the current PCD consumers,
PublishPeiMemory(), InitializeRamRegions() and QemuInitializeRam() --
which is called from InitializeRamRegions() -- to be rebased on top of
"mQ35TsegMbytes".

Call Q35TsegMbytesInitialization() only when PcdSmmSmramRequire is TRUE,
given that PcdQ35TsegMbytes is consumed in that case only.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
---
 OvmfPkg/PlatformPei/Platform.h  |  5 +++++
 OvmfPkg/PlatformPei/MemDetect.c | 17 ++++++++++++++---
 OvmfPkg/PlatformPei/Platform.c  |  4 ++++
 3 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/OvmfPkg/PlatformPei/Platform.h b/OvmfPkg/PlatformPei/Platform.h
index 18f42c3f0ea8..d2d627b221c4 100644
--- a/OvmfPkg/PlatformPei/Platform.h
+++ b/OvmfPkg/PlatformPei/Platform.h
@@ -49,14 +49,19 @@ AddReservedMemoryBaseSizeHob (
   );
 
 VOID
 AddressWidthInitialization (
   VOID
   );
 
+VOID
+Q35TsegMbytesInitialization (
+  VOID
+  );
+
 EFI_STATUS
 PublishPeiMemory (
   VOID
   );
 
 UINT32
 GetSystemMemorySizeBelow4gb (
diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
index 78a8e0de346c..886d23622665 100644
--- a/OvmfPkg/PlatformPei/MemDetect.c
+++ b/OvmfPkg/PlatformPei/MemDetect.c
@@ -38,14 +38,25 @@ Module Name:
 #include "Cmos.h"
 
 UINT8 mPhysMemAddressWidth;
 
 STATIC UINT32 mS3AcpiReservedMemoryBase;
 STATIC UINT32 mS3AcpiReservedMemorySize;
 
+STATIC UINT16 mQ35TsegMbytes;
+
+VOID
+Q35TsegMbytesInitialization (
+  VOID
+  )
+{
+  mQ35TsegMbytes = PcdGet16 (PcdQ35TsegMbytes);
+}
+
+
 UINT32
 GetSystemMemorySizeBelow4gb (
   VOID
   )
 {
   UINT8 Cmos0x34;
   UINT8 Cmos0x35;
@@ -344,15 +355,15 @@ PublishPeiMemory (
   UINT32                      PeiMemoryCap;
 
   LowerMemorySize = GetSystemMemorySizeBelow4gb ();
   if (FeaturePcdGet (PcdSmmSmramRequire)) {
     //
     // TSEG is chipped from the end of low RAM
     //
-    LowerMemorySize -= FixedPcdGet16 (PcdQ35TsegMbytes) * SIZE_1MB;
+    LowerMemorySize -= mQ35TsegMbytes * SIZE_1MB;
   }
 
   //
   // If S3 is supported, then the S3 permanent PEI memory is placed next,
   // downwards. Its size is primarily dictated by CpuMpPei. The formula below
   // is an approximation.
   //
@@ -452,15 +463,15 @@ QemuInitializeRam (
     // Create memory HOBs
     //
     AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);
 
     if (FeaturePcdGet (PcdSmmSmramRequire)) {
       UINT32 TsegSize;
 
-      TsegSize = FixedPcdGet16 (PcdQ35TsegMbytes) * SIZE_1MB;
+      TsegSize = mQ35TsegMbytes * SIZE_1MB;
       AddMemoryRangeHob (BASE_1MB, LowerMemorySize - TsegSize);
       AddReservedMemoryBaseSizeHob (LowerMemorySize - TsegSize, TsegSize,
         TRUE);
     } else {
       AddMemoryRangeHob (BASE_1MB, LowerMemorySize);
     }
 
@@ -601,15 +612,15 @@ InitializeRamRegions (
     if (FeaturePcdGet (PcdSmmSmramRequire)) {
       UINT32 TsegSize;
 
       //
       // Make sure the TSEG area that we reported as a reserved memory resource
       // cannot be used for reserved memory allocations.
       //
-      TsegSize = FixedPcdGet16 (PcdQ35TsegMbytes) * SIZE_1MB;
+      TsegSize = mQ35TsegMbytes * SIZE_1MB;
       BuildMemoryAllocationHob (
         GetSystemMemorySizeBelow4gb() - TsegSize,
         TsegSize,
         EfiReservedMemoryType
         );
     }
   }
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index 3e9fda7c7ab0..b8a28450d6c5 100644
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -641,14 +641,18 @@ InitializePlatform (
   }
 
   S3Verification ();
   BootModeInitialization ();
   AddressWidthInitialization ();
   MaxCpuCountInitialization ();
 
+  if (FeaturePcdGet (PcdSmmSmramRequire)) {
+    Q35TsegMbytesInitialization ();
+  }
+
   PublishPeiMemory ();
 
   InitializeRamRegions ();
 
   if (mXen) {
     DEBUG ((EFI_D_INFO, "Xen was detected\n"));
     InitializeXen ();
-- 
2.13.1.3.g8be5a757fa67

[PATCH v2 3/8] OvmfPkg/SmmAccess: prepare for PcdQ35TsegMbytes becoming dynamic

[Laszlo Ersek]

In one of the next patches we'll turn PcdQ35TsegMbytes into a dynamic PCD,
to be set by PlatformPei.

Jordan suggested to use gEfiPeiMemoryDiscoveredPpiGuid as SmmAccessPei's
DEPEX for making sure that PlatformPei sets the PCD before SmmAccessPei
consumes it. (PlatformPei installs the permanent PEI RAM.) Such a DEPEX is
supposed to mirror physical firmware, where anything related to SMRAM
cannot run before said platform's physical RAM is discovered (signaled by
the presence of gEfiPeiMemoryDiscoveredPpiGuid).

Introduce the FetchQ35TsegMbytes() function and the "mQ35TsegMbytes"
extern variable to "SmramInternal.h" and "SmramInternal.c":

- Both SmmAccess modules (PEIM and DXE driver) are supposed to call
  FetchQ35TsegMbytes() in their respective entry point functions, saving
  PcdQ35TsegMbytes into "mQ35TsegMbytes". This way dynamic PCD fetches can
  be kept out of PEI_SMM_ACCESS_PPI and EFI_SMM_ACCESS2_PROTOCOL member
  functions later (when we add support for extended TSEG size).

- We can thus replace the current PcdQ35TsegMbytes fetches in
  SmmAccessPei's entry point function as well, with reads from
  "mQ35TsegMbytes".

Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
---
 OvmfPkg/SmmAccess/SmmAccess2Dxe.inf |  3 +++
 OvmfPkg/SmmAccess/SmmAccessPei.inf  |  4 ++--
 OvmfPkg/SmmAccess/SmramInternal.h   | 13 +++++++++++++
 OvmfPkg/SmmAccess/SmmAccess2Dxe.c   |  1 +
 OvmfPkg/SmmAccess/SmmAccessPei.c    |  7 ++++---
 OvmfPkg/SmmAccess/SmramInternal.c   | 17 +++++++++++++++++
 6 files changed, 40 insertions(+), 5 deletions(-)

diff --git a/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf b/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf
index 31e4dfa02991..1bc88fa050c7 100644
--- a/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf
+++ b/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf
@@ -50,9 +50,12 @@ [LibraryClasses]
 
 [Protocols]
   gEfiSmmAccess2ProtocolGuid   ## PRODUCES
 
 [FeaturePcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
 
+[Pcd]
+  gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes
+
 [Depex]
   TRUE
diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.inf b/OvmfPkg/SmmAccess/SmmAccessPei.inf
index 3908b085da3a..09f3b63446df 100644
--- a/OvmfPkg/SmmAccess/SmmAccessPei.inf
+++ b/OvmfPkg/SmmAccess/SmmAccessPei.inf
@@ -55,15 +55,15 @@ [LibraryClasses]
   PciLib
   PeiServicesLib
   PeimEntryPoint
 
 [FeaturePcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
 
-[FixedPcd]
+[Pcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes
 
 [Ppis]
   gPeiSmmAccessPpiGuid           ## PRODUCES
 
 [Depex]
-  TRUE
+  gEfiPeiMemoryDiscoveredPpiGuid
diff --git a/OvmfPkg/SmmAccess/SmramInternal.h b/OvmfPkg/SmmAccess/SmramInternal.h
index 4e9ac05fad1c..c9c9a7a59d4b 100644
--- a/OvmfPkg/SmmAccess/SmramInternal.h
+++ b/OvmfPkg/SmmAccess/SmramInternal.h
@@ -27,14 +27,27 @@
 //
 typedef enum {
   DescIdxSmmS3ResumeState = 0,
   DescIdxMain             = 1,
   DescIdxCount            = 2
 } DESCRIPTOR_INDEX;
 
+//
+// The value of PcdQ35TsegMbytes is saved into this variable at module startup.
+//
+extern UINT16 mQ35TsegMbytes;
+
+/**
+  Save PcdQ35TsegMbytes into mQ35TsegMbytes.
+**/
+VOID
+FetchQ35TsegMbytes (
+  VOID
+  );
+
 /**
   Read the MCH_SMRAM and ESMRAMC registers, and update the LockState and
   OpenState fields in the PEI_SMM_ACCESS_PPI / EFI_SMM_ACCESS2_PROTOCOL object,
   from the D_LCK and T_EN bits.
 
   PEI_SMM_ACCESS_PPI and EFI_SMM_ACCESS2_PROTOCOL member functions can rely on
   the LockState and OpenState fields being up-to-date on entry, and they need
diff --git a/OvmfPkg/SmmAccess/SmmAccess2Dxe.c b/OvmfPkg/SmmAccess/SmmAccess2Dxe.c
index d5130399b030..eaaf96e7e94b 100644
--- a/OvmfPkg/SmmAccess/SmmAccess2Dxe.c
+++ b/OvmfPkg/SmmAccess/SmmAccess2Dxe.c
@@ -145,12 +145,13 @@ SmmAccess2DxeEntryPoint (
   )
 {
   //
   // This module should only be included if SMRAM support is required.
   //
   ASSERT (FeaturePcdGet (PcdSmmSmramRequire));
 
+  FetchQ35TsegMbytes ();
   GetStates (&mAccess2.LockState, &mAccess2.OpenState);
   return gBS->InstallMultipleProtocolInterfaces (&ImageHandle,
                 &gEfiSmmAccess2ProtocolGuid, &mAccess2,
                 NULL);
 }
diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.c b/OvmfPkg/SmmAccess/SmmAccessPei.c
index 76790e330f65..aba3aeb9f4bd 100644
--- a/OvmfPkg/SmmAccess/SmmAccessPei.c
+++ b/OvmfPkg/SmmAccess/SmmAccessPei.c
@@ -314,25 +314,26 @@ SmmAccessPeiEntryPoint (
     TopOfLowRamMb << MCH_GBSM_MB_SHIFT);
   PciWrite32 (DRAMC_REGISTER_Q35 (MCH_BGSM),
     TopOfLowRamMb << MCH_BGSM_MB_SHIFT);
 
   //
   // Set TSEG Memory Base.
   //
+  FetchQ35TsegMbytes ();
   PciWrite32 (DRAMC_REGISTER_Q35 (MCH_TSEGMB),
-    (TopOfLowRamMb - FixedPcdGet16 (PcdQ35TsegMbytes)) << MCH_TSEGMB_MB_SHIFT);
+    (TopOfLowRamMb - mQ35TsegMbytes) << MCH_TSEGMB_MB_SHIFT);
 
   //
   // Set TSEG size, and disable TSEG visibility outside of SMM. Note that the
   // T_EN bit has inverse meaning; when T_EN is set, then TSEG visibility is
   // *restricted* to SMM.
   //
   EsmramcVal &= ~(UINT32)MCH_ESMRAMC_TSEG_MASK;
-  EsmramcVal |= FixedPcdGet16 (PcdQ35TsegMbytes) == 8 ? MCH_ESMRAMC_TSEG_8MB :
-                FixedPcdGet16 (PcdQ35TsegMbytes) == 2 ? MCH_ESMRAMC_TSEG_2MB :
+  EsmramcVal |= mQ35TsegMbytes == 8 ? MCH_ESMRAMC_TSEG_8MB :
+                mQ35TsegMbytes == 2 ? MCH_ESMRAMC_TSEG_2MB :
                 MCH_ESMRAMC_TSEG_1MB;
   EsmramcVal |= MCH_ESMRAMC_T_EN;
   PciWrite8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC), EsmramcVal);
 
   //
   // TSEG should be closed (see above), but unlocked, initially. Set G_SMRAME
   // (Global SMRAM Enable) too, as both D_LCK and T_EN depend on it.
diff --git a/OvmfPkg/SmmAccess/SmramInternal.c b/OvmfPkg/SmmAccess/SmramInternal.c
index c3267ca94031..ae1e9069aca6 100644
--- a/OvmfPkg/SmmAccess/SmramInternal.c
+++ b/OvmfPkg/SmmAccess/SmramInternal.c
@@ -13,18 +13,35 @@
   WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 
 **/
 
 #include <Guid/AcpiS3Context.h>
 #include <IndustryStandard/Q35MchIch9.h>
 #include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
 #include <Library/PciLib.h>
 
 #include "SmramInternal.h"
 
+//
+// The value of PcdQ35TsegMbytes is saved into this variable at module startup.
+//
+UINT16 mQ35TsegMbytes;
+
+/**
+  Save PcdQ35TsegMbytes into mQ35TsegMbytes.
+**/
+VOID
+FetchQ35TsegMbytes (
+  VOID
+  )
+{
+  mQ35TsegMbytes = PcdGet16 (PcdQ35TsegMbytes);
+}
+
 /**
   Read the MCH_SMRAM and ESMRAMC registers, and update the LockState and
   OpenState fields in the PEI_SMM_ACCESS_PPI / EFI_SMM_ACCESS2_PROTOCOL object,
   from the D_LCK and T_EN bits.
 
   PEI_SMM_ACCESS_PPI and EFI_SMM_ACCESS2_PROTOCOL member functions can rely on
   the LockState and OpenState fields being up-to-date on entry, and they need
-- 
2.13.1.3.g8be5a757fa67

[PATCH v2 4/8] OvmfPkg: make PcdQ35TsegMbytes dynamic

[Laszlo Ersek]

We can now make PcdQ35TsegMbytes dynamic, in preparation for the extended
TSEG size feature. At the moment we only move the declaration in
OvmfPkg.dec from [PcdsFixedAtBuild] to [PcdsDynamic, PcdsDynamicEx], and
provide the dynamic defaults (with the same value, 8) in the DSC files if
SMM_REQUIRE is TRUE.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Suggested-by: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
---
 OvmfPkg/OvmfPkg.dec        | 14 +++++++-------
 OvmfPkg/OvmfPkgIa32.dsc    |  1 +
 OvmfPkg/OvmfPkgIa32X64.dsc |  1 +
 OvmfPkg/OvmfPkgX64.dsc     |  1 +
 4 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index 021ac2a77211..c46b72f069ef 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -86,21 +86,14 @@ [PcdsFixedAtBuild]
   #  MaxTarget=255 and MaxLun=16383. The *inclusive* constants below limit
   #  MaxTarget and MaxLun, independently, should the host report higher values,
   #  so that scanning the number of devices given by their product is still
   #  acceptably fast.
   gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxTargetLimit|31|UINT16|6
   gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxLunLimit|7|UINT32|7
 
-  ## The following setting controls how many megabytes we configure as TSEG on
-  #  Q35, for SMRAM purposes. Permitted values are: 1, 2, 8. Other values cause
-  #  undefined behavior.
-  #
-  #  This PCD is only consulted if PcdSmmSmramRequire is TRUE (see below).
-  gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT16|0x20
-
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0xa
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize|0|UINT32|0xb
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase|0x0|UINT32|0xc
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwSpareBase|0x0|UINT32|0xd
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwWorkingBase|0x0|UINT32|0xe
@@ -131,14 +124,21 @@ [PcdsDynamic, PcdsDynamicEx]
   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT64|0x25
 
   ## The 64-bit MMIO aperture shared by all PCI root bridges.
   #
   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x26
   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x27
 
+  ## The following setting controls how many megabytes we configure as TSEG on
+  #  Q35, for SMRAM purposes. Permitted values are: 1, 2, 8. Other values cause
+  #  undefined behavior.
+  #
+  #  This PCD is only consulted if PcdSmmSmramRequire is TRUE (see below).
+  gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT16|0x20
+
 [PcdsFeatureFlag]
   gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE|BOOLEAN|0x1c
   gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|FALSE|BOOLEAN|0x1d
 
   ## This feature flag enables SMM/SMRAM support. Note that it also requires
   #  such support from the underlying QEMU instance; if that support is not
   #  present, the firmware will reject continuing after a certain point.
diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index 0647f346257a..96f1b126d587 100644
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -530,14 +530,15 @@ [PcdsDynamicDefault]
   gEfiMdeModulePkgTokenSpaceGuid.PcdPropertiesTableEnable|FALSE
 
   # UefiCpuPkg PCDs related to initial AP bringup and general AP management.
   gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64
   gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000
 
 !if $(SMM_REQUIRE) == TRUE
+  gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x01
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|100000
 !endif
 
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index 1182b1858a7d..2815399b885a 100644
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -538,14 +538,15 @@ [PcdsDynamicDefault]
   gEfiMdeModulePkgTokenSpaceGuid.PcdPropertiesTableEnable|FALSE
 
   # UefiCpuPkg PCDs related to initial AP bringup and general AP management.
   gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64
   gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000
 
 !if $(SMM_REQUIRE) == TRUE
+  gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x01
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|100000
 !endif
 
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index 636dfb1b5638..b8329d33a9c4 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -537,14 +537,15 @@ [PcdsDynamicDefault]
   gEfiMdeModulePkgTokenSpaceGuid.PcdPropertiesTableEnable|FALSE
 
   # UefiCpuPkg PCDs related to initial AP bringup and general AP management.
   gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64
   gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000
 
 !if $(SMM_REQUIRE) == TRUE
+  gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x01
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|100000
 !endif
 
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform.
-- 
2.13.1.3.g8be5a757fa67

[PATCH v2 5/8] OvmfPkg/IndustryStandard/Q35MchIch9.h: add extended TSEG size macros

[Laszlo Ersek]

Add the macros for interfacing with the QEMU feature added in QEMU commit
2f295167e0c4 ("q35/mch: implement extended TSEG sizes", 2017-06-08).

Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
---
 OvmfPkg/Include/IndustryStandard/Q35MchIch9.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h b/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h
index f480455ae432..68485bec71f7 100644
--- a/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h
+++ b/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h
@@ -29,14 +29,17 @@
 #define INTEL_Q35_MCH_DEVICE_ID 0x29C0
 
 //
 // B/D/F/Type: 0/0/0/PCI
 //
 #define DRAMC_REGISTER_Q35(Offset) PCI_LIB_ADDRESS (0, 0, 0, (Offset))
 
+#define MCH_EXT_TSEG_MB       0x50
+#define MCH_EXT_TSEG_MB_QUERY   0xFFFF
+
 #define MCH_GGC               0x52
 #define MCH_GGC_IVD             BIT1
 
 #define MCH_PCIEXBAR_LOW      0x60
 #define MCH_PCIEXBAR_LOWMASK    0x0FFFFFFF
 #define MCH_PCIEXBAR_BUS_FF     0
 #define MCH_PCIEXBAR_EN         BIT0
@@ -50,14 +53,15 @@
 
 #define MCH_ESMRAMC           0x9E
 #define MCH_ESMRAMC_H_SMRAME    BIT7
 #define MCH_ESMRAMC_E_SMERR     BIT6
 #define MCH_ESMRAMC_SM_CACHE    BIT5
 #define MCH_ESMRAMC_SM_L1       BIT4
 #define MCH_ESMRAMC_SM_L2       BIT3
+#define MCH_ESMRAMC_TSEG_EXT    (BIT2 | BIT1)
 #define MCH_ESMRAMC_TSEG_8MB    BIT2
 #define MCH_ESMRAMC_TSEG_2MB    BIT1
 #define MCH_ESMRAMC_TSEG_1MB    0
 #define MCH_ESMRAMC_TSEG_MASK   (BIT2 | BIT1)
 #define MCH_ESMRAMC_T_EN        BIT0
 
 #define MCH_GBSM              0xA4
-- 
2.13.1.3.g8be5a757fa67

[PATCH v2 6/8] OvmfPkg/SmmAccess: support extended TSEG size

[Laszlo Ersek]

In SmmAccessPeiEntryPoint(), map TSEG megabyte counts different from 1, 2
and 8 to the MCH_ESMRAMC_TSEG_EXT bit pattern (introduced in the previous
patch), for the ESMRAMC.TSEG_SZ bit-field register. (Suggested by Jordan.)

In SmramAccessGetCapabilities() -- backing both
PEI_SMM_ACCESS_PPI.GetCapabilities() and
EFI_SMM_ACCESS2_PROTOCOL.GetCapabilities() --, map the
MCH_ESMRAMC_TSEG_EXT bit pattern found in the ESMRAMC.TSEG_SZ bit-field
register to a byte count of (mQ35TsegMbytes * SIZE_1MB).

(MCH_ESMRAMC_TSEG_EXT is the only possible pattern if none of
MCH_ESMRAMC_TSEG_1MB, MCH_ESMRAMC_TSEG_2MB, and MCH_ESMRAMC_TSEG_8MB
match.)

The new code paths are not exercised just yet; for that, PlatformPei is
going to have to set PcdQ35TsegMbytes (and consequently, SmramInternal's
"mQ35TsegMbytes") to a value different from 1, 2, and 8.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
---
 OvmfPkg/SmmAccess/SmmAccessPei.c  | 3 ++-
 OvmfPkg/SmmAccess/SmramInternal.c | 8 +++++---
 2 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.c b/OvmfPkg/SmmAccess/SmmAccessPei.c
index aba3aeb9f4bd..0d00140dc92f 100644
--- a/OvmfPkg/SmmAccess/SmmAccessPei.c
+++ b/OvmfPkg/SmmAccess/SmmAccessPei.c
@@ -326,15 +326,16 @@ SmmAccessPeiEntryPoint (
   // Set TSEG size, and disable TSEG visibility outside of SMM. Note that the
   // T_EN bit has inverse meaning; when T_EN is set, then TSEG visibility is
   // *restricted* to SMM.
   //
   EsmramcVal &= ~(UINT32)MCH_ESMRAMC_TSEG_MASK;
   EsmramcVal |= mQ35TsegMbytes == 8 ? MCH_ESMRAMC_TSEG_8MB :
                 mQ35TsegMbytes == 2 ? MCH_ESMRAMC_TSEG_2MB :
-                MCH_ESMRAMC_TSEG_1MB;
+                mQ35TsegMbytes == 1 ? MCH_ESMRAMC_TSEG_1MB :
+                MCH_ESMRAMC_TSEG_EXT;
   EsmramcVal |= MCH_ESMRAMC_T_EN;
   PciWrite8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC), EsmramcVal);
 
   //
   // TSEG should be closed (see above), but unlocked, initially. Set G_SMRAME
   // (Global SMRAM Enable) too, as both D_LCK and T_EN depend on it.
   //
diff --git a/OvmfPkg/SmmAccess/SmramInternal.c b/OvmfPkg/SmmAccess/SmramInternal.c
index ae1e9069aca6..fa0efeda72b0 100644
--- a/OvmfPkg/SmmAccess/SmramInternal.c
+++ b/OvmfPkg/SmmAccess/SmramInternal.c
@@ -192,14 +192,16 @@ SmramAccessGetCapabilities (
   // The second region is the main one, following the first.
   //
   SmramMap[DescIdxMain].PhysicalStart =
     SmramMap[DescIdxSmmS3ResumeState].PhysicalStart +
     SmramMap[DescIdxSmmS3ResumeState].PhysicalSize;
   SmramMap[DescIdxMain].CpuStart = SmramMap[DescIdxMain].PhysicalStart;
   SmramMap[DescIdxMain].PhysicalSize =
-    (TsegSizeBits == MCH_ESMRAMC_TSEG_8MB ? SIZE_8MB :
-     TsegSizeBits == MCH_ESMRAMC_TSEG_2MB ? SIZE_2MB :
-     SIZE_1MB) - SmramMap[DescIdxSmmS3ResumeState].PhysicalSize;
+                             (TsegSizeBits == MCH_ESMRAMC_TSEG_8MB ? SIZE_8MB :
+                              TsegSizeBits == MCH_ESMRAMC_TSEG_2MB ? SIZE_2MB :
+                              TsegSizeBits == MCH_ESMRAMC_TSEG_1MB ? SIZE_1MB :
+                              mQ35TsegMbytes * SIZE_1MB) -
+                             SmramMap[DescIdxSmmS3ResumeState].PhysicalSize;
   SmramMap[DescIdxMain].RegionState = CommonRegionState;
 
   return EFI_SUCCESS;
 }
-- 
2.13.1.3.g8be5a757fa67

[PATCH v2 7/8] OvmfPkg/PlatformPei: honor extended TSEG in PcdQ35TsegMbytes if available

[Laszlo Ersek]

Recognize an extended TSEG when available in
Q35TsegMbytesInitialization(), and set both PcdQ35TsegMbytes (for
OvmfPkg/SmmAccess) and "mQ35TsegMbytes" (for PlatformPei's own use)
accordingly. The new logic interfaces with the QEMU feature added in QEMU
commit 2f295167e0c4 ("q35/mch: implement extended TSEG sizes",
2017-06-08).

At this point we have to explicitly restrict Q35TsegMbytesInitialization()
to the Q35 board, but that's OK, because Q35TsegMbytesInitialization() is
only called when PcdSmmSmramRequire is set, and for that Q35 is already an
enforced requirement.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Suggested-by: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
---
 OvmfPkg/PlatformPei/Platform.h  |  2 +
 OvmfPkg/PlatformPei/MemDetect.c | 52 +++++++++++++++++++-
 OvmfPkg/PlatformPei/Platform.c  | 10 ++--
 3 files changed, 58 insertions(+), 6 deletions(-)

diff --git a/OvmfPkg/PlatformPei/Platform.h b/OvmfPkg/PlatformPei/Platform.h
index d2d627b221c4..ae855531c1b7 100644
--- a/OvmfPkg/PlatformPei/Platform.h
+++ b/OvmfPkg/PlatformPei/Platform.h
@@ -104,8 +104,10 @@ extern EFI_BOOT_MODE mBootMode;
 
 extern BOOLEAN mS3Supported;
 
 extern UINT8 mPhysMemAddressWidth;
 
 extern UINT32 mMaxCpuCount;
 
+extern UINT16 mHostBridgeDevId;
+
 #endif // _PLATFORM_PEI_H_INCLUDED_
diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
index 886d23622665..97f3fa5afcf5 100644
--- a/OvmfPkg/PlatformPei/MemDetect.c
+++ b/OvmfPkg/PlatformPei/MemDetect.c
@@ -15,24 +15,27 @@ Module Name:
   MemDetect.c
 
 **/
 
 //
 // The package level header files this module uses
 //
+#include <IndustryStandard/Q35MchIch9.h>
 #include <PiPei.h>
 
 //
 // The Library classes this module consumes
 //
+#include <Library/BaseLib.h>
 #include <Library/BaseMemoryLib.h>
 #include <Library/DebugLib.h>
 #include <Library/HobLib.h>
 #include <Library/IoLib.h>
 #include <Library/PcdLib.h>
+#include <Library/PciLib.h>
 #include <Library/PeimEntryPoint.h>
 #include <Library/ResourcePublicationLib.h>
 #include <Library/MtrrLib.h>
 #include <Library/QemuFwCfgLib.h>
 
 #include "Platform.h"
 #include "Cmos.h"
@@ -45,15 +48,62 @@ STATIC UINT32 mS3AcpiReservedMemorySize;
 STATIC UINT16 mQ35TsegMbytes;
 
 VOID
 Q35TsegMbytesInitialization (
   VOID
   )
 {
-  mQ35TsegMbytes = PcdGet16 (PcdQ35TsegMbytes);
+  UINT16        ExtendedTsegMbytes;
+  RETURN_STATUS PcdStatus;
+
+  if (mHostBridgeDevId != INTEL_Q35_MCH_DEVICE_ID) {
+    DEBUG ((
+      DEBUG_ERROR,
+      "%a: no TSEG (SMRAM) on host bridge DID=0x%04x; "
+      "only DID=0x%04x (Q35) is supported\n",
+      __FUNCTION__,
+      mHostBridgeDevId,
+      INTEL_Q35_MCH_DEVICE_ID
+      ));
+    ASSERT (FALSE);
+    CpuDeadLoop ();
+  }
+
+  //
+  // Check if QEMU offers an extended TSEG.
+  //
+  // This can be seen from writing MCH_EXT_TSEG_MB_QUERY to the MCH_EXT_TSEG_MB
+  // register, and reading back the register.
+  //
+  // On a QEMU machine type that does not offer an extended TSEG, the initial
+  // write overwrites whatever value a malicious guest OS may have placed in
+  // the (unimplemented) register, before entering S3 or rebooting.
+  // Subsequently, the read returns MCH_EXT_TSEG_MB_QUERY unchanged.
+  //
+  // On a QEMU machine type that offers an extended TSEG, the initial write
+  // triggers an update to the register. Subsequently, the value read back
+  // (which is guaranteed to differ from MCH_EXT_TSEG_MB_QUERY) tells us the
+  // number of megabytes.
+  //
+  PciWrite16 (DRAMC_REGISTER_Q35 (MCH_EXT_TSEG_MB), MCH_EXT_TSEG_MB_QUERY);
+  ExtendedTsegMbytes = PciRead16 (DRAMC_REGISTER_Q35 (MCH_EXT_TSEG_MB));
+  if (ExtendedTsegMbytes == MCH_EXT_TSEG_MB_QUERY) {
+    mQ35TsegMbytes = PcdGet16 (PcdQ35TsegMbytes);
+    return;
+  }
+
+  DEBUG ((
+    DEBUG_INFO,
+    "%a: QEMU offers an extended TSEG (%d MB)\n",
+    __FUNCTION__,
+    ExtendedTsegMbytes
+    ));
+  PcdStatus = PcdSet16S (PcdQ35TsegMbytes, ExtendedTsegMbytes);
+  ASSERT_RETURN_ERROR (PcdStatus);
+  mQ35TsegMbytes = ExtendedTsegMbytes;
 }
 
 
 UINT32
 GetSystemMemorySizeBelow4gb (
   VOID
   )
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index b8a28450d6c5..98cfaaa28ed1 100644
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -641,32 +641,32 @@ InitializePlatform (
   }
 
   S3Verification ();
   BootModeInitialization ();
   AddressWidthInitialization ();
   MaxCpuCountInitialization ();
 
+  //
+  // Query Host Bridge DID
+  //
+  mHostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
+
   if (FeaturePcdGet (PcdSmmSmramRequire)) {
     Q35TsegMbytesInitialization ();
   }
 
   PublishPeiMemory ();
 
   InitializeRamRegions ();
 
   if (mXen) {
     DEBUG ((EFI_D_INFO, "Xen was detected\n"));
     InitializeXen ();
   }
 
-  //
-  // Query Host Bridge DID
-  //
-  mHostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
-
   if (mBootMode != BOOT_ON_S3_RESUME) {
     if (!FeaturePcdGet (PcdSmmSmramRequire)) {
       ReserveEmuVariableNvStore ();
     }
     PeiFvInitialization ();
     MemMapInitialization ();
     NoexecDxeInitialization ();
-- 
2.13.1.3.g8be5a757fa67

[PATCH v2 8/8] OvmfPkg: mention the extended TSEG near the PcdQ35TsegMbytes declaration

[Laszlo Ersek]

PlatformPei can now overwrite PcdQ35TsegMbytes; document this in
"OvmfPkg/OvmfPkg.dec".

Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
---
 OvmfPkg/OvmfPkg.dec | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index c46b72f069ef..e5f74a1248ed 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -125,18 +125,19 @@ [PcdsDynamic, PcdsDynamicEx]
 
   ## The 64-bit MMIO aperture shared by all PCI root bridges.
   #
   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x26
   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x27
 
   ## The following setting controls how many megabytes we configure as TSEG on
-  #  Q35, for SMRAM purposes. Permitted values are: 1, 2, 8. Other values cause
-  #  undefined behavior.
+  #  Q35, for SMRAM purposes. Permitted defaults are: 1, 2, 8. Other defaults
+  #  cause undefined behavior. During boot, the PCD is updated by PlatformPei
+  #  to reflect the extended TSEG size, if one is advertized by QEMU.
   #
-  #  This PCD is only consulted if PcdSmmSmramRequire is TRUE (see below).
+  #  This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).
   gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT16|0x20
 
 [PcdsFeatureFlag]
   gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE|BOOLEAN|0x1c
   gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|FALSE|BOOLEAN|0x1d
 
   ## This feature flag enables SMM/SMRAM support. Note that it also requires
-- 
2.13.1.3.g8be5a757fa67

Re: [PATCH v2 0/8] OvmfPkg: recognize an extended TSEG when QEMU offers it

[Jordan Justen]

On 2017-07-04 09:56:21, Laszlo Ersek wrote:
> This is version 2 of the series posted previously at
> <https://lists.01.org/pipermail/edk2-devel/2017-June/011452.html>.
> 
> Version 2 is a rewrite from scratch based on Jordan's feedback for v1
> and the subsequent discussion.
> 
> Repo:   https://github.com/lersek/edk2.git
> Branch: extended_tseg_bz1447027_v2
> 
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> 
> Thanks
> Laszlo
> 
> Laszlo Ersek (8):
>   OvmfPkg: widen PcdQ35TsegMbytes to UINT16
>   OvmfPkg/PlatformPei: prepare for PcdQ35TsegMbytes becoming dynamic
>   OvmfPkg/SmmAccess: prepare for PcdQ35TsegMbytes becoming dynamic

Maybe InitQ35TsegMbytes instead of FetchQ35TsegMbytes. I also thought
a GetQ35TsegMbytes function could just return the value rather than
adding an externally visible global. Not a big deal.

>   OvmfPkg: make PcdQ35TsegMbytes dynamic
>   OvmfPkg/IndustryStandard/Q35MchIch9.h: add extended TSEG size macros
>   OvmfPkg/SmmAccess: support extended TSEG size

Some indentation issues in SmramInternal.c.

>   OvmfPkg/PlatformPei: honor extended TSEG in PcdQ35TsegMbytes if
>     available
>   OvmfPkg: mention the extended TSEG near the PcdQ35TsegMbytes
>     declaration

Series Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

> 
>  OvmfPkg/Include/IndustryStandard/Q35MchIch9.h |  4 ++
>  OvmfPkg/OvmfPkg.dec                           | 15 +++--
>  OvmfPkg/OvmfPkgIa32.dsc                       |  1 +
>  OvmfPkg/OvmfPkgIa32X64.dsc                    |  1 +
>  OvmfPkg/OvmfPkgX64.dsc                        |  1 +
>  OvmfPkg/PlatformPei/MemDetect.c               | 67 +++++++++++++++++++-
>  OvmfPkg/PlatformPei/Platform.c                | 14 ++--
>  OvmfPkg/PlatformPei/Platform.h                |  7 ++
>  OvmfPkg/SmmAccess/SmmAccess2Dxe.c             |  1 +
>  OvmfPkg/SmmAccess/SmmAccess2Dxe.inf           |  3 +
>  OvmfPkg/SmmAccess/SmmAccessPei.c              | 10 +--
>  OvmfPkg/SmmAccess/SmmAccessPei.inf            |  4 +-
>  OvmfPkg/SmmAccess/SmramInternal.c             | 25 +++++++-
>  OvmfPkg/SmmAccess/SmramInternal.h             | 13 ++++
>  14 files changed, 142 insertions(+), 24 deletions(-)
> 
> -- 
> 2.13.1.3.g8be5a757fa67
> 

Re: [PATCH v2 0/8] OvmfPkg: recognize an extended TSEG when QEMU offers it

[Laszlo Ersek]

On 07/05/17 19:31, Jordan Justen wrote:
> On 2017-07-04 09:56:21, Laszlo Ersek wrote:
>> This is version 2 of the series posted previously at
>> <https://lists.01.org/pipermail/edk2-devel/2017-June/011452.html>.
>>
>> Version 2 is a rewrite from scratch based on Jordan's feedback for v1
>> and the subsequent discussion.
>>
>> Repo:   https://github.com/lersek/edk2.git
>> Branch: extended_tseg_bz1447027_v2
>>
>> Cc: Jordan Justen <jordan.l.justen@intel.com>
>>
>> Thanks
>> Laszlo
>>
>> Laszlo Ersek (8):
>>   OvmfPkg: widen PcdQ35TsegMbytes to UINT16
>>   OvmfPkg/PlatformPei: prepare for PcdQ35TsegMbytes becoming dynamic
>>   OvmfPkg/SmmAccess: prepare for PcdQ35TsegMbytes becoming dynamic
>
> Maybe InitQ35TsegMbytes instead of FetchQ35TsegMbytes.

OK, I'll do this rename before I push.

> I also thought
> a GetQ35TsegMbytes function could just return the value rather than
> adding an externally visible global. Not a big deal.
>
>>   OvmfPkg: make PcdQ35TsegMbytes dynamic
>>   OvmfPkg/IndustryStandard/Q35MchIch9.h: add extended TSEG size macros
>>   OvmfPkg/SmmAccess: support extended TSEG size
>
> Some indentation issues in SmramInternal.c.

Do you mean this hunk:

> diff --git a/OvmfPkg/SmmAccess/SmramInternal.c b/OvmfPkg/SmmAccess/SmramInternal.c
> index ae1e9069aca6..fa0efeda72b0 100644
> --- a/OvmfPkg/SmmAccess/SmramInternal.c
> +++ b/OvmfPkg/SmmAccess/SmramInternal.c
> @@ -196,9 +196,11 @@ SmramAccessGetCapabilities (
>      SmramMap[DescIdxSmmS3ResumeState].PhysicalSize;
>    SmramMap[DescIdxMain].CpuStart = SmramMap[DescIdxMain].PhysicalStart;
>    SmramMap[DescIdxMain].PhysicalSize =
> -    (TsegSizeBits == MCH_ESMRAMC_TSEG_8MB ? SIZE_8MB :
> -     TsegSizeBits == MCH_ESMRAMC_TSEG_2MB ? SIZE_2MB :
> -     SIZE_1MB) - SmramMap[DescIdxSmmS3ResumeState].PhysicalSize;
> +                             (TsegSizeBits == MCH_ESMRAMC_TSEG_8MB ? SIZE_8MB :
> +                              TsegSizeBits == MCH_ESMRAMC_TSEG_2MB ? SIZE_2MB :
> +                              TsegSizeBits == MCH_ESMRAMC_TSEG_1MB ? SIZE_1MB :
> +                              mQ35TsegMbytes * SIZE_1MB) -
> +                             SmramMap[DescIdxSmmS3ResumeState].PhysicalSize;

I'll align the added code with the removed code before I push.

>
>>   OvmfPkg/PlatformPei: honor extended TSEG in PcdQ35TsegMbytes if
>>     available
>>   OvmfPkg: mention the extended TSEG near the PcdQ35TsegMbytes
>>     declaration
>
> Series Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

Thanks!
Laszlo

>
>>
>>  OvmfPkg/Include/IndustryStandard/Q35MchIch9.h |  4 ++
>>  OvmfPkg/OvmfPkg.dec                           | 15 +++--
>>  OvmfPkg/OvmfPkgIa32.dsc                       |  1 +
>>  OvmfPkg/OvmfPkgIa32X64.dsc                    |  1 +
>>  OvmfPkg/OvmfPkgX64.dsc                        |  1 +
>>  OvmfPkg/PlatformPei/MemDetect.c               | 67 +++++++++++++++++++-
>>  OvmfPkg/PlatformPei/Platform.c                | 14 ++--
>>  OvmfPkg/PlatformPei/Platform.h                |  7 ++
>>  OvmfPkg/SmmAccess/SmmAccess2Dxe.c             |  1 +
>>  OvmfPkg/SmmAccess/SmmAccess2Dxe.inf           |  3 +
>>  OvmfPkg/SmmAccess/SmmAccessPei.c              | 10 +--
>>  OvmfPkg/SmmAccess/SmmAccessPei.inf            |  4 +-
>>  OvmfPkg/SmmAccess/SmramInternal.c             | 25 +++++++-
>>  OvmfPkg/SmmAccess/SmramInternal.h             | 13 ++++
>>  14 files changed, 142 insertions(+), 24 deletions(-)
>>
>> --
>> 2.13.1.3.g8be5a757fa67
>>

Re: [PATCH v2 0/8] OvmfPkg: recognize an extended TSEG when QEMU offers it

[Laszlo Ersek]

On 07/04/17 18:56, Laszlo Ersek wrote:
> This is version 2 of the series posted previously at
> <https://lists.01.org/pipermail/edk2-devel/2017-June/011452.html>.
> 
> Version 2 is a rewrite from scratch based on Jordan's feedback for v1
> and the subsequent discussion.
> 
> Repo:   https://github.com/lersek/edk2.git
> Branch: extended_tseg_bz1447027_v2
> 
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> 
> Thanks
> Laszlo
> 
> Laszlo Ersek (8):
>   OvmfPkg: widen PcdQ35TsegMbytes to UINT16
>   OvmfPkg/PlatformPei: prepare for PcdQ35TsegMbytes becoming dynamic
>   OvmfPkg/SmmAccess: prepare for PcdQ35TsegMbytes becoming dynamic
>   OvmfPkg: make PcdQ35TsegMbytes dynamic
>   OvmfPkg/IndustryStandard/Q35MchIch9.h: add extended TSEG size macros
>   OvmfPkg/SmmAccess: support extended TSEG size
>   OvmfPkg/PlatformPei: honor extended TSEG in PcdQ35TsegMbytes if
>     available
>   OvmfPkg: mention the extended TSEG near the PcdQ35TsegMbytes
>     declaration
> 
>  OvmfPkg/Include/IndustryStandard/Q35MchIch9.h |  4 ++
>  OvmfPkg/OvmfPkg.dec                           | 15 +++--
>  OvmfPkg/OvmfPkgIa32.dsc                       |  1 +
>  OvmfPkg/OvmfPkgIa32X64.dsc                    |  1 +
>  OvmfPkg/OvmfPkgX64.dsc                        |  1 +
>  OvmfPkg/PlatformPei/MemDetect.c               | 67 +++++++++++++++++++-
>  OvmfPkg/PlatformPei/Platform.c                | 14 ++--
>  OvmfPkg/PlatformPei/Platform.h                |  7 ++
>  OvmfPkg/SmmAccess/SmmAccess2Dxe.c             |  1 +
>  OvmfPkg/SmmAccess/SmmAccess2Dxe.inf           |  3 +
>  OvmfPkg/SmmAccess/SmmAccessPei.c              | 10 +--
>  OvmfPkg/SmmAccess/SmmAccessPei.inf            |  4 +-
>  OvmfPkg/SmmAccess/SmramInternal.c             | 25 +++++++-
>  OvmfPkg/SmmAccess/SmramInternal.h             | 13 ++++
>  14 files changed, 142 insertions(+), 24 deletions(-)
> 

Pushed: 253d81c71f67..d04b72c67097.

Thanks
Laszlo