From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr0-x233.google.com (mail-wr0-x233.google.com [IPv6:2a00:1450:400c:c0c::233]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 6315B2095A6BF for ; Wed, 5 Jul 2017 09:34:49 -0700 (PDT) Received: by mail-wr0-x233.google.com with SMTP id r103so266203272wrb.0 for ; Wed, 05 Jul 2017 09:36:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=ViM+/TaF3qizLB7LW2nC8BYN+ZT1KZeVeuWb/yDd/Kk=; b=TtJdguopZj8LAKvFpPaErNjE8pp0jvVJFlJv0VaJLqIdo2PEH9c6A+kFeGSL1a9kMN ohPWQQMIWiO3MR7tMHkyrVMRyDEGIRDhBm2eYl0+C1qcSoVEw6ImAzvzagOqa03E+/yI Lne7lGabrVm4li9vUXsMW0FRngdPlm7+ZEas4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=ViM+/TaF3qizLB7LW2nC8BYN+ZT1KZeVeuWb/yDd/Kk=; b=dgiPrJMwXlEUSjDe+fdUUlIfS7NjzXMArLmz4tnco88IRa78Pb6RlmvmrdLen4CbIe +V9bQ1dB98w7Cqt5ZKWYeG/cktDy6j0JxiWBt791E0VBQf2+Fti4Z0Y/7zhU+uoLbLZs z/XEsZ0d6OyLhGxokzAcKlAF16K2hW7Abf/gbWMrEpgHp/j9mzeXtpeYxjkRTtMhw8ae /NnkwHuLjFgwvdeJ3HHAovP/TbkumjkImNXGnUGKYqiZsmubzPNYGb6LFWZ36c+9/DcN htj7L4vfm83Q5jMknTv1ebSTgeVMD8gnSeXNWxt8CpSvsdpDXML/XeUEPsiUk+42mcQe b6hA== X-Gm-Message-State: AKS2vOy6lhlnqucDgHGnJaDoEvn0GpDiSLSq2giIgRv8nku/KWNob17O EmY/we24hydCerPB X-Received: by 10.223.171.3 with SMTP id q3mr37944355wrc.12.1499272587505; Wed, 05 Jul 2017 09:36:27 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id h10sm11973942wme.30.2017.07.05.09.36.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 05 Jul 2017 09:36:26 -0700 (PDT) Date: Wed, 5 Jul 2017 17:36:25 +0100 From: Leif Lindholm To: Jun Nie Cc: ard.biesheuvel@linaro.org, edk2-devel@lists.01.org, evan.lloyd@arm.com, Alexei.Fedorov@arm.com, shawn.guo@linaro.org, jason.liu@linaro.org Message-ID: <20170705163625.GH26676@bivouac.eciton.net> References: <1499183018-16297-1-git-send-email-jun.nie@linaro.org> MIME-Version: 1.0 In-Reply-To: <1499183018-16297-1-git-send-email-jun.nie@linaro.org> User-Agent: Mutt/1.5.23 (2014-03-12) Subject: Re: [PATCH v2] ArmPlatformPkg: Support different PL011 reg offset X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 05 Jul 2017 16:34:49 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Tue, Jul 04, 2017 at 11:43:38PM +0800, Jun Nie wrote: > ZTE/SanChip version pl011 has different reg offset and bit offset > for some registers. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Jun Nie > --- > ArmPlatformPkg/ArmPlatformPkg.dec | 1 + > ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf | 1 + > ArmPlatformPkg/Include/Drivers/PL011Uart.h | 29 ++++++++++++++++++++++++++ > 3 files changed, 31 insertions(+) > > diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec b/ArmPlatformPkg/ArmPlatformPkg.dec > index d756fd2..3dd613c 100644 > --- a/ArmPlatformPkg/ArmPlatformPkg.dec > +++ b/ArmPlatformPkg/ArmPlatformPkg.dec > @@ -97,6 +97,7 @@ > gArmPlatformTokenSpaceGuid.PL011UartInteger|0|UINT32|0x00000020 > gArmPlatformTokenSpaceGuid.PL011UartFractional|0|UINT32|0x0000002D > gArmPlatformTokenSpaceGuid.PL011UartInterrupt|0x00000000|UINT32|0x0000002F > + gArmPlatformTokenSpaceGuid.PL011UartZxRegOffset|0|UINT8|0 I'm basically OK with this patch, but if we have multiple variants of this, as the Linux driver suggests, I think we're looking at something more like PL011UartRegOffsetVariant, with a numerical value for each special flavour. > > ## PL011 Serial Debug UART > gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x00000000|UINT64|0x00000030 > diff --git a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf > index 0154f3b..257fbc7 100644 > --- a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf > +++ b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf > @@ -39,3 +39,4 @@ > > gArmPlatformTokenSpaceGuid.PL011UartInteger > gArmPlatformTokenSpaceGuid.PL011UartFractional > + gArmPlatformTokenSpaceGuid.PL011UartZxRegOffset > diff --git a/ArmPlatformPkg/Include/Drivers/PL011Uart.h b/ArmPlatformPkg/Include/Drivers/PL011Uart.h > index d5e88e8..09d548b 100644 > --- a/ArmPlatformPkg/Include/Drivers/PL011Uart.h > +++ b/ArmPlatformPkg/Include/Drivers/PL011Uart.h > @@ -19,6 +19,7 @@ > #include > > // PL011 Registers > +#if !FixedPcdGet8 (PL011UartZxRegOffset) And as such, more a test like... #if FixedPcdGet8 (PL011UartRegOffsetVariant) == PL011_VARIANT_ZTE / Leif > #define UARTDR 0x000 > #define UARTRSR 0x004 > #define UARTECR 0x004 > @@ -34,6 +35,22 @@ > #define UARTMIS 0x040 > #define UARTICR 0x044 > #define UARTDMACR 0x048 > +#else > +#define UARTDR 0x004 > +#define UARTRSR 0x010 > +#define UARTECR 0x010 > +#define UARTFR 0x014 > +#define UARTIBRD 0x024 > +#define UARTFBRD 0x028 > +#define UARTLCR_H 0x030 > +#define UARTCR 0x034 > +#define UARTIFLS 0x038 > +#define UARTIMSC 0x040 > +#define UARTRIS 0x044 > +#define UARTMIS 0x048 > +#define UARTICR 0x04c > +#define UARTDMACR 0x050 > +#endif > > #define UARTPID0 0xFE0 > #define UARTPID1 0xFE4 > @@ -47,6 +64,7 @@ > #define UART_STATUS_ERROR_MASK 0x0F > > // Flag reg bits > +#if !FixedPcdGet8 (PL011UartZxRegOffset) > #define PL011_UARTFR_RI (1 << 8) // Ring indicator > #define PL011_UARTFR_TXFE (1 << 7) // Transmit FIFO empty > #define PL011_UARTFR_RXFF (1 << 6) // Receive FIFO full > @@ -56,6 +74,17 @@ > #define PL011_UARTFR_DCD (1 << 2) // Data carrier detect > #define PL011_UARTFR_DSR (1 << 1) // Data set ready > #define PL011_UARTFR_CTS (1 << 0) // Clear to send > +#else > +#define PL011_UARTFR_RI (1 << 0) // Ring indicator > +#define PL011_UARTFR_TXFE (1 << 7) // Transmit FIFO empty > +#define PL011_UARTFR_RXFF (1 << 6) // Receive FIFO full > +#define PL011_UARTFR_TXFF (1 << 5) // Transmit FIFO full > +#define PL011_UARTFR_RXFE (1 << 4) // Receive FIFO empty > +#define PL011_UARTFR_BUSY (1 << 8) // UART busy > +#define PL011_UARTFR_DCD (1 << 2) // Data carrier detect > +#define PL011_UARTFR_DSR (1 << 3) // Data set ready > +#define PL011_UARTFR_CTS (1 << 1) // Clear to send > +#endif > > // Flag reg bits - alternative names > #define UART_TX_EMPTY_FLAG_MASK PL011_UARTFR_TXFE > -- > 1.9.1 >