From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-x232.google.com (mail-wm0-x232.google.com [IPv6:2a00:1450:400c:c09::232]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 53B7F21CB57B3 for ; Wed, 5 Jul 2017 09:36:29 -0700 (PDT) Received: by mail-wm0-x232.google.com with SMTP id w126so227591906wme.0 for ; Wed, 05 Jul 2017 09:38:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=pyraeb8ImCltFszhwfx+lnIavNnhLHl9HokBSk520I8=; b=TPToMcC0Bc4heDqZkMu1wlNrX8+hCueC3CPCvRsc7j/O4BotZjNnWON0pLxkNI1nAQ IuacOQ42F4oMcMIjpNjj5i9kUvVomE3PNRi8+q6lFqo1MYEHpQINYCTurIwphqoHjtRQ xvFpmW8eCJeyxt9f98lcps27fw77cXIY3GZsw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=pyraeb8ImCltFszhwfx+lnIavNnhLHl9HokBSk520I8=; b=XPIGaMJWaoe1SCXb1GzWtrJIRql61D+szdtrdIMn+YKtFBAmsRPH3M4udOHJyU7so0 WcZbp5p4UFv3CYBFzs4zA8NR3Fh1tGZlAlcKf331Nt6mZL7QryjbsPdL6dDDGUINlbM2 dLBQkJsDQ87/ZNat8aVzaDQhhzRCuQe5R5NjkLUWP0J73kq2YK/U9ydkk8+kKs29JeKz cPdf/tUyYZ31PoAua2+rBfeD8x0D24dXV1EqbDniazXQNNnO0gnrO2KgXd9aAaFAgg7E n7Vy2QhRY2cxxD+nBFrQObR9KxZPUyG/BCrSeDjyvqin8dzFvs8pTa/Dk9pjGSANibgt ysyg== X-Gm-Message-State: AKS2vOwR7lbC+NTurd+RtIZqOhTlf84hSx+mFC3YWGRxAYGbkcU6AzFf Dzkd23sQAX1ZBwDp X-Received: by 10.28.51.212 with SMTP id z203mr34642061wmz.103.1499272686661; Wed, 05 Jul 2017 09:38:06 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id p7sm7379788wmf.11.2017.07.05.09.38.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 05 Jul 2017 09:38:05 -0700 (PDT) Date: Wed, 5 Jul 2017 17:38:04 +0100 From: Leif Lindholm To: Marcin Wojtas Cc: edk2-devel@lists.01.org, ard.biesheuvel@linaro.org, jsd@semihalf.com, jinghua@marvell.com Message-ID: <20170705163804.GJ26676@bivouac.eciton.net> References: <1499205732-12445-1-git-send-email-mw@semihalf.com> <1499205732-12445-3-git-send-email-mw@semihalf.com> MIME-Version: 1.0 In-Reply-To: <1499205732-12445-3-git-send-email-mw@semihalf.com> User-Agent: Mutt/1.5.23 (2014-03-12) Subject: Re: [platforms: PATCH v2 10/10] Platform/Marvell: ComPhyLib: Add support for SATA ports on CP110 slave X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 05 Jul 2017 16:36:29 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Jul 05, 2017 at 12:02:12AM +0200, Marcin Wojtas wrote: > From: Ard Biesheuvel > > Add support for COMPHY_TYPE_SATA2 and COMPHY_TYPE_SATA3, which map > to the SATA ports on the second CP110's AHCI controller. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel > Signed-off-by: Marcin Wojtas Reviewed-by: Leif Lindholm > --- > Platform/Marvell/Library/ComPhyLib/ComPhyCp110.c | 12 +++++++----- > 1 file changed, 7 insertions(+), 5 deletions(-) > > diff --git a/Platform/Marvell/Library/ComPhyLib/ComPhyCp110.c b/Platform/Marvell/Library/ComPhyLib/ComPhyCp110.c > index 6ef63a8..40a7b99 100755 > --- a/Platform/Marvell/Library/ComPhyLib/ComPhyCp110.c > +++ b/Platform/Marvell/Library/ComPhyLib/ComPhyCp110.c > @@ -55,24 +55,26 @@ DECLARE_A7K8K_NONDISCOVERABLE_TEMPLATE; > COMPHY_MUX_DATA Cp110ComPhyMuxData[] = { > /* Lane 0 */ > {4, {{COMPHY_TYPE_UNCONNECTED, 0x0}, {COMPHY_TYPE_SGMII1, 0x1}, > - {COMPHY_TYPE_SATA1, 0x4}}}, > + {COMPHY_TYPE_SATA1, 0x4}, {COMPHY_TYPE_SATA3, 0x4}}}, > /* Lane 1 */ > {4, {{COMPHY_TYPE_UNCONNECTED, 0x0}, {COMPHY_TYPE_SGMII2, 0x1}, > - {COMPHY_TYPE_SATA0, 0x4}}}, > + {COMPHY_TYPE_SATA0, 0x4}, {COMPHY_TYPE_SATA2, 0x4}}}, > /* Lane 2 */ > {6, {{COMPHY_TYPE_UNCONNECTED, 0x0}, {COMPHY_TYPE_SGMII0, 0x1}, > {COMPHY_TYPE_RXAUI0, 0x1}, {COMPHY_TYPE_SFI, 0x1}, > - {COMPHY_TYPE_SATA0, 0x4}}}, > + {COMPHY_TYPE_SATA0, 0x4}, {COMPHY_TYPE_SATA2, 0x4}}}, > /* Lane 3 */ > {8, {{COMPHY_TYPE_UNCONNECTED, 0x0}, {COMPHY_TYPE_RXAUI1, 0x1}, > - {COMPHY_TYPE_SGMII1, 0x2}, {COMPHY_TYPE_SATA1, 0x4}}}, > + {COMPHY_TYPE_SGMII1, 0x2}, {COMPHY_TYPE_SATA1, 0x4}, > + {COMPHY_TYPE_SATA3, 0x4}}}, > /* Lane 4 */ > {7, {{COMPHY_TYPE_UNCONNECTED, 0x0}, {COMPHY_TYPE_SGMII0, 0x2}, > {COMPHY_TYPE_RXAUI0, 0x2}, {COMPHY_TYPE_SFI, 0x2}, > {COMPHY_TYPE_SGMII1, 0x1}}}, > /* Lane 5 */ > {6, {{COMPHY_TYPE_UNCONNECTED, 0x0}, {COMPHY_TYPE_SGMII2, 0x1}, > - {COMPHY_TYPE_RXAUI1, 0x2}, {COMPHY_TYPE_SATA1, 0x4}}}, > + {COMPHY_TYPE_RXAUI1, 0x2}, {COMPHY_TYPE_SATA1, 0x4}, > + {COMPHY_TYPE_SATA3, 0x4}}}, > }; > > COMPHY_MUX_DATA Cp110ComPhyPipeMuxData[] = { > -- > 1.8.3.1 >