From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-x22c.google.com (mail-wm0-x22c.google.com [IPv6:2a00:1450:400c:c09::22c]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id AAF452095D8CE for ; Thu, 13 Jul 2017 05:47:10 -0700 (PDT) Received: by mail-wm0-x22c.google.com with SMTP id 62so22565956wmw.1 for ; Thu, 13 Jul 2017 05:48:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=KfaWizKArq9jQL4GLuQ9cm1NIwX3yMTqjAKNFQtDxoE=; b=cdbwaRgMattEYkuSJhtHT1Hv7jRn0d/9BGFICHcO89MxOgKvOGCO48v3G6ndLUTXtR V6kHpXkgT65Q41H8R0yh8N8DsoZH9/GsRw3RE2V2XWUfRAzU5IVSJNGx1IMHEfrDb1lD KIAW72Jpg85susGBSWIE/+0438FYI9hpcR5Lg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=KfaWizKArq9jQL4GLuQ9cm1NIwX3yMTqjAKNFQtDxoE=; b=q5s5w6j5CBjTzPx/vJ9elDTvs5NZvi+Z8zGllBSnFrxGowhefytNuHxbvL6L4qkEaV mDmPTO0I55R99Tv+XIv0EPA007Sc4ZRK5byzsv+uvJsnZc/vcXh9PuSvLhyPgmrdl6QR KhaDanyCmPiwKCZywQjDWd35PPmKo3NxDGwGPIM+1qMhDgAL1p3vTjyoU+hh6tueofwq jD0+hnxZG5gLMK3jMRbmw2H8U5671kg5AybD4KlnakJzpuo98j8anCjLiJRZVAW3vwFW H7+/36I3qBntPuTP7EnGj2B6XGM1l5q1CTQT9cE1MJoi8G6S+T3LRdklD9FAW6FVYs90 2IPQ== X-Gm-Message-State: AIVw110fl8g+VAFekU1QzJIz3/EG6R2gKVhawlrzfS4QGw94kSxsZ+Xs ICQcdNaZx7I1iY2Ec/lwmg== X-Received: by 10.28.64.196 with SMTP id n187mr1947631wma.94.1499950137074; Thu, 13 Jul 2017 05:48:57 -0700 (PDT) Received: from localhost.localdomain ([154.145.198.181]) by smtp.gmail.com with ESMTPSA id 52sm5420720wra.56.2017.07.13.05.48.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jul 2017 05:48:56 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, liming.gao@intel.com, yonghong.zhu@intel.com Cc: Alexei.Fedorov@arm.com, leif.lindholm@linaro.org, evan.lloyd@arm.com, Ard Biesheuvel Date: Thu, 13 Jul 2017 13:48:44 +0100 Message-Id: <20170713124844.23556-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170713124844.23556-1-ard.biesheuvel@linaro.org> References: <20170713124844.23556-1-ard.biesheuvel@linaro.org> Subject: [PATCH 2/2] BaseTools/tools_def AARCH64: avoid SIMD register in XIP code X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 13 Jul 2017 12:47:11 -0000 XIP code may execute with the MMU off, in which case all memory accesses should be strictly aligned to their size. Some versions of GCC violate this restriction even when -mstrict-align is passed, when performing loads and stores that involve SIMD registers. This is clearly a bug in the compiler, but we can easily work around it by avoiding SIMD registers altogether when building code that may execute in such a context. So add -mgeneral-regs-only to the AARCH64 XIP CC flags. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- BaseTools/Conf/tools_def.template | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template index 128da5131d01..cdc9df44d97d 100755 --- a/BaseTools/Conf/tools_def.template +++ b/BaseTools/Conf/tools_def.template @@ -4342,7 +4342,7 @@ DEFINE GCC_IPF_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -minline-int-divide-m DEFINE GCC_ARM_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -mlittle-endian -mabi=aapcs -fno-short-enums -funsigned-char -ffunction-sections -fdata-sections -fomit-frame-pointer -Wno-address -mthumb -mfloat-abi=soft -fno-pic -fno-pie DEFINE GCC_ARM_CC_XIPFLAGS = -mno-unaligned-access DEFINE GCC_AARCH64_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -mlittle-endian -fno-short-enums -fverbose-asm -funsigned-char -ffunction-sections -fdata-sections -Wno-address -fno-asynchronous-unwind-tables -fno-pic -fno-pie -ffixed-x18 -DEFINE GCC_AARCH64_CC_XIPFLAGS = -mstrict-align +DEFINE GCC_AARCH64_CC_XIPFLAGS = -mstrict-align -mgeneral-regs-only DEFINE GCC_DLINK_FLAGS_COMMON = -nostdlib --pie DEFINE GCC_DLINK2_FLAGS_COMMON = -Wl,--script=$(EDK_TOOLS_PATH)/Scripts/GccBase.lds DEFINE GCC_IA32_X64_DLINK_COMMON = DEF(GCC_DLINK_FLAGS_COMMON) --gc-sections -- 2.9.3