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From: Leif Lindholm <leif.lindholm@linaro.org>
To: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: edk2-devel@lists.01.org, liming.gao@intel.com,
	yonghong.zhu@intel.com, Alexei.Fedorov@arm.com,
	evan.lloyd@arm.com
Subject: Re: [PATCH 2/2] BaseTools/tools_def AARCH64: avoid SIMD register in XIP code
Date: Thu, 13 Jul 2017 15:11:47 +0100	[thread overview]
Message-ID: <20170713141147.GD26676@bivouac.eciton.net> (raw)
In-Reply-To: <20170713124844.23556-2-ard.biesheuvel@linaro.org>

On Thu, Jul 13, 2017 at 01:48:44PM +0100, Ard Biesheuvel wrote:
> XIP code may execute with the MMU off, in which case all memory accesses
> should be strictly aligned to their size. Some versions of GCC violate
> this restriction even when -mstrict-align is passed, when performing
> loads and stores that involve SIMD registers. This is clearly a bug in
> the compiler, but we can easily work around it by avoiding SIMD registers
> altogether when building code that may execute in such a context. So add
> -mgeneral-regs-only to the AARCH64 XIP CC flags.
> 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

> ---
>  BaseTools/Conf/tools_def.template | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template
> index 128da5131d01..cdc9df44d97d 100755
> --- a/BaseTools/Conf/tools_def.template
> +++ b/BaseTools/Conf/tools_def.template
> @@ -4342,7 +4342,7 @@ DEFINE GCC_IPF_CC_FLAGS            = DEF(GCC_ALL_CC_FLAGS) -minline-int-divide-m
>  DEFINE GCC_ARM_CC_FLAGS            = DEF(GCC_ALL_CC_FLAGS) -mlittle-endian -mabi=aapcs -fno-short-enums -funsigned-char -ffunction-sections -fdata-sections -fomit-frame-pointer -Wno-address -mthumb -mfloat-abi=soft -fno-pic -fno-pie
>  DEFINE GCC_ARM_CC_XIPFLAGS         = -mno-unaligned-access
>  DEFINE GCC_AARCH64_CC_FLAGS        = DEF(GCC_ALL_CC_FLAGS) -mlittle-endian -fno-short-enums -fverbose-asm -funsigned-char  -ffunction-sections -fdata-sections -Wno-address -fno-asynchronous-unwind-tables -fno-pic -fno-pie -ffixed-x18
> -DEFINE GCC_AARCH64_CC_XIPFLAGS     = -mstrict-align
> +DEFINE GCC_AARCH64_CC_XIPFLAGS     = -mstrict-align -mgeneral-regs-only
>  DEFINE GCC_DLINK_FLAGS_COMMON      = -nostdlib --pie
>  DEFINE GCC_DLINK2_FLAGS_COMMON     = -Wl,--script=$(EDK_TOOLS_PATH)/Scripts/GccBase.lds
>  DEFINE GCC_IA32_X64_DLINK_COMMON   = DEF(GCC_DLINK_FLAGS_COMMON) --gc-sections
> -- 
> 2.9.3
> 


  reply	other threads:[~2017-07-13 14:10 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-13 12:48 [PATCH 1/2] BaseTools/tools_def AARCH64: mark register x18 as reserved Ard Biesheuvel
2017-07-13 12:48 ` [PATCH 2/2] BaseTools/tools_def AARCH64: avoid SIMD register in XIP code Ard Biesheuvel
2017-07-13 14:11   ` Leif Lindholm [this message]
2017-07-13 16:15     ` Alexei Fedorov
2017-07-13 16:17       ` Ard Biesheuvel
     [not found]         ` <HE1PR0802MB2299B668C33778EC20CE6DDA9AAC0@HE1PR0802MB2299.eurprd08.prod.outlook.com>
2017-07-13 17:00           ` Ard Biesheuvel
2017-07-13 17:06             ` Alexei Fedorov
2017-07-13 17:31               ` Leif Lindholm
2017-07-13 20:09                 ` Laszlo Ersek
2017-07-13 14:11 ` [PATCH 1/2] BaseTools/tools_def AARCH64: mark register x18 as reserved Leif Lindholm

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