From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-x22f.google.com (mail-wm0-x22f.google.com [IPv6:2a00:1450:400c:c09::22f]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A15072095D8CB for ; Thu, 13 Jul 2017 07:10:02 -0700 (PDT) Received: by mail-wm0-x22f.google.com with SMTP id w126so24875077wme.0 for ; Thu, 13 Jul 2017 07:11:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=i0kT25jf6RNB6UwzAoQ6b8nTtJ9Ddt/VueOA/1c0oy4=; b=dEuSIbUgwzYLesEOMIQ7f/gt73E4VYZ+dmd0/yyIh5Utp3+bAEKxXGCPnSXgvBIgdA 5IqPg0LACQmCVA3nuZDdU0PqRMweVfmcBDdE8SBGvb38wiKYUJUvdTx0zVR6Zyb6E4tX sbVLhF0S8WmkN8UEQHeuqu2ZrbgI7LlQL2dac= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=i0kT25jf6RNB6UwzAoQ6b8nTtJ9Ddt/VueOA/1c0oy4=; b=crKqCQOfdTwxzru17nEZMDct0U4wOrO2M789E56+hse8aLPuhZ2TH0rLUG5TZ1llEK GyPXiDdOHPrGKJydBV1r56qXxicTiunY69pHwy9z1S2WkOatp21293XvE9+pJiOC6AJf kp8HDLjheh0CE7WE0Avc2WZpgLged5NRoyEAaiE4PZGI12TMft12Mml9PKppUIaGjeSu gsyAXdl/qr1fbMgYqeBHSBEz1xOvrpToYkkl4vC2IqJM+zkghZYrVtKjSb/4gt2vsJBA kyVkJ1Do6AynjUXsb1g9wMvKBTPmEjGluuMkQfXJ5Z+MODOUSOD6autt6SjemOsyFT5k +Aog== X-Gm-Message-State: AIVw113ERIjt4wrLwVF8yLOw9+79pUJbepBVNXpHkFvZmBIT0AaKxDfm MgFpO8gZyt9qZOZmcu8UKw== X-Received: by 10.28.166.137 with SMTP id p131mr2254628wme.5.1499955109631; Thu, 13 Jul 2017 07:11:49 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id l14sm3279803wrb.19.2017.07.13.07.11.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jul 2017 07:11:49 -0700 (PDT) Date: Thu, 13 Jul 2017 15:11:47 +0100 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org, liming.gao@intel.com, yonghong.zhu@intel.com, Alexei.Fedorov@arm.com, evan.lloyd@arm.com Message-ID: <20170713141147.GD26676@bivouac.eciton.net> References: <20170713124844.23556-1-ard.biesheuvel@linaro.org> <20170713124844.23556-2-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <20170713124844.23556-2-ard.biesheuvel@linaro.org> User-Agent: Mutt/1.5.23 (2014-03-12) Subject: Re: [PATCH 2/2] BaseTools/tools_def AARCH64: avoid SIMD register in XIP code X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 13 Jul 2017 14:10:03 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Jul 13, 2017 at 01:48:44PM +0100, Ard Biesheuvel wrote: > XIP code may execute with the MMU off, in which case all memory accesses > should be strictly aligned to their size. Some versions of GCC violate > this restriction even when -mstrict-align is passed, when performing > loads and stores that involve SIMD registers. This is clearly a bug in > the compiler, but we can easily work around it by avoiding SIMD registers > altogether when building code that may execute in such a context. So add > -mgeneral-regs-only to the AARCH64 XIP CC flags. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm > --- > BaseTools/Conf/tools_def.template | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template > index 128da5131d01..cdc9df44d97d 100755 > --- a/BaseTools/Conf/tools_def.template > +++ b/BaseTools/Conf/tools_def.template > @@ -4342,7 +4342,7 @@ DEFINE GCC_IPF_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -minline-int-divide-m > DEFINE GCC_ARM_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -mlittle-endian -mabi=aapcs -fno-short-enums -funsigned-char -ffunction-sections -fdata-sections -fomit-frame-pointer -Wno-address -mthumb -mfloat-abi=soft -fno-pic -fno-pie > DEFINE GCC_ARM_CC_XIPFLAGS = -mno-unaligned-access > DEFINE GCC_AARCH64_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -mlittle-endian -fno-short-enums -fverbose-asm -funsigned-char -ffunction-sections -fdata-sections -Wno-address -fno-asynchronous-unwind-tables -fno-pic -fno-pie -ffixed-x18 > -DEFINE GCC_AARCH64_CC_XIPFLAGS = -mstrict-align > +DEFINE GCC_AARCH64_CC_XIPFLAGS = -mstrict-align -mgeneral-regs-only > DEFINE GCC_DLINK_FLAGS_COMMON = -nostdlib --pie > DEFINE GCC_DLINK2_FLAGS_COMMON = -Wl,--script=$(EDK_TOOLS_PATH)/Scripts/GccBase.lds > DEFINE GCC_IA32_X64_DLINK_COMMON = DEF(GCC_DLINK_FLAGS_COMMON) --gc-sections > -- > 2.9.3 >