From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr0-x22e.google.com (mail-wr0-x22e.google.com [IPv6:2a00:1450:400c:c0c::22e]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 30A8A21B06E71 for ; Fri, 14 Jul 2017 11:14:26 -0700 (PDT) Received: by mail-wr0-x22e.google.com with SMTP id k67so70703560wrc.2 for ; Fri, 14 Jul 2017 11:16:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=sOAqfI1xLYaxKY9NaZY8NbdjlnlLJixxzDyK3SzOV28=; b=CXz9+ngjex8nqdhwa9C/lRZf6ZNc0y3F/nIrfW1fntL+4aUX28pGKiYHxXlF8WR+Fo oGR5+cN/6btkLGTl3TEJe9V8w3/+CvjGqV9SKUTFNnGJxt9HD2Ogl+0HLUcDG8+kNEqP EY3+PjfvOBISWwSMGirEjtEm1u+mtOQY7VOAo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=sOAqfI1xLYaxKY9NaZY8NbdjlnlLJixxzDyK3SzOV28=; b=i79iNr5deRNf6MA/wIdjsX8iM0dOmN7UetPHFLQ71l9xqEWUolPFyqia6Hme/kwmCp QJeHBe/GdwOu6cltigskQxLpnP1dIiWmmEke2RMmK5EB6Yjia4uglBqNLXOsIsOg3msX SPviGr0y3ZADW2GimAWCFhD/oLreKewfDSDFWkM/RLZZ9f3f6khXFrUoJC4EKUNYs0dZ iLcLpJDsD6EIXCb1p3hPQOPOugZOkvohQEdKocC8HrQxBu8+48uQeoc98JGyGqi3Nf3Z jTo+cpGJX4PmSuupOoqzq9veA/7SkCI784c83zM0uc6xglKE3PRtSc8XBpZRPU1VVl4C 0SYQ== X-Gm-Message-State: AIVw111pH1+xGR/aEO0onGUwx+quHfywMwJnZPn677lywYlZwCLxkNmu Cmc7sLZKZ1zI/7uW X-Received: by 10.223.152.3 with SMTP id v3mr5264094wrb.8.1500056174242; Fri, 14 Jul 2017 11:16:14 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id j190sm3654609wmd.22.2017.07.14.11.16.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 14 Jul 2017 11:16:13 -0700 (PDT) Date: Fri, 14 Jul 2017 19:16:11 +0100 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org, qin.long@intel.com, ting.ye@intel.com, lersek@redhat.com Message-ID: <20170714181611.GJ26676@bivouac.eciton.net> References: <20170714171913.28524-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <20170714171913.28524-1-ard.biesheuvel@linaro.org> User-Agent: Mutt/1.5.23 (2014-03-12) Subject: Re: [PATCH] CryptoPkg/OpensslLib AARCH64: clear XIP CC flags X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 14 Jul 2017 18:14:26 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Fri, Jul 14, 2017 at 06:19:13PM +0100, Ard Biesheuvel wrote: > Commit 0df6c8c157af ("BaseTools/tools_def AARCH64: avoid SIMD registers > in XIP code") updated the compiler flags used by AARCH64 when building > modules (including BASE libraries) that may execute before the MMU is > enabled. > > This broke the build for OpensslLib/OpensslLibCrypto because the SIMD > register file is shared with the FPU, and since OpenSSL contains some > references to float/double types (which are mostly unused for UEFI btw), > disabling floating point prevents the compiler from building OpenSSL > at all. > > When introducing the support for XIP CC flags, we were aware that this > would affect BASE libraries as well, but were not expecting this to > have any performance impact. However, in the case of software crypto, > it makes sense not to needlessly inhibit the compiler's ability to > generate fast code, and even if OpenssLib is a BASE library, it is > guaranteed not to run with the MMU off, so we can create a local > exception, and clear its XIP CC flags for AARCH64. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm > --- > Note that this un-breaks the currently broken AARCH64 build for > platforms that have secure boot enabled > > CryptoPkg/Library/OpensslLib/OpensslLib.inf | 11 +++++++++++ > CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf | 11 +++++++++++ > 2 files changed, 22 insertions(+) > > diff --git a/CryptoPkg/Library/OpensslLib/OpensslLib.inf b/CryptoPkg/Library/OpensslLib/OpensslLib.inf > index cbabb34bdd7c..1d15da6660b2 100644 > --- a/CryptoPkg/Library/OpensslLib/OpensslLib.inf > +++ b/CryptoPkg/Library/OpensslLib/OpensslLib.inf > @@ -580,3 +580,14 @@ [BuildOptions] > RVCT:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) --library_interface=aeabi_clib99 --diag_suppress=1296,1295,550,1293,111,68,177,223,144,513,188,128,546,1,3017 -JCryptoPkg/Include > XCODE:*_*_IA32_CC_FLAGS = -mmmx -msse -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) -w > XCODE:*_*_X64_CC_FLAGS = -mmmx -msse -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) -w > + > + # > + # AARCH64 uses strict alignment and avoids SIMD registers for code that may execute > + # with the MMU off. This involves SEC, PEI_CORE and PEIM modules as well as BASE > + # libraries, given that they may be included into such modules. > + # This library, even though of the BASE type, is never used in such cases, and > + # avoiding the SIMD register file (which is shared with the FPU) prevents the > + # compiler from successfully building some of the OpenSSL source files that > + # use floating point types, so clear the flags here. > + # > + GCC:*_*_AARCH64_CC_XIPFLAGS == > diff --git a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf > index 026b551bcafa..6fc8884da492 100644 > --- a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf > +++ b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf > @@ -541,3 +541,14 @@ [BuildOptions] > RVCT:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) --library_interface=aeabi_clib99 --diag_suppress=1296,1295,550,1293,111,68,177,223,144,513,188,128,546,1,3017 -JCryptoPkg/Include > XCODE:*_*_IA32_CC_FLAGS = -mmmx -msse -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) -w > XCODE:*_*_X64_CC_FLAGS = -mmmx -msse -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) -w > + > + # > + # AARCH64 uses strict alignment and avoids SIMD registers for code that may execute > + # with the MMU off. This involves SEC, PEI_CORE and PEIM modules as well as BASE > + # libraries, given that they may be included into such modules. > + # This library, even though of the BASE type, is never used in such cases, and > + # avoiding the SIMD register file (which is shared with the FPU) prevents the > + # compiler from successfully building some of the OpenSSL source files that > + # use floating point types, so clear the flags here. > + # > + GCC:*_*_AARCH64_CC_XIPFLAGS == > -- > 2.9.3 >