From: Leif Lindholm <leif.lindholm@linaro.org>
To: Jun Nie <jun.nie@linaro.org>
Cc: edk2-devel@lists.01.org, evan.lloyd@arm.com,
Alexei.Fedorov@arm.com, ard.biesheuvel@linaro.org,
shawn.guo@linaro.org, jason.liu@linaro.org
Subject: Re: [PATCH v3] ArmPlatformPkg: Support different PL011 reg offset
Date: Mon, 17 Jul 2017 17:29:14 +0100 [thread overview]
Message-ID: <20170717162914.GN26676@bivouac.eciton.net> (raw)
In-Reply-To: <1499419125-18297-1-git-send-email-jun.nie@linaro.org>
On Fri, Jul 07, 2017 at 05:18:45PM +0800, Jun Nie wrote:
> ZTE/SanChip version pl011 has different reg offset and bit offset
> for some registers.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Pushed as d4f6c35c84.
> ---
> ArmPlatformPkg/ArmPlatformPkg.dec | 1 +
> ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf | 1 +
> ArmPlatformPkg/Include/Drivers/PL011Uart.h | 31 ++++++++++++++++++++++++++
> 3 files changed, 33 insertions(+)
>
> diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec b/ArmPlatformPkg/ArmPlatformPkg.dec
> index d756fd2..b8a6b13 100644
> --- a/ArmPlatformPkg/ArmPlatformPkg.dec
> +++ b/ArmPlatformPkg/ArmPlatformPkg.dec
> @@ -97,6 +97,7 @@
> gArmPlatformTokenSpaceGuid.PL011UartInteger|0|UINT32|0x00000020
> gArmPlatformTokenSpaceGuid.PL011UartFractional|0|UINT32|0x0000002D
> gArmPlatformTokenSpaceGuid.PL011UartInterrupt|0x00000000|UINT32|0x0000002F
> + gArmPlatformTokenSpaceGuid.PL011UartRegOffsetVariant|0|UINT8|0x0000003E
>
> ## PL011 Serial Debug UART
> gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x00000000|UINT64|0x00000030
> diff --git a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf
> index 0154f3b..3fd4602 100644
> --- a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf
> +++ b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf
> @@ -39,3 +39,4 @@
>
> gArmPlatformTokenSpaceGuid.PL011UartInteger
> gArmPlatformTokenSpaceGuid.PL011UartFractional
> + gArmPlatformTokenSpaceGuid.PL011UartRegOffsetVariant
> diff --git a/ArmPlatformPkg/Include/Drivers/PL011Uart.h b/ArmPlatformPkg/Include/Drivers/PL011Uart.h
> index d5e88e8..4957dbf 100644
> --- a/ArmPlatformPkg/Include/Drivers/PL011Uart.h
> +++ b/ArmPlatformPkg/Include/Drivers/PL011Uart.h
> @@ -18,7 +18,25 @@
> #include <Uefi.h>
> #include <Protocol/SerialIo.h>
>
> +#define PL011_VARIANT_ZTE 1
> +
> // PL011 Registers
> +#if FixedPcdGet8 (PL011UartRegOffsetVariant) == PL011_VARIANT_ZTE
> +#define UARTDR 0x004
> +#define UARTRSR 0x010
> +#define UARTECR 0x010
> +#define UARTFR 0x014
> +#define UARTIBRD 0x024
> +#define UARTFBRD 0x028
> +#define UARTLCR_H 0x030
> +#define UARTCR 0x034
> +#define UARTIFLS 0x038
> +#define UARTIMSC 0x040
> +#define UARTRIS 0x044
> +#define UARTMIS 0x048
> +#define UARTICR 0x04c
> +#define UARTDMACR 0x050
> +#else
> #define UARTDR 0x000
> #define UARTRSR 0x004
> #define UARTECR 0x004
> @@ -34,6 +52,7 @@
> #define UARTMIS 0x040
> #define UARTICR 0x044
> #define UARTDMACR 0x048
> +#endif
>
> #define UARTPID0 0xFE0
> #define UARTPID1 0xFE4
> @@ -47,6 +66,17 @@
> #define UART_STATUS_ERROR_MASK 0x0F
>
> // Flag reg bits
> +#if FixedPcdGet8 (PL011UartRegOffsetVariant) == PL011_VARIANT_ZTE
> +#define PL011_UARTFR_RI (1 << 0) // Ring indicator
> +#define PL011_UARTFR_TXFE (1 << 7) // Transmit FIFO empty
> +#define PL011_UARTFR_RXFF (1 << 6) // Receive FIFO full
> +#define PL011_UARTFR_TXFF (1 << 5) // Transmit FIFO full
> +#define PL011_UARTFR_RXFE (1 << 4) // Receive FIFO empty
> +#define PL011_UARTFR_BUSY (1 << 8) // UART busy
> +#define PL011_UARTFR_DCD (1 << 2) // Data carrier detect
> +#define PL011_UARTFR_DSR (1 << 3) // Data set ready
> +#define PL011_UARTFR_CTS (1 << 1) // Clear to send
> +#else
> #define PL011_UARTFR_RI (1 << 8) // Ring indicator
> #define PL011_UARTFR_TXFE (1 << 7) // Transmit FIFO empty
> #define PL011_UARTFR_RXFF (1 << 6) // Receive FIFO full
> @@ -56,6 +86,7 @@
> #define PL011_UARTFR_DCD (1 << 2) // Data carrier detect
> #define PL011_UARTFR_DSR (1 << 1) // Data set ready
> #define PL011_UARTFR_CTS (1 << 0) // Clear to send
> +#endif
>
> // Flag reg bits - alternative names
> #define UART_TX_EMPTY_FLAG_MASK PL011_UARTFR_TXFE
> --
> 1.9.1
>
prev parent reply other threads:[~2017-07-17 16:27 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-07 9:18 [PATCH v3] ArmPlatformPkg: Support different PL011 reg offset Jun Nie
2017-07-17 16:29 ` Leif Lindholm [this message]
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