From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr0-x229.google.com (mail-wr0-x229.google.com [IPv6:2a00:1450:400c:c0c::229]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id C253D21D0B65B for ; Mon, 17 Jul 2017 09:53:46 -0700 (PDT) Received: by mail-wr0-x229.google.com with SMTP id w4so25738790wrb.2 for ; Mon, 17 Jul 2017 09:55:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=pl40Dbtnl5CkrqsbYUAW1yvLCI39CJ/7HiQkUFoQdT0=; b=DLN2tAy0EpHLCGVGVQrIIhHAZSimgqOuRxuFx4RkHgQ/wdNGqZdzmPaXnj0IzlKcPo sMiqeebz/IHh4au6B9lCGndSEXrYcnS2NdRGUj6x7YOY6ScQyRmbnh/7UOrE/KMKZrED mwgANotbO/gIEFD/LlruRtUMOtibINKyRfejU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=pl40Dbtnl5CkrqsbYUAW1yvLCI39CJ/7HiQkUFoQdT0=; b=m6Yz4QWxp/GiBQbD4HwF+QynhayFcH+cZLjlRFNHblHO1iYuVqs/P6yg9v74nqwBLE oVKgl8XcS6cwubFjk0dZncl1h/ogqKQJacYKMpgKR/tZqFYKjZmfqFhmG9SIZZb12HLC xhjJJ9EfJl6dMU/nd5NxksPiZeu9NkdcZfej6iYvhN7idei4YsQwNmbXTURLKRrkkJw8 DPNEXGjGd/Gp7n6Jg9WylIjead2i5anJfYrGc1u0jukA4yA7o2MAPxsykNHr88P55+ix r6Qd4tKercFa4lW9kjXg5lEwtpwMbD4gkkBTRAmHFNyyNoGDwODdnuTlAqSKrUcspC7m UHLg== X-Gm-Message-State: AIVw112Kcv7zuIX0RVfJqTn3izfpo6UdYx+3gXn8uyIPZNnz3pNctSsI MDqKc1p/WikhWBIs X-Received: by 10.223.175.5 with SMTP id z5mr11472283wrc.11.1500310538322; Mon, 17 Jul 2017 09:55:38 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id y12sm24814207wrb.39.2017.07.17.09.55.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 17 Jul 2017 09:55:37 -0700 (PDT) Date: Mon, 17 Jul 2017 17:55:36 +0100 From: Leif Lindholm To: Jun Nie Cc: haojian.zhuang@linaro.org, ard.biesheuvel@linaro.org, edk2-devel@lists.01.org, linaro-uefi@lists.linaro.org, shawn.guo@linaro.org, jason.liu@linaro.org Message-ID: <20170717165536.GO26676@bivouac.eciton.net> References: <1499419297-18886-1-git-send-email-jun.nie@linaro.org> MIME-Version: 1.0 In-Reply-To: <1499419297-18886-1-git-send-email-jun.nie@linaro.org> User-Agent: Mutt/1.5.23 (2014-03-12) Subject: Re: [PATCH v3 2/2] EmbeddedPkg/DwEmmc: Adjust FIFO threshold X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 17 Jul 2017 16:53:47 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Fri, Jul 07, 2017 at 05:21:37PM +0800, Jun Nie wrote: > Adjust FIFO threshold according to FIFO depth. Skip > the adjustment if we do not have FIFO depth info. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Jun Nie > --- > EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmc.h | 6 +++++ > EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c | 42 +++++++++++++++++++++++++++++ > EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf | 1 + > EmbeddedPkg/EmbeddedPkg.dec | 1 + > 4 files changed, 50 insertions(+) > > diff --git a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmc.h b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmc.h > index 055f1e0..90c7676 100644 > --- a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmc.h > +++ b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmc.h > @@ -38,7 +38,10 @@ > #define DWEMMC_RINTSTS ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x044) > #define DWEMMC_STATUS ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x048) > #define DWEMMC_FIFOTH ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x04c) > +#define DWEMMC_TCBCNT ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x05c) > +#define DWEMMC_TBBCNT ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x060) > #define DWEMMC_DEBNCE ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x064) > +#define DWEMMC_HCON ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x070) > #define DWEMMC_UHSREG ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x074) > #define DWEMMC_BMOD ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x080) > #define DWEMMC_DBADDR ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x088) > @@ -47,6 +50,7 @@ > #define DWEMMC_DSCADDR ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x094) > #define DWEMMC_BUFADDR ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x098) > #define DWEMMC_CARDTHRCTL ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0X100) > +#define DWEMMC_DATA ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0X200) > > #define CMD_UPDATE_CLK 0x80202000 > #define CMD_START_BIT (1 << 31) > @@ -124,4 +128,6 @@ > #define DWEMMC_CARD_RD_THR(x) ((x & 0xfff) << 16) > #define DWEMMC_CARD_RD_THR_EN (1 << 0) > > +#define DWEMMC_GET_HDATA_WIDTH(x) (((x) >> 7) & 0x7) > + > #endif // __DWEMMC_H__ > diff --git a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c > index bb26b69..bd20f4b 100644 > --- a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c > +++ b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c > @@ -415,6 +415,47 @@ DwEmmcReceiveResponse ( > return EFI_SUCCESS; > } > > +VOID > +DwEmmcAdjustFifothresholdreshold ( Should be ...FifoThreshold (camel case). Also, looks like some search-and-replace went wrong here. > + VOID > + ) > +{ > + /* DMA multiple transaction size map to reg value as array index */ > + CONST UINT32 BurstSize[] = {1, 4, 8, 16, 32, 64, 128, 256}; > + UINT32 BlkDepthInFifo, Fifothreshold, FifoWidth, FifoDepth; Should be FifoThreshold (camel case). Anyway, I fixed these up before committing. Reviewed-by: Leif Lindholm Pushed as d4f6c35c84..a58bfb37f6. / Leif > + UINT32 BlkSize = DWEMMC_BLOCK_SIZE, Idx = 0, RxWatermark = 1, TxWatermark, TxWatermarkInvers; > + > + /* Skip FIFO adjustment if we do not have platform FIFO depth info */ > + FifoDepth = PcdGet32 (PcdDwEmmcDxeFifoDepth); > + if (!FifoDepth) { > + return; > + } > + > + TxWatermark = FifoDepth / 2; > + TxWatermarkInvers = FifoDepth - TxWatermark; > + > + FifoWidth = DWEMMC_GET_HDATA_WIDTH (MmioRead32 (DWEMMC_HCON)); > + if (!FifoWidth) { > + FifoWidth = 2; > + } else if (FifoWidth == 2) { > + FifoWidth = 8; > + } else { > + FifoWidth = 4; > + } > + > + BlkDepthInFifo = BlkSize / FifoWidth; > + > + Idx = ARRAY_SIZE (BurstSize) - 1; > + while (Idx && ((BlkDepthInFifo % BurstSize[Idx]) || (TxWatermarkInvers % BurstSize[Idx]))) { > + Idx--; > + } > + > + RxWatermark = BurstSize[Idx] - 1; > + Fifothreshold = DWEMMC_DMA_BURST_SIZE (Idx) | DWEMMC_FIFO_TWMARK (TxWatermark) > + | DWEMMC_FIFO_RWMARK (RxWatermark); > + MmioWrite32 (DWEMMC_FIFOTH, Fifothreshold); > +} > + > EFI_STATUS > PrepareDmaData ( > IN DWEMMC_IDMAC_DESCRIPTOR* IdmacDesc, > @@ -633,6 +674,7 @@ DwEmmcDxeInitialize ( > > Handle = NULL; > > + DwEmmcAdjustFifothresholdreshold (); > gpIdmacDesc = (DWEMMC_IDMAC_DESCRIPTOR *)AllocatePages (DWEMMC_MAX_DESC_PAGES); > if (gpIdmacDesc == NULL) { > return EFI_BUFFER_TOO_SMALL; > diff --git a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf > index 99b4f99..bc4413e 100644 > --- a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf > +++ b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf > @@ -49,6 +49,7 @@ > gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeBaseAddress > gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz > gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz > + gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeFifoDepth > > [Depex] > TRUE > diff --git a/EmbeddedPkg/EmbeddedPkg.dec b/EmbeddedPkg/EmbeddedPkg.dec > index 3cb30a4..4cd528a 100644 > --- a/EmbeddedPkg/EmbeddedPkg.dec > +++ b/EmbeddedPkg/EmbeddedPkg.dec > @@ -168,6 +168,7 @@ > gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeBaseAddress|0x0|UINT32|0x00000035 > gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz|0x0|UINT32|0x00000036 > gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz|0x0|UINT32|0x00000037 > + gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeFifoDepth|0x0|UINT32|0x00000038 > > # > # Android FastBoot > -- > 1.9.1 >