From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from cloudserver096301.home.net.pl (cloudserver096301.home.net.pl [79.96.179.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 4B86721E1DAF1 for ; Fri, 4 Aug 2017 16:04:35 -0700 (PDT) Received: from 109241231046.gdansk.vectranet.pl (109.241.231.46) (HELO localhost) by serwer1539010.home.pl (79.96.179.35) with SMTP (IdeaSmtpServer 0.82) id fc97874b78cb3979; Sat, 5 Aug 2017 01:06:43 +0200 From: =?UTF-8?q?Piotr=20Kr=C3=B3l?= To: edk2-devel@lists.01.org Cc: Maurice Ma , Prince Agyeman Date: Sat, 5 Aug 2017 01:06:43 +0200 Message-Id: <20170804230643.9993-1-piotr.krol@3mdeb.com> X-Mailer: git-send-email 2.13.2 MIME-Version: 1.0 Subject: [PATCH v1 1/1] Coreboot{Module, Payload}Pkg: fix various typos X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 04 Aug 2017 23:04:35 -0000 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Maurice Ma Cc: Prince Agyeman Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Piotr Król --- CorebootModulePkg/Include/Library/CbParseLib.h | 6 +++--- CorebootModulePkg/SataControllerDxe/SataController.h | 2 +- CorebootModulePkg/SecCore/SecMain.h | 2 +- CorebootPayloadPkg/FbGop/FbGop.h | 8 ++++---- CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridge.h | 2 +- CorebootModulePkg/CbSupportPei/CbSupportPei.c | 2 +- CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c | 12 ++++++------ CorebootModulePkg/Library/CbParseLib/CbParseLib.c | 8 ++++---- CorebootModulePkg/SecCore/SecMain.c | 6 +++--- CorebootPayloadPkg/FbGop/FbGop.c | 10 +++++----- CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c | 2 +- CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c | 4 ++-- CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManager.c | 2 +- CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformConsole.c | 2 +- CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c | 2 +- CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c | 2 +- CorebootModulePkg/Contributions.txt | 6 +++--- CorebootModulePkg/SecCore/Ia32/Stack.S | 18 +++++++++--------- CorebootModulePkg/SecCore/Ia32/Stack.asm | 18 +++++++++--------- CorebootModulePkg/SecCore/Ia32/Stack.nasm | 2 +- CorebootPayloadPkg/Contributions.txt | 6 +++--- 21 files changed, 61 insertions(+), 61 deletions(-) diff --git a/CorebootModulePkg/Include/Library/CbParseLib.h b/CorebootModulePkg/Include/Library/CbParseLib.h index 12dd4fa979aa..9214669a439d 100644 --- a/CorebootModulePkg/Include/Library/CbParseLib.h +++ b/CorebootModulePkg/Include/Library/CbParseLib.h @@ -25,7 +25,7 @@ typedef RETURN_STATUS \ @param Tag The tag id to be found @retval NULL The Tag is not found. - @retval Others The poiter to the record found. + @retval Others The pointer to the record found. **/ VOID * @@ -114,7 +114,7 @@ CbParseSmbiosTable ( @param pPmCtrlReg Pointer to the address of power management control register @param pPmTimerReg Pointer to the address of power management timer register @param pResetReg Pointer to the address of system reset register - @param pResetValue Pointer to the value to be writen to the system reset register + @param pResetValue Pointer to the value to be written to the system reset register @param pPmEvtReg Pointer to the address of power management event register @param pPmGpeEnReg Pointer to the address of power management GPE enable register @@ -139,7 +139,7 @@ CbParseFadtInfo ( @param pRegBase Pointer to the base address of serial port registers @param pRegAccessType Pointer to the access type of serial port registers @param pRegWidth Pointer to the register width in bytes - @param pBaudrate Pointer to the serial port baudrate + @param pBaudrate Pointer to the serial port baud rate @param pInputHertz Pointer to the input clock frequency @param pUartPciAddr Pointer to the UART PCI bus, dev and func address diff --git a/CorebootModulePkg/SataControllerDxe/SataController.h b/CorebootModulePkg/SataControllerDxe/SataController.h index e76df748d733..1ef455561554 100644 --- a/CorebootModulePkg/SataControllerDxe/SataController.h +++ b/CorebootModulePkg/SataControllerDxe/SataController.h @@ -91,7 +91,7 @@ typedef struct _EFI_SATA_CONTROLLER_PRIVATE_DATA { UINT8 DeviceCount; // - // The highest disqulified mode for each attached device, + // The highest disqualified mode for each attached device, // From ATA/ATAPI spec, if a mode is not supported, // the modes higher than it is also not supported // diff --git a/CorebootModulePkg/SecCore/SecMain.h b/CorebootModulePkg/SecCore/SecMain.h index 7bc991ab5f24..fd20cd39b46b 100644 --- a/CorebootModulePkg/SecCore/SecMain.h +++ b/CorebootModulePkg/SecCore/SecMain.h @@ -91,7 +91,7 @@ SecTemporaryRamSupport ( the control is transferred to this function. @param SizeOfRam Size of the temporary memory available for use. - @param TempRamBase Base address of tempory ram + @param TempRamBase Base address of temporary ram @param BootFirmwareVolume Base address of the Boot Firmware Volume. **/ VOID diff --git a/CorebootPayloadPkg/FbGop/FbGop.h b/CorebootPayloadPkg/FbGop/FbGop.h index 4445f5c73045..bd2263f0e668 100644 --- a/CorebootPayloadPkg/FbGop/FbGop.h +++ b/CorebootPayloadPkg/FbGop/FbGop.h @@ -205,7 +205,7 @@ FbGopCheckForVbe ( /** - Release resource for biso video instance. + Release resource for BIOS video instance. @param FbGopPrivate Video child device private data structure @@ -311,9 +311,9 @@ FbGopGraphicsOutputVbeBlt ( /** - Grahpics Output protocol instance to block transfer for VGA device. + Graphics Output protocol instance to block transfer for VGA device. - @param This Pointer to Grahpics Output protocol instance + @param This Pointer to Graphics Output protocol instance @param BltBuffer The data to transfer to screen @param BltOperation The operation to perform @param SourceX The X coordinate of the source for BltOperation @@ -394,7 +394,7 @@ FbGopChildHandleUninstall ( ); /** - Release resource for biso video instance. + Release resource for BIOS video instance. @param FbGopPrivate Video child device private data structure diff --git a/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridge.h b/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridge.h index 4852ed0d8d29..c777cdbac151 100644 --- a/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridge.h +++ b/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridge.h @@ -42,7 +42,7 @@ ScanForRootBridges ( assigned to any subordinate bus found behind any PCI bridge hanging off this root bus. - The caller is repsonsible for ensuring that + The caller is responsible for ensuring that RootBusNumber <= MaxSubBusNumber. If RootBusNumber equals MaxSubBusNumber, then the root bus has no room for subordinate buses. diff --git a/CorebootModulePkg/CbSupportPei/CbSupportPei.c b/CorebootModulePkg/CbSupportPei/CbSupportPei.c index 2c7cf9f1fdbf..e7905f87c307 100755 --- a/CorebootModulePkg/CbSupportPei/CbSupportPei.c +++ b/CorebootModulePkg/CbSupportPei/CbSupportPei.c @@ -141,7 +141,7 @@ CbPeiReportRemainedFvs ( } /** - Based on memory base, size and type, build resource descripter HOB. + Based on memory base, size and type, build resource descriptor HOB. @param Base Memory base address. @param Size Memory size. diff --git a/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c b/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c index ca6db2306ac4..2923e21522e5 100644 --- a/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c +++ b/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c @@ -23,12 +23,12 @@ #include // -// PCI Defintions. +// PCI Definitions. // #define PCI_BRIDGE_32_BIT_IO_SPACE 0x01 // -// 16550 UART register offsets and bitfields +// 16550 UART register offsets and bit fields // #define R_UART_RXBUF 0 #define R_UART_TXBUF 0 @@ -154,7 +154,7 @@ SerialPortLibUpdatePciRegister16 ( @param Value The value to program into the PCI Configuration Register. @param Mask Bitmask of the bits to check and update in the PCI configuration register. - @return The Secondary bus number that is actually programed into the PCI to PCI Bridge device. + @return The Secondary bus number that is actually programmed into the PCI to PCI Bridge device. **/ UINT32 @@ -451,7 +451,7 @@ SerialPortWritable ( // 0 0 No cable connected. Transmit // 0 1 No cable connected. Transmit // 1 0 Cable connected, but not clear to send. Wait - // 1 1 Cable connected, and clar to send. Transmit + // 1 1 Cable connected, and clear to send. Transmit // return (BOOLEAN) ((SerialPortReadRegister (SerialRegisterBase, R_UART_MSR) & (B_UART_MSR_DSR | B_UART_MSR_CTS)) != (B_UART_MSR_DSR)); } @@ -722,7 +722,7 @@ SerialPortRead ( /** Polls a serial device to see if there is any data waiting to be read. - Polls aserial device to see if there is any data waiting to be read. + Polls a serial device to see if there is any data waiting to be read. If there is data waiting to be read from the serial device, then TRUE is returned. If there is no data waiting to be read from the serial device, then FALSE is returned. @@ -903,7 +903,7 @@ SerialPortGetControl ( } /** - Sets the baud rate, receive FIFO depth, transmit/receice time out, parity, + Sets the baud rate, receive FIFO depth, transmit/receive time out, parity, data bits, and stop bits on a serial device. @param BaudRate The requested baud rate. A BaudRate value of 0 will use the diff --git a/CorebootModulePkg/Library/CbParseLib/CbParseLib.c b/CorebootModulePkg/Library/CbParseLib/CbParseLib.c index 0909b0f49202..38d0923422cf 100644 --- a/CorebootModulePkg/Library/CbParseLib/CbParseLib.c +++ b/CorebootModulePkg/Library/CbParseLib/CbParseLib.c @@ -30,7 +30,7 @@ @param val The pointer to packed data. - @return the UNIT64 value after convertion. + @return the UNIT64 value after conversion. **/ UINT64 @@ -90,7 +90,7 @@ CbCheckSum16 ( @param Tag The tag id to be found @retval NULL The Tag is not found. - @retval Others The poiter to the record found. + @retval Others The pointer to the record found. **/ VOID * @@ -383,7 +383,7 @@ CbParseSmbiosTable ( @param pPmCtrlReg Pointer to the address of power management control register @param pPmTimerReg Pointer to the address of power management timer register @param pResetReg Pointer to the address of system reset register - @param pResetValue Pointer to the value to be writen to the system reset register + @param pResetValue Pointer to the value to be written to the system reset register @param pPmEvtReg Pointer to the address of power management event register @param pPmGpeEnReg Pointer to the address of power management GPE enable register @@ -531,7 +531,7 @@ CbParseFadtInfo ( @param pRegBase Pointer to the base address of serial port registers @param pRegAccessType Pointer to the access type of serial port registers @param pRegWidth Pointer to the register width in bytes - @param pBaudrate Pointer to the serial port baudrate + @param pBaudrate Pointer to the serial port baud rate @param pInputHertz Pointer to the input clock frequency @param pUartPciAddr Pointer to the UART PCI bus, dev and func address diff --git a/CorebootModulePkg/SecCore/SecMain.c b/CorebootModulePkg/SecCore/SecMain.c index 7ce0463d9880..4fa5f2176750 100644 --- a/CorebootModulePkg/SecCore/SecMain.c +++ b/CorebootModulePkg/SecCore/SecMain.c @@ -57,7 +57,7 @@ SecStartupPhase2( @param SizeOfRam Size of the temporary memory available for use. - @param TempRamBase Base address of tempory ram + @param TempRamBase Base address of temporary ram @param BootFirmwareVolume Base address of the Boot Firmware Volume. **/ VOID @@ -276,8 +276,8 @@ SecTemporaryRamSupport ( // // SecSwitchStack function must be invoked after the memory migration - // immediatly, also we need fixup the stack change caused by new call into - // permenent memory. + // immediately, also we need fixup the stack change caused by new call into + // permanent memory. // SecSwitchStack ( (UINT32) (UINTN) OldStack, diff --git a/CorebootPayloadPkg/FbGop/FbGop.c b/CorebootPayloadPkg/FbGop/FbGop.c index 37d6def7f780..e5e0865fb109 100644 --- a/CorebootPayloadPkg/FbGop/FbGop.c +++ b/CorebootPayloadPkg/FbGop/FbGop.c @@ -528,7 +528,7 @@ FbGopChildHandleInstall ( } // - // Creat child handle and device path protocol firstly + // Create child handle and device path protocol firstly // FbGopPrivate->Handle = NULL; Status = gBS->InstallMultipleProtocolInterfaces ( @@ -559,7 +559,7 @@ FbGopChildHandleInstall ( } // - // Creat child handle and install Graphics Output Protocol,EDID Discovered/Active Protocol + // Create child handle and install Graphics Output Protocol,EDID Discovered/Active Protocol // Status = gBS->InstallMultipleProtocolInterfaces ( &FbGopPrivate->Handle, @@ -688,7 +688,7 @@ FbGopChildHandleUninstall ( /** - Release resource for biso video instance. + Release resource for BIOS video instance. @param FbGopPrivate Video child device private data structure @@ -703,7 +703,7 @@ FbGopDeviceReleaseResource ( } // - // Release all the resourses occupied by the FB_VIDEO_DEV + // Release all the resources occupied by the FB_VIDEO_DEV // // @@ -1222,7 +1222,7 @@ FbGopVbeBltWorker ( } // // We need to fill the Virtual Screen buffer with the blt data. - // The virtual screen is upside down, as the first row is the bootom row of + // The virtual screen is upside down, as the first row is the bottom row of // the image. // if (BltOperation == EfiBltVideoToBltBuffer) { diff --git a/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c b/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c index b0a636155713..f7e1369a0869 100644 --- a/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c +++ b/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c @@ -70,7 +70,7 @@ CB_PCI_ROOT_BRIDGE_DEVICE_PATH mRootBridgeDevicePathTemplate = { assigned to any subordinate bus found behind any PCI bridge hanging off this root bus. - The caller is repsonsible for ensuring that + The caller is responsible for ensuring that RootBusNumber <= MaxSubBusNumber. If RootBusNumber equals MaxSubBusNumber, then the root bus has no room for subordinate buses. diff --git a/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c b/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c index 6d94ff72c956..c1babe8dc199 100644 --- a/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c +++ b/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c @@ -146,7 +146,7 @@ PcatPciRootBridgeBarExisted ( } /** - Parse PCI bar and collect the assigned PCI resouce information. + Parse PCI bar and collect the assigned PCI resource information. @param[in] Command Supported attributes. @@ -392,7 +392,7 @@ ScanForRootBridges ( // if (Pci.Bridge.SubordinateBus > SubBus) { // - // If the suborinate bus number of the PCI-PCI bridge is greater + // If the subordinate bus number of the PCI-PCI bridge is greater // than the PCI root bridge's current subordinate bus number, // then update the PCI root bridge's subordinate bus number // diff --git a/CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManager.c b/CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManager.c index 200127e2440d..bb80bccd5e69 100644 --- a/CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManager.c +++ b/CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManager.c @@ -279,7 +279,7 @@ PlatformBootManagerBeforeConsole ( Signal console ready platform customized event; Run diagnostics like memory testing; Connect certain devices; - Dispatch aditional option roms. + Dispatch additional option roms. **/ VOID EFIAPI diff --git a/CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformConsole.c b/CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformConsole.c index 4786170bb4e1..d8dbd3be13a3 100644 --- a/CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformConsole.c +++ b/CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformConsole.c @@ -241,7 +241,7 @@ GetGopDevicePath ( ) == 0) { // // In current implementation, we only enable one of the child handles - // as console device, i.e. sotre one of the child handle's device + // as console device, i.e. store one of the child handle's device // path to variable "ConOut" // In future, we could select all child handles to be console device // diff --git a/CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c b/CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c index 16db2e1612c9..1139c4c04aac 100644 --- a/CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c +++ b/CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c @@ -34,7 +34,7 @@ typedef struct { /** Performs platform specific initialization required for the CPU to access the hardware associated with a SerialPortLib instance. This function does - not intiailzie the serial port hardware itself. Instead, it initializes + not initialize the serial port hardware itself. Instead, it initializes hardware devices that are required for the CPU to access the serial port hardware. This function may be called more than once. diff --git a/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c b/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c index b7d6f385fe8f..2a688f95b446 100644 --- a/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c +++ b/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c @@ -163,7 +163,7 @@ EnterS3WithImmediateWake ( } /** - This function causes a systemwide reset. The exact type of the reset is + This function causes a system wide reset. The exact type of the reset is defined by the EFI_GUID that follows the Null-terminated Unicode string passed into ResetData. If the platform does not recognize the EFI_GUID in ResetData the platform must pick a supported reset type to perform.The platform may diff --git a/CorebootModulePkg/Contributions.txt b/CorebootModulePkg/Contributions.txt index f87cbd73c693..d034120f17da 100644 --- a/CorebootModulePkg/Contributions.txt +++ b/CorebootModulePkg/Contributions.txt @@ -71,14 +71,14 @@ Patch content inline or attached === Definitions for sample patch email === -* "CodeModule" is a short idenfier for the affected code. For +* "CodeModule" is a short identifier for the affected code. For example MdePkg, or MdeModulePkg UsbBusDxe. * "Brief-single-line-summary" is a short summary of the change. * The entire first line should be less than ~70 characters. * "Full-commit-message" a verbose multiple line comment describing the change. Each line should be less than ~70 characters. -* "Contributed-under" explicitely states that the contribution is - made under the terms of the contribtion agreement. This +* "Contributed-under" explicitly states that the contribution is + made under the terms of the contribution agreement. This agreement is included below in this document. * "Signed-off-by" is the contributor's signature identifying them by their real/legal name and their email address. diff --git a/CorebootModulePkg/SecCore/Ia32/Stack.S b/CorebootModulePkg/SecCore/Ia32/Stack.S index cd492404a0a3..6a8e0e4b1537 100644 --- a/CorebootModulePkg/SecCore/Ia32/Stack.S +++ b/CorebootModulePkg/SecCore/Ia32/Stack.S @@ -11,7 +11,7 @@ # # Abstract: # -# Switch the stack from temporary memory to permenent memory. +# Switch the stack from temporary memory to permanent memory. # #------------------------------------------------------------------------------ @@ -36,20 +36,20 @@ ASM_PFX(SecSwitchStack): # # !!CAUTION!! this function address's is pushed into stack after - # migration of whole temporary memory, so need save it to permenent + # migration of whole temporary memory, so need save it to permanent # memory at first! # movl 20(%esp), %ebx # Save the first parameter movl 24(%esp), %ecx # Save the second parameter # - # Save this function's return address into permenent memory at first. - # Then, Fixup the esp point to permenent memory + # Save this function's return address into permanent memory at first. + # Then, Fixup the esp point to permanent memory # movl %esp, %eax subl %ebx, %eax addl %ecx, %eax - movl 0(%esp), %edx # copy pushed register's value to permenent memory + movl 0(%esp), %edx # copy pushed register's value to permanent memory movl %edx, 0(%eax) movl 4(%esp), %edx movl %edx, 4(%eax) @@ -57,17 +57,17 @@ ASM_PFX(SecSwitchStack): movl %edx, 8(%eax) movl 12(%esp), %edx movl %edx, 12(%eax) - movl 16(%esp), %edx # Update this function's return address into permenent memory + movl 16(%esp), %edx # Update this function's return address into permanent memory movl %edx, 16(%eax) - movl %eax, %esp # From now, esp is pointed to permenent memory + movl %eax, %esp # From now, esp is pointed to permanent memory # - # Fixup the ebp point to permenent memory + # Fixup the ebp point to permanent memory # movl %ebp, %eax subl %ebx, %eax addl %ecx, %eax - movl %eax, %ebp # From now, ebp is pointed to permenent memory + movl %eax, %ebp # From now, ebp is pointed to permanent memory popl %edx popl %ecx diff --git a/CorebootModulePkg/SecCore/Ia32/Stack.asm b/CorebootModulePkg/SecCore/Ia32/Stack.asm index 9d1ed153e121..cdddc5433f7a 100644 --- a/CorebootModulePkg/SecCore/Ia32/Stack.asm +++ b/CorebootModulePkg/SecCore/Ia32/Stack.asm @@ -11,7 +11,7 @@ ; ; Abstract: ; -; Switch the stack from temporary memory to permenent memory. +; Switch the stack from temporary memory to permanent memory. ; ;------------------------------------------------------------------------------ @@ -38,7 +38,7 @@ SecSwitchStack PROC ; ; !!CAUTION!! this function address's is pushed into stack after - ; migration of whole temporary memory, so need save it to permenent + ; migration of whole temporary memory, so need save it to permanent ; memory at first! ; @@ -46,13 +46,13 @@ SecSwitchStack PROC mov ecx, [esp + 24] ; Save the second parameter ; - ; Save this function's return address into permenent memory at first. - ; Then, Fixup the esp point to permenent memory + ; Save this function's return address into permanent memory at first. + ; Then, Fixup the esp point to permanent memory ; mov eax, esp sub eax, ebx add eax, ecx - mov edx, dword ptr [esp] ; copy pushed register's value to permenent memory + mov edx, dword ptr [esp] ; copy pushed register's value to permanent memory mov dword ptr [eax], edx mov edx, dword ptr [esp + 4] mov dword ptr [eax + 4], edx @@ -60,17 +60,17 @@ SecSwitchStack PROC mov dword ptr [eax + 8], edx mov edx, dword ptr [esp + 12] mov dword ptr [eax + 12], edx - mov edx, dword ptr [esp + 16] ; Update this function's return address into permenent memory + mov edx, dword ptr [esp + 16] ; Update this function's return address into permanent memory mov dword ptr [eax + 16], edx - mov esp, eax ; From now, esp is pointed to permenent memory + mov esp, eax ; From now, esp is pointed to permanent memory ; - ; Fixup the ebp point to permenent memory + ; Fixup the ebp point to permanent memory ; mov eax, ebp sub eax, ebx add eax, ecx - mov ebp, eax ; From now, ebp is pointed to permenent memory + mov ebp, eax ; From now, ebp is pointed to permanent memory pop edx pop ecx diff --git a/CorebootModulePkg/SecCore/Ia32/Stack.nasm b/CorebootModulePkg/SecCore/Ia32/Stack.nasm index f3362f6045d6..c04d2e08ac70 100644 --- a/CorebootModulePkg/SecCore/Ia32/Stack.nasm +++ b/CorebootModulePkg/SecCore/Ia32/Stack.nasm @@ -64,7 +64,7 @@ ASM_PFX(SecSwitchStack): mov esp, eax ; From now, esp is pointed to permanent memory ; - ; Fixup the ebp point to permenent memory + ; Fixup the ebp point to permanent memory ; mov eax, ebp sub eax, ebx diff --git a/CorebootPayloadPkg/Contributions.txt b/CorebootPayloadPkg/Contributions.txt index f87cbd73c693..d034120f17da 100644 --- a/CorebootPayloadPkg/Contributions.txt +++ b/CorebootPayloadPkg/Contributions.txt @@ -71,14 +71,14 @@ Patch content inline or attached === Definitions for sample patch email === -* "CodeModule" is a short idenfier for the affected code. For +* "CodeModule" is a short identifier for the affected code. For example MdePkg, or MdeModulePkg UsbBusDxe. * "Brief-single-line-summary" is a short summary of the change. * The entire first line should be less than ~70 characters. * "Full-commit-message" a verbose multiple line comment describing the change. Each line should be less than ~70 characters. -* "Contributed-under" explicitely states that the contribution is - made under the terms of the contribtion agreement. This +* "Contributed-under" explicitly states that the contribution is + made under the terms of the contribution agreement. This agreement is included below in this document. * "Signed-off-by" is the contributor's signature identifying them by their real/legal name and their email address. -- 2.13.2