From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from out1-smtp.messagingengine.com (out1-smtp.messagingengine.com [66.111.4.25]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D524221DF9692 for ; Sat, 19 Aug 2017 14:38:51 -0700 (PDT) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.nyi.internal (Postfix) with ESMTP id DD74320CC9; Sat, 19 Aug 2017 17:41:20 -0400 (EDT) Received: from frontend2 ([10.202.2.161]) by compute1.internal (MEProxy); Sat, 19 Aug 2017 17:41:20 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc :x-sasl-enc; s=fm1; bh=miv+aIEn9+4iuCG+xYeufra+GIqE3cpG4w1zmqZeU Xk=; b=FBzwjiI/062eotU/i1SrEs6bdPo2pVqN5k8fyI36K4Hav+BJHFfRFnQbT DHq0obnnQst+LP48Z/THOA3fYvHKTl5iNPI1dyYk9x/8dihlqbYhhIBnUxfLcc1C E4n3ro0CEr7/N3YomGhvBVVuuR0MNzauIeqInQ/ZQMDnvWQMCmjWe808CLDwxL4E hCgdza+eqU1bzciVFMV+KIjnLg8Usf0jNFpbJgGr9ZiXQN8C6v/58RkHusvUuRD8 P7Y6QxH3KYpPtD6ECbe/9Ctt4j5tAX18ASkKa2qEeZfS5XSIG9Nm7JBPkDGcIuyK okuHI/NjDn/gajEepsoX+w1+fV7bg== X-ME-Sender: X-Sasl-enc: tTinl0WFcXNT/Qs1RkQsTDn7Hh33j/7HRDPHcBI3A9gg 1503178880 Received: from localhost.localdomain (c-71-226-23-158.hsd1.fl.comcast.net [71.226.23.158]) by mail.messagingengine.com (Postfix) with ESMTPA id 4D61924772; Sat, 19 Aug 2017 17:41:20 -0400 (EDT) From: Alan Ott To: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org Cc: edk2-devel@lists.01.org, linaro-uefi@lists.linaro.org, Alan Ott Date: Sat, 19 Aug 2017 17:41:13 -0400 Message-Id: <20170819214114.8140-2-alan@softiron.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170819214114.8140-1-alan@softiron.com> References: <20170819214114.8140-1-alan@softiron.com> Subject: [PATCH edk2-platforms 1/2] Silicon/AMD/Styx: Make PcdSataPortMode 32 bits X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Aug 2017 21:38:52 -0000 Extra bits are needed to accomodate all 14 SATA ports Signed-off-by: Alan Ott Contributed-under: TianoCore Contribution Agreement 1.0 --- Silicon/AMD/Styx/AmdStyx.dec | 2 +- Silicon/AMD/Styx/Drivers/StyxSataPlatformDxe/InitController.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/Silicon/AMD/Styx/AmdStyx.dec b/Silicon/AMD/Styx/AmdStyx.dec index ddd5bf4..c6eebe6 100644 --- a/Silicon/AMD/Styx/AmdStyx.dec +++ b/Silicon/AMD/Styx/AmdStyx.dec @@ -54,7 +54,7 @@ gAmdStyxTokenSpaceGuid.PcdSata0CtrlAxiSlvPort|0xE0300000|UINT32|0x00020000 gAmdStyxTokenSpaceGuid.PcdSata0PortCount|8|UINT8|0x00020001 gAmdStyxTokenSpaceGuid.PcdSataPi|0xFF|UINT32|0x00020002 - gAmdStyxTokenSpaceGuid.PcdSataPortMode|0|UINT16|0x00020003 + gAmdStyxTokenSpaceGuid.PcdSataPortMode|0|UINT32|0x00020003 gAmdStyxTokenSpaceGuid.PcdSataPortMpsp|TRUE|BOOLEAN|0x00020004 gAmdStyxTokenSpaceGuid.PcdSataSmpsSupport|FALSE|BOOLEAN|0x00020005 gAmdStyxTokenSpaceGuid.PcdSataSssSupport|TRUE|BOOLEAN|0x00020006 diff --git a/Silicon/AMD/Styx/Drivers/StyxSataPlatformDxe/InitController.c b/Silicon/AMD/Styx/Drivers/StyxSataPlatformDxe/InitController.c index 1958d91..78c6819 100644 --- a/Silicon/AMD/Styx/Drivers/StyxSataPlatformDxe/InitController.c +++ b/Silicon/AMD/Styx/Drivers/StyxSataPlatformDxe/InitController.c @@ -110,8 +110,8 @@ InitializeSataController ( SataChPerSerdes = FixedPcdGet8 (PcdSataNumChPerSerdes); for (PortNum = 0; PortNum < SataPortCount; PortNum += SataChPerSerdes) { - EvenPort = (UINT32)(FixedPcdGet16 (PcdSataPortMode) >> (PortNum * 2)) & 3; - OddPort = (UINT32)(FixedPcdGet16 (PcdSataPortMode) >> ((PortNum+1) * 2)) & 3; + EvenPort = (UINT32)(FixedPcdGet32 (PcdSataPortMode) >> (PortNum * 2)) & 3; + OddPort = (UINT32)(FixedPcdGet32 (PcdSataPortMode) >> ((PortNum+1) * 2)) & 3; SataPhyInit ((StartPort + PortNum) / SataChPerSerdes, EvenPort, OddPort); } -- 2.9.3