From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr0-x22f.google.com (mail-wr0-x22f.google.com [IPv6:2a00:1450:400c:c0c::22f]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 76EF421EB5283 for ; Thu, 31 Aug 2017 06:48:53 -0700 (PDT) Received: by mail-wr0-x22f.google.com with SMTP id z91so2324430wrc.1 for ; Thu, 31 Aug 2017 06:51:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=SbI7Z9vA8+oV7Z74H8NPKJ1ey9EmkvWfVL0ldmDuRAA=; b=OM26pwyrjavw0+ieycwxYxt2aonp77ZauR4eEpJlHJ5H6B94+zcM7dRQxYQT25wew7 AJDSPlPaaWrGMm0F6sPZrTdvILBc7NpUpt/gsWYzj7auX3oCwAx/uGTwmXCfehFnsmiE 6BCmjythAMFwdBk6BmrI0cptMsFY55S9QcebE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=SbI7Z9vA8+oV7Z74H8NPKJ1ey9EmkvWfVL0ldmDuRAA=; b=JCmvOtr8kAoOS67gOwtKv66gAl37NVw4Owxcto3SKpz0/bGnPwBMtWf/YW9MZruu31 OW8ht/490q+SbVZ4UPTEmdezu2k2OkuEjzfz9wjJLGa1V1+VGsH5gJwICRbaiRL2jxpH HrYgPsqkr706dWhAwUEBXqqJoRBIO48gr5JBCxKss1mYWZtBh349Ym2Vo0NfPs4X+Sr6 H3peQTOut71OWpSY0++V2WHlEzSape3hDaPqzZXpsP40jr4q0aVua74fb+4de4+1bpG8 vL82gkIA/DnBPjCyxnwS0fOvL8DTDDVtPoXCTdluyTysjfHlgOJ6blLGOjZfijV+sozx hqrA== X-Gm-Message-State: AHYfb5jUn0jEdu2OOScZ/CVwgsxR7byopdfmJa8G61fXDa1T1ZDcqpDK g2EhlC6IjhbhgFKi4A8SJw== X-Google-Smtp-Source: ADKCNb7gyTkQVovGCQ7TtGpegpcQ6YOpfiklVNlkeVq+5OMvCiEt5uzqudG1W1WFz/bfrs/dDDrVwA== X-Received: by 10.223.193.14 with SMTP id r14mr3360823wre.64.1504187495058; Thu, 31 Aug 2017 06:51:35 -0700 (PDT) Received: from localhost.localdomain ([154.144.95.132]) by smtp.gmail.com with ESMTPSA id p65sm165993wmg.44.2017.08.31.06.51.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 31 Aug 2017 06:51:34 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org Cc: Ard Biesheuvel Date: Thu, 31 Aug 2017 14:51:28 +0100 Message-Id: <20170831135128.14065-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 Subject: [PATCH edk2-platforms] Platform/Hisilicon: switch to NonCoherentDmaLib X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 31 Aug 2017 13:48:53 -0000 Remove the shared ArmDmaLib resolution from the shared .dsc include file: it will be removed soon from upstream EDK2. Instead, replace it with an explicit NonCoherentDmaLib resolution for each driver that depends on DmaLib. This makes it more insightful which peripherals are non cache coherent, and forces derived platforms to choose a DmaLib resolution explicitly for newly added drivers. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Platform/Hisilicon/D02/Pv660D02.dsc | 6 +++++- Platform/Hisilicon/D03/D03.dsc | 1 + Platform/Hisilicon/D05/D05.dsc | 1 + Silicon/Hisilicon/Hisilicon.dsc.inc | 1 - 4 files changed, 7 insertions(+), 2 deletions(-) diff --git a/Platform/Hisilicon/D02/Pv660D02.dsc b/Platform/Hisilicon/D02/Pv660D02.dsc index 423f7d77ff8d..1fd2b98f1552 100644 --- a/Platform/Hisilicon/D02/Pv660D02.dsc +++ b/Platform/Hisilicon/D02/Pv660D02.dsc @@ -354,6 +354,7 @@ Silicon/Hisilicon/Pv660/Drivers/PcieInitDxe/PcieInitDxe.inf Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf { + DmaLib|EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf NULL|Platform/Hisilicon/D02/Library/PlatformPciLib/PlatformPciLib.inf } MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf @@ -379,7 +380,10 @@ MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf - Silicon/Hisilicon/Drivers/SasV1Dxe/SasV1Dxe.inf + Silicon/Hisilicon/Drivers/SasV1Dxe/SasV1Dxe.inf { + + DmaLib|EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf + } MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf Silicon/Hisilicon/Pv660/Drivers/SasInitDxe/SasV1Init.inf diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index 6363b7eeec50..afea162cc48f 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -473,6 +473,7 @@ Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf { + DmaLib|EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf NULL|Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.inf } diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 35c319757ef8..3cdb1b161bd5 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -609,6 +609,7 @@ Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf { + DmaLib|EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf } diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc b/Silicon/Hisilicon/Hisilicon.dsc.inc index fadd352192ee..d77f0e35431e 100644 --- a/Silicon/Hisilicon/Hisilicon.dsc.inc +++ b/Silicon/Hisilicon/Hisilicon.dsc.inc @@ -56,7 +56,6 @@ DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf - DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf ArmGicArchLib|ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlatformStackLib.inf -- 2.11.0