Re: [PATCH edk2-platforms 01/14] Silicon/Synquacer: add package with platform headers

[Leif Lindholm <leif.lindholm@linaro.org>]

On Fri, Sep 08, 2017 at 07:23:02PM +0100, Ard Biesheuvel wrote:
> Add a package .DEC description for Synquacer with an [Includes]
> section, and add header files containing descriptions of the
> platform's memory map and PCIe configuration. No code yet.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
>  Silicon/Socionext/Synquacer/Include/Platform/MemoryMap.h | 65 ++++++++++++++++++++
>  Silicon/Socionext/Synquacer/Include/Platform/Pcie.h      | 63 +++++++++++++++++++
>  Silicon/Socionext/Synquacer/Synquacer.dec                | 22 +++++++

I'll start with the bikeshedding (questions for consideration):
- SynQuacer is written that (<-) way in all public information I can
  find.
- Does SynQuacer refer to the SC2A11, or is SC2A11 the first member of
  a SynQuacer family of products?

>  3 files changed, 150 insertions(+)
> 
> diff --git a/Silicon/Socionext/Synquacer/Include/Platform/MemoryMap.h b/Silicon/Socionext/Synquacer/Include/Platform/MemoryMap.h
> new file mode 100644
> index 000000000000..1b5393c32f1d
> --- /dev/null
> +++ b/Silicon/Socionext/Synquacer/Include/Platform/MemoryMap.h
> @@ -0,0 +1,65 @@
> +/** @file
> +  PCI memory configuration for Synquacer

Not just PCI?

> +
> +  Copyright (c) 2017, Linaro Ltd. All rights reserved.<BR>
> +
> +  This program and the accompanying materials are licensed and made available
> +  under the terms and conditions of the BSD License which accompanies this
> +  distribution.  The full text of the license may be found at
> +  http://opensource.org/licenses/bsd-license.php.
> +
> +  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
> +  WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#ifndef _SYNQUACER_PLATFORM_MEMORYMAP_H_
> +#define _SYNQUACER_PLATFORM_MEMORYMAP_H_
> +
> +// Memory mapped SPI NOR
> +#define SYNQUACER_SPI_NOR_BASE          0x08000000
> +#define SYNQUACER_SPI_NOR_SIZE          SIZE_128MB
> +
> +// On-Chip non-secure ROM
> +#define SYNQUACER_NON_SECURE_ROM_BASE   0x1F000000
> +#define SYNQUACER_NON_SECURE_ROM_SZ     SIZE_512KB
> +
> +// On-Chip Peripherals
> +#define SYNQUACER_PERIPHERALS_BASE      0x20000000
> +#define SYNQUACER_PERIPHERALS_SZ        0x0E000000
> +
> +// On-Chip non-secure SRAM
> +#define SYNQUACER_NON_SECURE_SRAM_BASE  0x2E000000
> +#define SYNQUACER_NON_SECURE_SRAM_SZ    SIZE_32KB
> +
> +// GIC-500
> +#define SYNQUACER_GIC500_DIST_BASE      FixedPcdGet64 (PcdGicDistributorBase)
> +#define SYNQUACER_GIC500_DIST_SIZE      SIZE_256KB
> +#define SYNQUACER_GIC500_RDIST_BASE     FixedPcdGet64 (PcdGicRedistributorsBase)
> +#define SYNQUACER_GIC500_RDIST_SIZE     SIZE_8MB
> +
> +// eMMC(SDH30)
> +#define SYNQUACER_EMMC_BASE             0x52300000
> +#define SYNQUACER_EMMC_BASE_SZ          SIZE_4KB
> +
> +#define SYNQUACER_EEPROM_BASE           0x10000000
> +#define SYNQUACER_EEPROM_BASE_SZ        SIZE_64KB
> +
> +// NETSEC
> +#define SYNQUACER_NETSEC_BASE           0x522D0000
> +#define SYNQUACER_NETSEC_BASE_SZ        SIZE_64KB
> +
> +#define SYNQUACER_SYSTEM_MEMORY_1_BASE  0x80000000
> +#define SYNQUACER_SYSTEM_MEMORY_1_SZ    (SIZE_2GB - SIZE_16MB)
> +
> +#define SYNQUACER_SYSTEM_MEMORY_2_BASE  0x0880000000ULL
> +#define SYNQUACER_SYSTEM_MEMORY_2_SZ    (SIZE_32GB - SIZE_2GB)
> +
> +#define SYNQUACER_SYSTEM_MEMORY_3_BASE  0x8800000000ULL
> +#define SYNQUACER_SYSTEM_MEMORY_3_SZ    SIZE_32GB
> +
> +// PCI
> +#define SYNQUACER_PCIE_BASE             0x58200000
> +#define SYNQUACER_PCIE_SIZE             0x00200000
> +
> +#endif
> diff --git a/Silicon/Socionext/Synquacer/Include/Platform/Pcie.h b/Silicon/Socionext/Synquacer/Include/Platform/Pcie.h
> new file mode 100644
> index 000000000000..f7bdc13ad915
> --- /dev/null
> +++ b/Silicon/Socionext/Synquacer/Include/Platform/Pcie.h
> @@ -0,0 +1,63 @@
> +/** @file
> +  PCI memory configuration for Synquacer

Not just memory configuration.

> +
> +  Copyright (c) 2017, Linaro Ltd. All rights reserved.<BR>
> +
> +  This program and the accompanying materials are licensed and made available
> +  under the terms and conditions of the BSD License which accompanies this
> +  distribution.  The full text of the license may be found at
> +  http://opensource.org/licenses/bsd-license.php.
> +
> +  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
> +  WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#ifndef _SYNQUACER_PLATFORM_PCI_H_
> +#define _SYNQUACER_PLATFORM_PCI_H_
> +
> +#define SYNQUACER_PCI_SEG0_CONFIG_BASE      0x60000000
> +#define SYNQUACER_PCI_SEG0_CONFIG_SIZE      0x07f00000
> +#define SYNQUACER_PCI_SEG0_DBI_BASE         0x583d0000
> +#define SYNQUACER_PCI_SEG0_EXS_BASE         0x58390000
> +
> +#define SYNQUACER_PCI_SEG0_BUSNUM_MIN       0x0
> +#define SYNQUACER_PCI_SEG0_BUSNUM_MAX       0x7e
> +
> +#define SYNQUACER_PCI_SEG0_PORTIO_MIN       0x0
> +#define SYNQUACER_PCI_SEG0_PORTIO_MAX       0xffff
> +#define SYNQUACER_PCI_SEG0_PORTIO_SIZE      0x10000
> +#define SYNQUACER_PCI_SEG0_PORTIO_MEMBASE   0x67f00000
> +#define SYNQUACER_PCI_SEG0_PORTIO_MEMSIZE   SYNQUACER_PCI_SEG0_PORTIO_SIZE
> +
> +#define SYNQUACER_PCI_SEG0_MMIO32_MIN       0x68000000
> +#define SYNQUACER_PCI_SEG0_MMIO32_MAX       0x6fffffff
> +#define SYNQUACER_PCI_SEG0_MMIO32_SIZE      0x08000000
> +
> +#define SYNQUACER_PCI_SEG0_MMIO64_MIN       0x3e00000000
> +#define SYNQUACER_PCI_SEG0_MMIO64_MAX       0x3effffffff
> +#define SYNQUACER_PCI_SEG0_MMIO64_SIZE      0x100000000
> +
> +#define SYNQUACER_PCI_SEG1_CONFIG_BASE      0x70000000
> +#define SYNQUACER_PCI_SEG1_CONFIG_SIZE      0x07f00000
> +#define SYNQUACER_PCI_SEG1_DBI_BASE         0x583c0000
> +#define SYNQUACER_PCI_SEG1_EXS_BASE         0x58380000
> +
> +#define SYNQUACER_PCI_SEG1_BUSNUM_MIN       0x0
> +#define SYNQUACER_PCI_SEG1_BUSNUM_MAX       0x7e
> +
> +#define SYNQUACER_PCI_SEG1_PORTIO_MIN       0x10000
> +#define SYNQUACER_PCI_SEG1_PORTIO_MAX       0x1ffff
> +#define SYNQUACER_PCI_SEG1_PORTIO_SIZE      0x10000
> +#define SYNQUACER_PCI_SEG1_PORTIO_MEMBASE   0x77f00000
> +#define SYNQUACER_PCI_SEG1_PORTIO_MEMSIZE   SYNQUACER_PCI_SEG1_PORTIO_SIZE
> +
> +#define SYNQUACER_PCI_SEG1_MMIO32_MIN       0x78000000
> +#define SYNQUACER_PCI_SEG1_MMIO32_MAX       0x7fffffff
> +#define SYNQUACER_PCI_SEG1_MMIO32_SIZE      0x08000000
> +
> +#define SYNQUACER_PCI_SEG1_MMIO64_MIN       0x3f00000000
> +#define SYNQUACER_PCI_SEG1_MMIO64_MAX       0x3fffffffff
> +#define SYNQUACER_PCI_SEG1_MMIO64_SIZE      0x100000000
> +
> +#endif
> diff --git a/Silicon/Socionext/Synquacer/Synquacer.dec b/Silicon/Socionext/Synquacer/Synquacer.dec
> new file mode 100644
> index 000000000000..955a056a8d59
> --- /dev/null
> +++ b/Silicon/Socionext/Synquacer/Synquacer.dec
> @@ -0,0 +1,22 @@
> +#
> +#  Copyright (c) 2017, Linaro, Ltd. All rights reserved.
> +#
> +#  This program and the accompanying materials
> +#  are licensed and made available under the terms and conditions of the BSD License
> +#  which accompanies this distribution.  The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +
> +[Defines]
> +  DEC_SPECIFICATION              = 0x00010005

I think we're at 0x0001001a (1.26) now?

> +  PACKAGE_NAME                   = Synquacer
> +  PACKAGE_GUID                   = 9c782fd2-7db1-438d-b51c-2155cee2c5cc
> +  PACKAGE_VERSION                = 0.1
> +
> +[Includes]
> +  Include
> +
> +

Drop trailing blanks?

/
    Leif

> -- 
> 2.11.0
>