From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-x229.google.com (mail-wm0-x229.google.com [IPv6:2a00:1450:400c:c09::229]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 795DB20958BCF for ; Mon, 11 Sep 2017 06:33:46 -0700 (PDT) Received: by mail-wm0-x229.google.com with SMTP id i189so39929676wmf.1 for ; Mon, 11 Sep 2017 06:36:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=GVsxrGEKcCKvmIFFnaM6x+OlBlut8GxY7C24bi5yNFo=; b=jD+5ymPzbwh682Mtp2v0YT12fcghCXK7nPZwnE3rSsPFTjNoSN0QAVDKP43Aqbihqi 73j92Oh8BcOI20zifsM5nUh5G1Z93MGzjvdvWErYrJrBfGEaivfQ+1B/pJwErGjRqD6e 59ial7TDSX/GhCVBTFg/lFkDxQ2EDVnCKRDYs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=GVsxrGEKcCKvmIFFnaM6x+OlBlut8GxY7C24bi5yNFo=; b=XNVHfazPY3L7sakFPnM9XDfyrl/2HiznsQEzgnfAN4gICbvABwb4OjUFEGAMPIVJN+ PHxTZMW7Ahf8pioeN9/6GxXZRQHn/4bqgVOmFKavMrVM3gkzizW4npOwSefGYO506wtS LGVhLQ/Ou8L1xDtgpexZKMwBjzL9aoQKgVdWwb8EGV1LC8vnCSTQHU6YaCvMbsDTm0zr DTbHQGzELZAaedVI71BoEQwusnVJN1DuQ/hRrMAvllXszH2pGKIRoIQMlRUGxJvYkein e8Cw0hDV1BK2aiobDFo5z0SAK1FXYUoNyHjaBHFXLSH849SI0523YodbB5mPzmctnwH+ uIrg== X-Gm-Message-State: AHPjjUhLfR7Uv/ZdJS0V8jDJg25lrj71KoYs68LSYmvzVe2+G7SRd7dI DndS44ppugiQYa/f0lBvtftZkg== X-Google-Smtp-Source: AOwi7QCKDCg0hIRo4Ju1f48qc0NlCOdElyusPyrbHRZuz/OOZfuOchhHl02Ty03UnDYqOAwt4hcOkA== X-Received: by 10.28.6.9 with SMTP id 9mr1284833wmg.37.1505137000552; Mon, 11 Sep 2017 06:36:40 -0700 (PDT) Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id 195sm9836308wmj.17.2017.09.11.06.36.39 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 11 Sep 2017 06:36:39 -0700 (PDT) Date: Mon, 11 Sep 2017 14:36:38 +0100 From: Leif Lindholm To: Ard Biesheuvel Cc: edk2-devel@lists.01.org, methavanitpong.pipat@socionext.com, masahisa.kojima@linaro.org, masami.hiramatsu@linaro.org Message-ID: <20170911133638.xwmjqpfpm4eyhhcr@bivouac.eciton.net> References: <20170908182315.9591-1-ard.biesheuvel@linaro.org> <20170908182315.9591-3-ard.biesheuvel@linaro.org> MIME-Version: 1.0 In-Reply-To: <20170908182315.9591-3-ard.biesheuvel@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [PATCH edk2-platforms 02/14] Silicon/Synquacer: add MemoryInitPeiLib implementation X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 11 Sep 2017 13:33:47 -0000 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Fri, Sep 08, 2017 at 07:23:03PM +0100, Ard Biesheuvel wrote: > Replace the common MemoryInitPeiLib implementation with one that does > not remove the primary FV from the memory map. This is a waste of > memory and TLB entries, given that the OS can no longer use a 1 GB > block mapping to map this memory. > > Since we have our own implementation now, there is no point in using > ArmPlatformLib's GetVirtualMemoryMap() implementation, and we can > simply declare and map the regions directly. Is there any reason we could not extend this to a better core implementation, kept in ArmPkg? (No, that does not need to happen now.) > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel > --- > Silicon/Socionext/Synquacer/Library/SynquacerMemoryInitPeiLib/SynquacerMemoryInitPeiLib.c | 140 ++++++++++++++++++++ > Silicon/Socionext/Synquacer/Library/SynquacerMemoryInitPeiLib/SynquacerMemoryInitPeiLib.inf | 50 +++++++ > 2 files changed, 190 insertions(+) > > diff --git a/Silicon/Socionext/Synquacer/Library/SynquacerMemoryInitPeiLib/SynquacerMemoryInitPeiLib.c b/Silicon/Socionext/Synquacer/Library/SynquacerMemoryInitPeiLib/SynquacerMemoryInitPeiLib.c > new file mode 100644 > index 000000000000..1d25d63f1b6c > --- /dev/null > +++ b/Silicon/Socionext/Synquacer/Library/SynquacerMemoryInitPeiLib/SynquacerMemoryInitPeiLib.c > @@ -0,0 +1,140 @@ > +/** @file > +* > +* Copyright (c) 2011-2015, ARM Limited. All rights reserved. > +* Copyright (c) 2017, Linaro, Ltd. All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the BSD License > +* which accompanies this distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > + > +#include > + > +#include > +#include > +#include > +#include > + > +#include > +#include > + > +#define ARM_MEMORY_REGION(Base, Size) \ > + { (Base), (Base), (Size), ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK } > + > +#define ARM_DEVICE_REGION(Base, Size) \ > + { (Base), (Base), (Size), ARM_MEMORY_REGION_ATTRIBUTE_DEVICE } > + > +VOID > +BuildMemoryTypeInformationHob ( > + VOID > + ); > + > +STATIC ARM_MEMORY_REGION_DESCRIPTOR mVirtualMemoryTable[] = { > + // DDR - 2 GB > + ARM_MEMORY_REGION (SYNQUACER_SYSTEM_MEMORY_1_BASE, > + SYNQUACER_SYSTEM_MEMORY_1_SZ), > + > + // DDR - 30 GB > + ARM_MEMORY_REGION (SYNQUACER_SYSTEM_MEMORY_2_BASE, > + SYNQUACER_SYSTEM_MEMORY_2_SZ), > + > + // DDR - 32 GB > +// ARM_MEMORY_REGION (SYNQUACER_SYSTEM_MEMORY_3_BASE, > +// SYNQUACER_SYSTEM_MEMORY_3_SZ), Could these be kept behind a #define (or FixedPcd) until no longer needed? > + > + // Synquacer OnChip non-secure ROM > + ARM_MEMORY_REGION (SYNQUACER_NON_SECURE_ROM_BASE, > + SYNQUACER_NON_SECURE_ROM_SZ), > + > + // Synquacer OnChip peripherals > + ARM_DEVICE_REGION (SYNQUACER_PERIPHERALS_BASE, > + SYNQUACER_PERIPHERALS_SZ), > + > + // Synquacer OnChip non-secure SRAM > + ARM_MEMORY_REGION (SYNQUACER_NON_SECURE_SRAM_BASE, > + SYNQUACER_NON_SECURE_SRAM_SZ), > + > + // Synquacer GIC-500 > + ARM_DEVICE_REGION (SYNQUACER_GIC500_DIST_BASE, SYNQUACER_GIC500_DIST_SIZE), > + ARM_DEVICE_REGION (SYNQUACER_GIC500_RDIST_BASE, SYNQUACER_GIC500_RDIST_SIZE), > + > + // Synquacer eMMC(SDH30) > + ARM_DEVICE_REGION (SYNQUACER_EMMC_BASE, SYNQUACER_EMMC_BASE_SZ), > + > + // Synquacer EEPROM > + ARM_DEVICE_REGION (SYNQUACER_EEPROM_BASE, SYNQUACER_EEPROM_BASE_SZ), > + > + // Synquacer NETSEC > + ARM_DEVICE_REGION (SYNQUACER_NETSEC_BASE, SYNQUACER_NETSEC_BASE_SZ), > + > + // PCIe control registers > + ARM_DEVICE_REGION (SYNQUACER_PCIE_BASE, SYNQUACER_PCIE_SIZE), > + > + // PCIe config space > + ARM_DEVICE_REGION (SYNQUACER_PCI_SEG0_CONFIG_BASE, > + SYNQUACER_PCI_SEG0_CONFIG_SIZE), > + ARM_DEVICE_REGION (SYNQUACER_PCI_SEG1_CONFIG_BASE, > + SYNQUACER_PCI_SEG1_CONFIG_SIZE), > + > + // PCIe I/O space > + ARM_DEVICE_REGION (SYNQUACER_PCI_SEG0_PORTIO_MEMBASE, > + SYNQUACER_PCI_SEG0_PORTIO_MEMSIZE), > + ARM_DEVICE_REGION (SYNQUACER_PCI_SEG1_PORTIO_MEMBASE, > + SYNQUACER_PCI_SEG1_PORTIO_MEMSIZE), > + > + { } > +}; > + > +EFI_STATUS > +EFIAPI > +MemoryPeim ( > + IN EFI_PHYSICAL_ADDRESS UefiMemoryBase, > + IN UINT64 UefiMemorySize > + ) > +{ > + EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes; > + RETURN_STATUS Status; > + > + ResourceAttributes = > + EFI_RESOURCE_ATTRIBUTE_PRESENT | > + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | > + EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | > + EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | > + EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE | > + EFI_RESOURCE_ATTRIBUTE_TESTED; > + > + BuildResourceDescriptorHob ( > + EFI_RESOURCE_SYSTEM_MEMORY, > + ResourceAttributes, > + SYNQUACER_SYSTEM_MEMORY_1_BASE, > + SYNQUACER_SYSTEM_MEMORY_1_SZ); > + > + BuildResourceDescriptorHob ( > + EFI_RESOURCE_SYSTEM_MEMORY, > + ResourceAttributes, > + SYNQUACER_SYSTEM_MEMORY_2_BASE, > + SYNQUACER_SYSTEM_MEMORY_2_SZ); > + > +// BuildResourceDescriptorHob ( > +// EFI_RESOURCE_SYSTEM_MEMORY, > +// ResourceAttributes, > +// SYNQUACER_SYSTEM_MEMORY_3_BASE, > +// SYNQUACER_SYSTEM_MEMORY_3_SZ); Same #define / FixedPcd? / Leif > + > + Status = ArmConfigureMmu (mVirtualMemoryTable, NULL, NULL); > + ASSERT_EFI_ERROR (Status); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + if (FeaturePcdGet (PcdPrePiProduceMemoryTypeInformationHob)) { > + // Optional feature that helps prevent EFI memory map fragmentation. > + BuildMemoryTypeInformationHob (); > + } > + return EFI_SUCCESS; > +} > diff --git a/Silicon/Socionext/Synquacer/Library/SynquacerMemoryInitPeiLib/SynquacerMemoryInitPeiLib.inf b/Silicon/Socionext/Synquacer/Library/SynquacerMemoryInitPeiLib/SynquacerMemoryInitPeiLib.inf > new file mode 100644 > index 000000000000..5f45c30a5e92 > --- /dev/null > +++ b/Silicon/Socionext/Synquacer/Library/SynquacerMemoryInitPeiLib/SynquacerMemoryInitPeiLib.inf > @@ -0,0 +1,50 @@ > +#/** @file > +# > +# Copyright (c) 2011-2014, ARM Ltd. All rights reserved.
> +# Copyright (c) 2017, Linaro, Ltd. All rights reserved.
> +# > +# This program and the accompanying materials > +# are licensed and made available under the terms and conditions of the BSD License > +# which accompanies this distribution. The full text of the license may be found at > +# http://opensource.org/licenses/bsd-license.php > +# > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +# > +#**/ > + > +[Defines] > + INF_VERSION = 0x00010019 > + BASE_NAME = SynquacerMemoryInitPeiLib > + FILE_GUID = c69d3ce7-098c-4fcd-afb4-15fb05a39308 > + MODULE_TYPE = BASE > + VERSION_STRING = 1.0 > + LIBRARY_CLASS = MemoryInitPeiLib|SEC PEIM > + > +[Sources] > + SynquacerMemoryInitPeiLib.c > + > +[Packages] > + ArmPkg/ArmPkg.dec > + EmbeddedPkg/EmbeddedPkg.dec > + MdePkg/MdePkg.dec > + MdeModulePkg/MdeModulePkg.dec > + Silicon/Socionext/Synquacer/Synquacer.dec > + > +[LibraryClasses] > + ArmLib > + ArmMmuLib > + DebugLib > + > +[FeaturePcd] > + gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob > + > +[FixedPcd] > + gArmTokenSpaceGuid.PcdGicDistributorBase > + gArmTokenSpaceGuid.PcdGicRedistributorsBase > + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase > + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize > + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase > + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize > + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase > + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize > -- > 2.11.0 >