From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 0069621CEB108 for ; Tue, 19 Sep 2017 12:15:25 -0700 (PDT) Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 836CC272C0; Tue, 19 Sep 2017 19:18:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 836CC272C0 Authentication-Results: ext-mx10.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx10.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=lersek@redhat.com Received: from lacos-laptop-7.usersys.redhat.com (ovpn-120-37.rdu2.redhat.com [10.10.120.37]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8FB545D6A4; Tue, 19 Sep 2017 19:18:27 +0000 (UTC) From: Laszlo Ersek To: edk2-devel-01 Cc: Aleksei Kovura , Gerd Hoffmann , Igor Mammedov , Jordan Justen , Ruiyu Ni Date: Tue, 19 Sep 2017 21:18:15 +0200 Message-Id: <20170919191815.3004-4-lersek@redhat.com> In-Reply-To: <20170919191815.3004-1-lersek@redhat.com> References: <20170919191815.3004-1-lersek@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Tue, 19 Sep 2017 19:18:29 +0000 (UTC) Subject: [PATCH 3/3] OvmfPkg/QemuVideoDxe/VbeShim: handle PAM1 register on Q35 correctly X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 19 Sep 2017 19:15:25 -0000 In commit db27e9f3d8f0 ("OvmfPkg/LegacyRegion: Support legacy region manipulation of Q35", 2016-03-15), Ray extended the OvmfPkg/Csm/CsmSupportLib PAM register manipulation to Q35. However, we missed that the same should be done to the QemuVideoDxe VBE Shim as well. The omission has caused no problems in practice on Q35, because QEMU has let us write to the ROM area, regardless of the PAM1 setting, all this time. This has now changed with recent QEMU commit 208fa0e43645 ("pc: make 'pc.rom' readonly when machine has PCI enabled", 2017-07-28). The QEMU commit exposes the OVMF bug when Windows 7 is started on Q35, using QEMU 2.10 -- the VBE Shim is no longer put in place and Windows 7 cannot find it. To remedy this, assign the "Pam1Address" local variable a PciLib address that matches the board type (i440fx vs. q35). Regarding the PcdLib dependency: QemuVideoDxe already uses PcdLib, both directly (see "PcdDriverSupportedEfiVersion") and indirectly (e.g. via the DxePciLibI440FxQ35 PciLib instance). Add PcdLib to [LibraryClasses] for completeness. Cc: Aleksei Kovura Cc: Gerd Hoffmann Cc: Igor Mammedov Cc: Jordan Justen Cc: Ruiyu Ni Ref: https://bugs.launchpad.net/qemu/+bug/1715700 Reported-by: Aleksei Kovura Special-thanks-to: Gerd Hoffmann Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek --- OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf | 3 ++- OvmfPkg/QemuVideoDxe/VbeShim.c | 27 +++++++++++++++++++- 2 files changed, 28 insertions(+), 2 deletions(-) diff --git a/OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf b/OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf index 7c7d429bca27..577e07b0a8bf 100644 --- a/OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf +++ b/OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf @@ -60,6 +60,7 @@ [LibraryClasses] DebugLib DevicePathLib MemoryAllocationLib + PcdLib PciLib PrintLib TimerLib @@ -75,4 +76,4 @@ [Protocols] [Pcd] gOptionRomPkgTokenSpaceGuid.PcdDriverSupportedEfiVersion - + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId diff --git a/OvmfPkg/QemuVideoDxe/VbeShim.c b/OvmfPkg/QemuVideoDxe/VbeShim.c index bc90e067266d..e45a08e8873f 100644 --- a/OvmfPkg/QemuVideoDxe/VbeShim.c +++ b/OvmfPkg/QemuVideoDxe/VbeShim.c @@ -25,6 +25,7 @@ #include #include #include +#include #include "Qemu.h" #include "VbeShim.h" @@ -64,6 +65,7 @@ InstallVbeShim ( UINTN Segment0Pages; IVT_ENTRY *Int0x10; EFI_STATUS Segment0AllocationStatus; + UINT16 HostBridgeDevId; UINTN Pam1Address; UINT8 Pam1; UINTN SegmentCPages; @@ -131,7 +133,30 @@ InstallVbeShim ( // // Put the shim in place first. // - Pam1Address = PCI_LIB_ADDRESS (0, 0, 0, 0x5A); + // Start by determining the address of the PAM1 register. + // + HostBridgeDevId = PcdGet16 (PcdOvmfHostBridgePciDevId); + switch (HostBridgeDevId) { + case INTEL_82441_DEVICE_ID: + Pam1Address = PMC_REGISTER_PIIX4 (PIIX4_PAM1); + break; + case INTEL_Q35_MCH_DEVICE_ID: + Pam1Address = DRAMC_REGISTER_Q35 (MCH_PAM1); + break; + default: + DEBUG (( + DEBUG_ERROR, + "%a: unknown host bridge device ID: 0x%04x\n", + __FUNCTION__, + HostBridgeDevId + )); + ASSERT (FALSE); + + if (!EFI_ERROR (Segment0AllocationStatus)) { + gBS->FreePages (Segment0, Segment0Pages); + } + return; + } // // low nibble covers 0xC0000 to 0xC3FFF // high nibble covers 0xC4000 to 0xC7FFF -- 2.14.1.3.gb7cf6e02401b